ARM: at91/at91sam9x5: Device tree definition files
Device tree include file for the AT91SAM9x5 SoC family. An additional .dtsi file is created to describe the generic SAM9x5 CPU Module (CM). Device tree source files for each Evaluation Kit that are using the generic CPU Module and the carrier board. The selection of available peripherals is done in this .dts file. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>hifive-unleashed-5.1
Nicolas Ferre
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/*
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* at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/dts-v1/;
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/include/ "at91sam9x5.dtsi"
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/include/ "at91sam9x5cm.dtsi"
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/ {
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model = "Atmel AT91SAM9G25-EK";
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compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
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chosen {
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bootargs = "128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
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};
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ahb {
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apb {
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dbgu: serial@fffff200 {
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status = "okay";
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};
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usart0: serial@f801c000 {
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status = "okay";
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};
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macb0: ethernet@f802c000 {
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phy-mode = "rmii";
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status = "okay";
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};
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};
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};
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};
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/*
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* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
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* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
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* AT91SAM9X25, AT91SAM9X35 SoC
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91SAM9x5 family SoC";
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compatible = "atmel,at91sam9x5";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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memory@20000000 {
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reg = <0x20000000 0x10000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <2>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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interrupt-parent;
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reg = <0xfffff000 0x200>;
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};
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pit: timer@fffffe30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffe30 0xf>;
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interrupts = <1 4>;
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};
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tcb0: timer@f8008000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf8008000 0x100>;
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interrupts = <17 4>;
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};
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tcb1: timer@f800c000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf800c000 0x100>;
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interrupts = <17 4>;
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};
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dma0: dma-controller@ffffec00 {
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffec00 0x200>;
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interrupts = <20 4>;
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};
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dma1: dma-controller@ffffee00 {
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffee00 0x200>;
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interrupts = <21 4>;
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};
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pioA: gpio@fffff400 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x100>;
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interrupts = <2 4>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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pioB: gpio@fffff600 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff600 0x100>;
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interrupts = <2 4>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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pioC: gpio@fffff800 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff800 0x100>;
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interrupts = <3 4>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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pioD: gpio@fffffa00 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffffa00 0x100>;
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interrupts = <3 4>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 4>;
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status = "disabled";
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};
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usart0: serial@f801c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf801c000 0x200>;
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interrupts = <5 4>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart1: serial@f8020000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8020000 0x200>;
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interrupts = <6 4>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart2: serial@f8024000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8024000 0x200>;
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interrupts = <7 4>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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macb0: ethernet@f802c000 {
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compatible = "cdns,at32ap7000-macb", "cdns,macb";
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reg = <0xf802c000 0x100>;
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interrupts = <24 4>;
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status = "disabled";
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};
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macb1: ethernet@f8030000 {
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compatible = "cdns,at32ap7000-macb", "cdns,macb";
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reg = <0xf8030000 0x100>;
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interrupts = <27 4>;
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status = "disabled";
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};
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};
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};
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};
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/*
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* at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/ {
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memory@20000000 {
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reg = <0x20000000 0x8000000>;
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};
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};
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