mmc: sdhci: Add LTR support for some Intel BYT based controllers
Some Intel BYT based host controllers support the setting of latency
tolerance. Accordingly, implement the PM QoS ->set_latency_tolerance()
callback. The raw register values are also exposed via debugfs.
Intel EHL controllers require this support.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Fixes: cb3a7d4a0a ("mmc: sdhci-pci: Add support for Intel EHL")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200818104508.7149-1-adrian.hunter@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
zero-sugar-mainline-defconfig
Adrian Hunter
Ulf Hansson
parent
c92a6af686
commit
46f4a69ec8
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@ -24,6 +24,8 @@
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#include <linux/iopoll.h>
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#include <linux/gpio.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm_qos.h>
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#include <linux/debugfs.h>
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#include <linux/mmc/slot-gpio.h>
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#include <linux/mmc/sdhci-pci-data.h>
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#include <linux/acpi.h>
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@ -516,6 +518,8 @@ struct intel_host {
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bool rpm_retune_ok;
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u32 glk_rx_ctrl1;
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u32 glk_tun_val;
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u32 active_ltr;
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u32 idle_ltr;
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};
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static const guid_t intel_dsm_guid =
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@ -760,6 +764,108 @@ static int intel_execute_tuning(struct mmc_host *mmc, u32 opcode)
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return 0;
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}
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#define INTEL_ACTIVELTR 0x804
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#define INTEL_IDLELTR 0x808
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#define INTEL_LTR_REQ BIT(15)
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#define INTEL_LTR_SCALE_MASK GENMASK(11, 10)
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#define INTEL_LTR_SCALE_1US (2 << 10)
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#define INTEL_LTR_SCALE_32US (3 << 10)
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#define INTEL_LTR_VALUE_MASK GENMASK(9, 0)
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static void intel_cache_ltr(struct sdhci_pci_slot *slot)
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{
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struct intel_host *intel_host = sdhci_pci_priv(slot);
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struct sdhci_host *host = slot->host;
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intel_host->active_ltr = readl(host->ioaddr + INTEL_ACTIVELTR);
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intel_host->idle_ltr = readl(host->ioaddr + INTEL_IDLELTR);
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}
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static void intel_ltr_set(struct device *dev, s32 val)
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{
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struct sdhci_pci_chip *chip = dev_get_drvdata(dev);
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struct sdhci_pci_slot *slot = chip->slots[0];
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struct intel_host *intel_host = sdhci_pci_priv(slot);
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struct sdhci_host *host = slot->host;
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u32 ltr;
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pm_runtime_get_sync(dev);
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/*
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* Program latency tolerance (LTR) accordingly what has been asked
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* by the PM QoS layer or disable it in case we were passed
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* negative value or PM_QOS_LATENCY_ANY.
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*/
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ltr = readl(host->ioaddr + INTEL_ACTIVELTR);
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if (val == PM_QOS_LATENCY_ANY || val < 0) {
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ltr &= ~INTEL_LTR_REQ;
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} else {
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ltr |= INTEL_LTR_REQ;
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ltr &= ~INTEL_LTR_SCALE_MASK;
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ltr &= ~INTEL_LTR_VALUE_MASK;
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if (val > INTEL_LTR_VALUE_MASK) {
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val >>= 5;
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if (val > INTEL_LTR_VALUE_MASK)
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val = INTEL_LTR_VALUE_MASK;
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ltr |= INTEL_LTR_SCALE_32US | val;
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} else {
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ltr |= INTEL_LTR_SCALE_1US | val;
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}
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}
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if (ltr == intel_host->active_ltr)
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goto out;
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writel(ltr, host->ioaddr + INTEL_ACTIVELTR);
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writel(ltr, host->ioaddr + INTEL_IDLELTR);
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/* Cache the values into lpss structure */
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intel_cache_ltr(slot);
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out:
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pm_runtime_put_autosuspend(dev);
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}
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static bool intel_use_ltr(struct sdhci_pci_chip *chip)
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{
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switch (chip->pdev->device) {
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case PCI_DEVICE_ID_INTEL_BYT_EMMC:
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case PCI_DEVICE_ID_INTEL_BYT_EMMC2:
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case PCI_DEVICE_ID_INTEL_BYT_SDIO:
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case PCI_DEVICE_ID_INTEL_BYT_SD:
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case PCI_DEVICE_ID_INTEL_BSW_EMMC:
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case PCI_DEVICE_ID_INTEL_BSW_SDIO:
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case PCI_DEVICE_ID_INTEL_BSW_SD:
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return false;
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default:
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return true;
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}
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}
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static void intel_ltr_expose(struct sdhci_pci_chip *chip)
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{
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struct device *dev = &chip->pdev->dev;
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if (!intel_use_ltr(chip))
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return;
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dev->power.set_latency_tolerance = intel_ltr_set;
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dev_pm_qos_expose_latency_tolerance(dev);
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}
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static void intel_ltr_hide(struct sdhci_pci_chip *chip)
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{
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struct device *dev = &chip->pdev->dev;
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if (!intel_use_ltr(chip))
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return;
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dev_pm_qos_hide_latency_tolerance(dev);
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dev->power.set_latency_tolerance = NULL;
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}
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static void byt_probe_slot(struct sdhci_pci_slot *slot)
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{
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struct mmc_host_ops *ops = &slot->host->mmc_host_ops;
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@ -774,6 +880,43 @@ static void byt_probe_slot(struct sdhci_pci_slot *slot)
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ops->start_signal_voltage_switch = intel_start_signal_voltage_switch;
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device_property_read_u32(dev, "max-frequency", &mmc->f_max);
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if (!mmc->slotno) {
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slot->chip->slots[mmc->slotno] = slot;
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intel_ltr_expose(slot->chip);
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}
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}
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static void byt_add_debugfs(struct sdhci_pci_slot *slot)
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{
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struct intel_host *intel_host = sdhci_pci_priv(slot);
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struct mmc_host *mmc = slot->host->mmc;
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struct dentry *dir = mmc->debugfs_root;
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if (!intel_use_ltr(slot->chip))
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return;
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debugfs_create_x32("active_ltr", 0444, dir, &intel_host->active_ltr);
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debugfs_create_x32("idle_ltr", 0444, dir, &intel_host->idle_ltr);
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intel_cache_ltr(slot);
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}
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static int byt_add_host(struct sdhci_pci_slot *slot)
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{
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int ret = sdhci_add_host(slot->host);
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if (!ret)
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byt_add_debugfs(slot);
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return ret;
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}
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static void byt_remove_slot(struct sdhci_pci_slot *slot, int dead)
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{
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struct mmc_host *mmc = slot->host->mmc;
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if (!mmc->slotno)
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intel_ltr_hide(slot->chip);
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}
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static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
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@ -854,6 +997,8 @@ static int glk_emmc_add_host(struct sdhci_pci_slot *slot)
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if (ret)
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goto cleanup;
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byt_add_debugfs(slot);
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return 0;
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cleanup:
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@ -1031,6 +1176,8 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
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#endif
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.allow_runtime_pm = true,
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.probe_slot = byt_emmc_probe_slot,
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.add_host = byt_add_host,
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.remove_slot = byt_remove_slot,
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.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
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SDHCI_QUIRK_NO_LED,
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.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
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@ -1044,6 +1191,7 @@ static const struct sdhci_pci_fixes sdhci_intel_glk_emmc = {
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.allow_runtime_pm = true,
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.probe_slot = glk_emmc_probe_slot,
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.add_host = glk_emmc_add_host,
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.remove_slot = byt_remove_slot,
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#ifdef CONFIG_PM_SLEEP
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.suspend = sdhci_cqhci_suspend,
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.resume = sdhci_cqhci_resume,
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@ -1074,6 +1222,8 @@ static const struct sdhci_pci_fixes sdhci_ni_byt_sdio = {
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SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
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.allow_runtime_pm = true,
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.probe_slot = ni_byt_sdio_probe_slot,
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.add_host = byt_add_host,
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.remove_slot = byt_remove_slot,
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.ops = &sdhci_intel_byt_ops,
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.priv_size = sizeof(struct intel_host),
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};
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@ -1091,6 +1241,8 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
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SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
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.allow_runtime_pm = true,
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.probe_slot = byt_sdio_probe_slot,
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.add_host = byt_add_host,
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.remove_slot = byt_remove_slot,
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.ops = &sdhci_intel_byt_ops,
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.priv_size = sizeof(struct intel_host),
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};
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@ -1110,6 +1262,8 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
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.allow_runtime_pm = true,
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.own_cd_for_runtime_pm = true,
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.probe_slot = byt_sd_probe_slot,
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.add_host = byt_add_host,
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.remove_slot = byt_remove_slot,
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.ops = &sdhci_intel_byt_ops,
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.priv_size = sizeof(struct intel_host),
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};
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