rtc-x1205: Fix alarm set
I have discovered that the current version of rtc-x1205.c does not work correctly when asked to set the alarm time by the RTC_WKALM_SET ioctl() call. This happens because the alarm registers do not behave like the current-time registers. They are non-volatile. Two things go wrong: - the X1205 requires a 10 msec delay after any attempt to write to the non-volatile registers. The x1205_set_datetime() routine does the write as 8 single-byte writes without any delay. Only the first write succeeds. The second is NAKed because the chip is busy. - the X1205 resets the RWEL bit after any write to the non-volatile registers. This would lock out any further writes after the first even with a 10msec delay. I fix this by doing a single 8-byte write and then waiting 10msec for the chip to be ready. A side effect of this change is that it will speed up x1205_rtc_set_time() which uses the same code. I have also implemented the 'enable' bit in the rtc_wkalm structure, which the existing driver does not attempt to do. I have modified both x1205_rtc_set_alarm() to set the AL0E bit, and x1205_rtc_read_alarm() to return it. I have tested this patch on a LinkSys NSLU2 under OpenWRT, but on no other hardware. On the NSLU2 the X1205 correctly asserts its IRQ pin when the alarm time matches the current time. [akpm@linux-foundation.org: clean up over-parenthesisation] Signed-off-by: Michael Hamel <mhamel@adi.co.nz> Signed-off-by: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>hifive-unleashed-5.1
Michael Hamel
Linus Torvalds
parent
7a36a752d0
commit
471d47e322
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@ -71,6 +71,7 @@
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#define X1205_SR_RTCF 0x01 /* Clock failure */
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#define X1205_SR_WEL 0x02 /* Write Enable Latch */
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#define X1205_SR_RWEL 0x04 /* Register Write Enable */
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#define X1205_SR_AL0 0x20 /* Alarm 0 match */
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#define X1205_DTR_DTR0 0x01
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#define X1205_DTR_DTR1 0x02
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@ -78,6 +79,8 @@
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#define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
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#define X1205_INT_AL0E 0x20 /* Alarm 0 enable */
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static struct i2c_driver x1205_driver;
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/*
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@ -89,8 +92,8 @@ static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
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unsigned char reg_base)
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{
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unsigned char dt_addr[2] = { 0, reg_base };
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unsigned char buf[8];
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int i;
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struct i2c_msg msgs[] = {
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{ client->addr, 0, 2, dt_addr }, /* setup read ptr */
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@ -98,7 +101,7 @@ static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
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};
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/* read date registers */
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if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
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if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
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dev_err(&client->dev, "%s: read error\n", __func__);
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return -EIO;
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}
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@ -110,6 +113,11 @@ static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
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buf[0], buf[1], buf[2], buf[3],
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buf[4], buf[5], buf[6], buf[7]);
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/* Mask out the enable bits if these are alarm registers */
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if (reg_base < X1205_CCR_BASE)
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for (i = 0; i <= 4; i++)
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buf[i] &= 0x7F;
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tm->tm_sec = BCD2BIN(buf[CCR_SEC]);
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tm->tm_min = BCD2BIN(buf[CCR_MIN]);
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tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
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@ -138,7 +146,7 @@ static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
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};
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/* read status register */
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if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
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if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
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dev_err(&client->dev, "%s: read error\n", __func__);
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return -EIO;
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}
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@ -147,10 +155,11 @@ static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
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}
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static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
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int datetoo, u8 reg_base)
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int datetoo, u8 reg_base, unsigned char alm_enable)
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{
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int i, xfer;
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int i, xfer, nbytes;
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unsigned char buf[8];
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unsigned char rdata[10] = { 0, reg_base };
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static const unsigned char wel[3] = { 0, X1205_REG_SR,
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X1205_SR_WEL };
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@ -189,6 +198,11 @@ static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
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buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100);
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}
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/* If writing alarm registers, set compare bits on registers 0-4 */
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if (reg_base < X1205_CCR_BASE)
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for (i = 0; i <= 4; i++)
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buf[i] |= 0x80;
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/* this sequence is required to unlock the chip */
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if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
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dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
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@ -200,19 +214,57 @@ static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
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return -EIO;
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}
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/* write register's data */
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for (i = 0; i < (datetoo ? 8 : 3); i++) {
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unsigned char rdata[3] = { 0, reg_base + i, buf[i] };
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xfer = i2c_master_send(client, rdata, 3);
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/* write register's data */
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if (datetoo)
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nbytes = 8;
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else
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nbytes = 3;
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for (i = 0; i < nbytes; i++)
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rdata[2+i] = buf[i];
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xfer = i2c_master_send(client, rdata, nbytes+2);
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if (xfer != nbytes+2) {
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dev_err(&client->dev,
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"%s: result=%d addr=%02x, data=%02x\n",
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__func__,
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xfer, rdata[1], rdata[2]);
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return -EIO;
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}
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/* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
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if (reg_base < X1205_CCR_BASE) {
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unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
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msleep(10);
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/* ...and set or clear the AL0E bit in the INT register */
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/* Need to set RWEL again as the write has cleared it */
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xfer = i2c_master_send(client, rwel, 3);
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if (xfer != 3) {
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dev_err(&client->dev,
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"%s: xfer=%d addr=%02x, data=%02x\n",
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"%s: aloe rwel - %d\n",
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__func__,
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xfer, rdata[1], rdata[2]);
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xfer);
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return -EIO;
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}
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};
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if (alm_enable)
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al0e[2] = X1205_INT_AL0E;
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xfer = i2c_master_send(client, al0e, 3);
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if (xfer != 3) {
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dev_err(&client->dev,
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"%s: al0e - %d\n",
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__func__,
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xfer);
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return -EIO;
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}
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/* and wait 10msec again for this write to complete */
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msleep(10);
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}
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/* disable further writes */
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if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
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@ -230,9 +282,9 @@ static int x1205_fix_osc(struct i2c_client *client)
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tm.tm_hour = tm.tm_min = tm.tm_sec = 0;
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if ((err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE)) < 0)
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dev_err(&client->dev,
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"unable to restart the oscillator\n");
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err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE, 0);
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if (err < 0)
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dev_err(&client->dev, "unable to restart the oscillator\n");
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return err;
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}
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@ -248,7 +300,7 @@ static int x1205_get_dtrim(struct i2c_client *client, int *trim)
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};
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/* read dtr register */
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if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
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if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
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dev_err(&client->dev, "%s: read error\n", __func__);
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return -EIO;
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}
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@ -280,7 +332,7 @@ static int x1205_get_atrim(struct i2c_client *client, int *trim)
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};
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/* read atr register */
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if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
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if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
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dev_err(&client->dev, "%s: read error\n", __func__);
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return -EIO;
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}
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@ -403,14 +455,33 @@ static int x1205_validate_client(struct i2c_client *client)
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static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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return x1205_get_datetime(to_i2c_client(dev),
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&alrm->time, X1205_ALM0_BASE);
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int err;
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unsigned char intreg, status;
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static unsigned char int_addr[2] = { 0, X1205_REG_INT };
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struct i2c_client *client = to_i2c_client(dev);
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struct i2c_msg msgs[] = {
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{ client->addr, 0, 2, int_addr }, /* setup read ptr */
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{ client->addr, I2C_M_RD, 1, &intreg }, /* read INT register */
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};
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/* read interrupt register and status register */
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if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
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dev_err(&client->dev, "%s: read error\n", __func__);
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return -EIO;
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}
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err = x1205_get_status(client, &status);
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if (err == 0) {
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alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
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alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
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err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
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}
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return err;
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}
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static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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return x1205_set_datetime(to_i2c_client(dev),
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&alrm->time, 1, X1205_ALM0_BASE);
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&alrm->time, 1, X1205_ALM0_BASE, alrm->enabled);
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}
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static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
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@ -422,7 +493,7 @@ static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
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static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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return x1205_set_datetime(to_i2c_client(dev),
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tm, 1, X1205_CCR_BASE);
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tm, 1, X1205_CCR_BASE, 0);
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}
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static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
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