ARM: i.MX: mx21ads: Replace direct handling of peripheral bits with GPIOs
This patch replaces direct handling of peripheral bits with GPIOs by using basic-mmio-gpio driver. As a result this change eliminate some low-level code and removes custom io_map() from the board. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Alexander Shiyan
Shawn Guo
parent
d1db0eea85
commit
477fbf1db8
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@ -17,51 +17,45 @@
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/physmap.h>
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#include <linux/basic_mmio_gpio.h>
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#include <linux/gpio.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/mach/map.h>
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#include "common.h"
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#include "devices-imx21.h"
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#include "hardware.h"
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#include "iomux-mx21.h"
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/*
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* Memory-mapped I/O on MX21ADS base board
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*/
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#define MX21ADS_MMIO_BASE_ADDR 0xf5000000
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#define MX21ADS_MMIO_SIZE 0xc00000
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#define MX21ADS_CS8900A_REG (MX21_CS1_BASE_ADDR + 0x000000)
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#define MX21ADS_ST16C255_IOBASE_REG (MX21_CS1_BASE_ADDR + 0x200000)
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#define MX21ADS_VERSION_REG (MX21_CS1_BASE_ADDR + 0x400000)
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#define MX21ADS_IO_REG (MX21_CS1_BASE_ADDR + 0x800000)
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#define MX21ADS_REG_ADDR(offset) (void __force __iomem *) \
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(MX21ADS_MMIO_BASE_ADDR + (offset))
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#define MX21ADS_CS8900A_MMIO_SIZE 0x200000
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#define MX21ADS_CS8900A_IRQ_GPIO IMX_GPIO_NR(5, 11)
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#define MX21ADS_ST16C255_IOBASE_REG MX21ADS_REG_ADDR(0x200000)
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#define MX21ADS_VERSION_REG MX21ADS_REG_ADDR(0x400000)
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#define MX21ADS_IO_REG MX21ADS_REG_ADDR(0x800000)
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#define MX21ADS_MMC_CD IMX_GPIO_NR(4, 25)
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#define MX21ADS_CS8900A_IRQ_GPIO IMX_GPIO_NR(5, 11)
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#define MX21ADS_MMGPIO_BASE (6 * 32)
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/* MX21ADS_IO_REG bit definitions */
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#define MX21ADS_IO_SD_WP 0x0001 /* read */
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#define MX21ADS_IO_TP6 0x0001 /* write */
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#define MX21ADS_IO_SW_SEL 0x0002 /* read */
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#define MX21ADS_IO_TP7 0x0002 /* write */
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#define MX21ADS_IO_RESET_E_UART 0x0004
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#define MX21ADS_IO_RESET_BASE 0x0008
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#define MX21ADS_IO_CSI_CTL2 0x0010
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#define MX21ADS_IO_CSI_CTL1 0x0020
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#define MX21ADS_IO_CSI_CTL0 0x0040
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#define MX21ADS_IO_UART1_EN 0x0080
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#define MX21ADS_IO_UART4_EN 0x0100
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#define MX21ADS_IO_LCDON 0x0200
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#define MX21ADS_IO_IRDA_EN 0x0400
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#define MX21ADS_IO_IRDA_FIR_SEL 0x0800
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#define MX21ADS_IO_IRDA_MD0_B 0x1000
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#define MX21ADS_IO_IRDA_MD1 0x2000
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#define MX21ADS_IO_LED4_ON 0x4000
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#define MX21ADS_IO_LED3_ON 0x8000
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#define MX21ADS_IO_SD_WP (MX21ADS_MMGPIO_BASE + 0)
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#define MX21ADS_IO_TP6 (MX21ADS_IO_SD_WP)
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#define MX21ADS_IO_SW_SEL (MX21ADS_MMGPIO_BASE + 1)
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#define MX21ADS_IO_TP7 (MX21ADS_IO_SW_SEL)
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#define MX21ADS_IO_RESET_E_UART (MX21ADS_MMGPIO_BASE + 2)
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#define MX21ADS_IO_RESET_BASE (MX21ADS_MMGPIO_BASE + 3)
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#define MX21ADS_IO_CSI_CTL2 (MX21ADS_MMGPIO_BASE + 4)
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#define MX21ADS_IO_CSI_CTL1 (MX21ADS_MMGPIO_BASE + 5)
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#define MX21ADS_IO_CSI_CTL0 (MX21ADS_MMGPIO_BASE + 6)
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#define MX21ADS_IO_UART1_EN (MX21ADS_MMGPIO_BASE + 7)
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#define MX21ADS_IO_UART4_EN (MX21ADS_MMGPIO_BASE + 8)
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#define MX21ADS_IO_LCDON (MX21ADS_MMGPIO_BASE + 9)
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#define MX21ADS_IO_IRDA_EN (MX21ADS_MMGPIO_BASE + 10)
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#define MX21ADS_IO_IRDA_FIR_SEL (MX21ADS_MMGPIO_BASE + 11)
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#define MX21ADS_IO_IRDA_MD0_B (MX21ADS_MMGPIO_BASE + 12)
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#define MX21ADS_IO_IRDA_MD1 (MX21ADS_MMGPIO_BASE + 13)
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#define MX21ADS_IO_LED4_ON (MX21ADS_MMGPIO_BASE + 14)
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#define MX21ADS_IO_LED3_ON (MX21ADS_MMGPIO_BASE + 15)
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static const int mx21ads_pins[] __initconst = {
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@ -160,7 +154,7 @@ static struct platform_device mx21ads_nor_mtd_device = {
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};
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static struct resource mx21ads_cs8900_resources[] __initdata = {
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DEFINE_RES_MEM(MX21_CS1_BASE_ADDR, MX21ADS_CS8900A_MMIO_SIZE),
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DEFINE_RES_MEM(MX21_CS1_BASE_ADDR, SZ_1K),
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/* irq number is run-time assigned */
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DEFINE_RES_IRQ(-1),
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};
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@ -179,23 +173,39 @@ static const struct imxuart_platform_data uart_pdata_rts __initconst = {
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static const struct imxuart_platform_data uart_pdata_norts __initconst = {
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};
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static struct resource mx21ads_mmgpio_resource =
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DEFINE_RES_MEM_NAMED(MX21ADS_IO_REG, SZ_2, "dat");
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static struct bgpio_pdata mx21ads_mmgpio_pdata = {
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.base = MX21ADS_MMGPIO_BASE,
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.ngpio = 16,
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};
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static struct platform_device mx21ads_mmgpio = {
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.name = "basic-mmio-gpio",
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.id = PLATFORM_DEVID_AUTO,
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.resource = &mx21ads_mmgpio_resource,
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.num_resources = 1,
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.dev = {
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.platform_data = &mx21ads_mmgpio_pdata,
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},
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};
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static int mx21ads_fb_init(struct platform_device *pdev)
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{
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u16 tmp;
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int ret;
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tmp = __raw_readw(MX21ADS_IO_REG);
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tmp |= MX21ADS_IO_LCDON;
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__raw_writew(tmp, MX21ADS_IO_REG);
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return 0;
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ret = gpio_request(MX21ADS_IO_LCDON, "fb-lcdon");
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if (ret)
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return ret;
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return gpio_direction_output(MX21ADS_IO_LCDON, 1);
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}
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static void mx21ads_fb_exit(struct platform_device *pdev)
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{
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u16 tmp;
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tmp = __raw_readw(MX21ADS_IO_REG);
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tmp &= ~MX21ADS_IO_LCDON;
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__raw_writew(tmp, MX21ADS_IO_REG);
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gpio_set_value(MX21ADS_IO_LCDON, 0);
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gpio_free(MX21ADS_IO_LCDON);
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}
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/*
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@ -236,19 +246,26 @@ static const struct imx_fb_platform_data mx21ads_fb_data __initconst = {
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static int mx21ads_sdhc_get_ro(struct device *dev)
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{
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return (__raw_readw(MX21ADS_IO_REG) & MX21ADS_IO_SD_WP) ? 1 : 0;
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return gpio_get_value(MX21ADS_IO_SD_WP);
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}
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static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq,
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void *data)
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{
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return request_irq(gpio_to_irq(IMX_GPIO_NR(4, 25)), detect_irq,
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IRQF_TRIGGER_FALLING, "mmc-detect", data);
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int ret;
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ret = gpio_request(MX21ADS_IO_SD_WP, "mmc-ro");
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if (ret)
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return ret;
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return request_irq(gpio_to_irq(MX21ADS_MMC_CD), detect_irq,
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IRQF_TRIGGER_FALLING, "mmc-detect", data);
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}
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static void mx21ads_sdhc_exit(struct device *dev, void *data)
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{
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free_irq(gpio_to_irq(IMX_GPIO_NR(4, 25)), data);
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free_irq(gpio_to_irq(MX21ADS_MMC_CD), data);
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gpio_free(MX21ADS_IO_SD_WP);
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}
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static const struct imxmmc_platform_data mx21ads_sdhc_pdata __initconst = {
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@ -264,29 +281,8 @@ mx21ads_nand_board_info __initconst = {
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.hw_ecc = 1,
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};
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static struct map_desc mx21ads_io_desc[] __initdata = {
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/*
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* Memory-mapped I/O on MX21ADS Base board:
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* - CS8900A Ethernet controller
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* - ST16C2552CJ UART
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* - CPU and Base board version
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* - Base board I/O register
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*/
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{
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.virtual = MX21ADS_MMIO_BASE_ADDR,
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.pfn = __phys_to_pfn(MX21_CS1_BASE_ADDR),
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.length = MX21ADS_MMIO_SIZE,
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.type = MT_DEVICE,
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},
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};
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static void __init mx21ads_map_io(void)
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{
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mx21_map_io();
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iotable_init(mx21ads_io_desc, ARRAY_SIZE(mx21ads_io_desc));
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}
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static struct platform_device *platform_devices[] __initdata = {
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&mx21ads_mmgpio,
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&mx21ads_nor_mtd_device,
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};
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@ -321,7 +317,7 @@ static void __init mx21ads_timer_init(void)
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MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
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/* maintainer: Freescale Semiconductor, Inc. */
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.atag_offset = 0x100,
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.map_io = mx21ads_map_io,
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.map_io = mx21_map_io,
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.init_early = imx21_init_early,
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.init_irq = mx21_init_irq,
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.handle_irq = imx21_handle_irq,
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