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ARM: dts: meson8: add the canvas module 

Add the canvas module to Meson8 because it's required for the VPU
(video output) and video decoders.

The canvas module is located inside thie "DMC bus" (where also some of
the memory controller registers are located). The "DMC bus" itself is
part of the so-called "MMC bus".

Amlogic's vendor kernel has an explicit #define for the "DMC" register
range on Meson8m2 while there's no such #define for Meson8. However, the
canvas and memory controller registers on Meson8 are all expressed as
"0x6000 + actual offset", while Meson8m2 uses "DMC + actual offset".
Thus it's safe to assume that the DMC bus exists on both SoCs even
though the registers inside are slightly different.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
alistair/sunxi64-5.4-dsi
Martin Blumenstingl 2019-05-20 21:43:51 +02:00 committed by Kevin Hilman
parent a188339ca5
commit 47b5818239
1 changed files with 22 additions and 0 deletions
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22
arch/arm/boot/dts/meson8.dtsi
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@ -228,6 +228,28 @@
};
};
mmcbus: bus@c8000000 {
compatible = "simple-bus";
reg = <0xc8000000 0x8000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xc8000000 0x8000>;
dmcbus: bus@6000 {
compatible = "simple-bus";
reg = <0x6000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x6000 0x400>;
canvas: video-lut@20 {
compatible = "amlogic,meson8-canvas",
"amlogic,canvas";
reg = <0x20 0x14>;
};
};
};
apb: bus@d0000000 {
compatible = "simple-bus";
reg = <0xd0000000 0x200000>;