net: dsa: sja1105: Add logic for TX timestamping
On TX, timestamping is performed synchronously from the port_deferred_xmit worker thread. In management routes, the switch is requested to take egress timestamps (again partial), which are reconstructed and appended to a clone of the skb that was just sent. The cloning is done by DSA and we retrieve the pointer from the structure that DSA keeps in skb->cb. Then these clones are enqueued to the socket's error queue for application-level processing. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>alistair/sunxi64-5.4-dsi
Vladimir Oltean
David S. Miller
parent
bb77f36ac2
commit
47ed985e97
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@ -33,6 +33,7 @@ struct sja1105_regs {
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u64 ptpclk;
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u64 ptpclkrate;
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u64 ptptsclk;
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u64 ptpegr_ts[SJA1105_NUM_PORTS];
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u64 pad_mii_tx[SJA1105_NUM_PORTS];
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u64 cgu_idiv[SJA1105_NUM_PORTS];
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u64 rgmii_pad_mii_tx[SJA1105_NUM_PORTS];
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@ -56,6 +57,15 @@ struct sja1105_info {
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* switch core and device_id)
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*/
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u64 part_no;
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/* E/T and P/Q/R/S have partial timestamps of different sizes.
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* They must be reconstructed on both families anyway to get the full
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* 64-bit values back.
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*/
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int ptp_ts_bits;
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/* Also SPI commands are of different sizes to retrieve
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* the egress timestamps.
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*/
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int ptpegr_ts_bytes;
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const struct sja1105_dynamic_table_ops *dyn_ops;
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const struct sja1105_table_ops *static_ops;
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const struct sja1105_regs *regs;
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@ -1565,7 +1565,7 @@ static int sja1105_setup(struct dsa_switch *ds)
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}
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static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,
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struct sk_buff *skb)
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struct sk_buff *skb, bool takets)
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{
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struct sja1105_mgmt_entry mgmt_route = {0};
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struct sja1105_private *priv = ds->priv;
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@ -1578,6 +1578,8 @@ static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,
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mgmt_route.macaddr = ether_addr_to_u64(hdr->h_dest);
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mgmt_route.destports = BIT(port);
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mgmt_route.enfport = 1;
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mgmt_route.tsreg = 0;
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mgmt_route.takets = takets;
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rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
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slot, &mgmt_route, true);
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@ -1629,7 +1631,11 @@ static netdev_tx_t sja1105_port_deferred_xmit(struct dsa_switch *ds, int port,
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{
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struct sja1105_private *priv = ds->priv;
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struct sja1105_port *sp = &priv->ports[port];
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struct skb_shared_hwtstamps shwt = {0};
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int slot = sp->mgmt_slot;
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struct sk_buff *clone;
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u64 now, ts;
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int rc;
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/* The tragic fact about the switch having 4x2 slots for installing
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* management routes is that all of them except one are actually
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@ -1647,8 +1653,36 @@ static netdev_tx_t sja1105_port_deferred_xmit(struct dsa_switch *ds, int port,
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*/
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mutex_lock(&priv->mgmt_lock);
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sja1105_mgmt_xmit(ds, port, slot, skb);
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/* The clone, if there, was made by dsa_skb_tx_timestamp */
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clone = DSA_SKB_CB(skb)->clone;
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sja1105_mgmt_xmit(ds, port, slot, skb, !!clone);
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if (!clone)
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goto out;
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skb_shinfo(clone)->tx_flags |= SKBTX_IN_PROGRESS;
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mutex_lock(&priv->ptp_lock);
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now = priv->tstamp_cc.read(&priv->tstamp_cc);
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rc = sja1105_ptpegr_ts_poll(priv, slot, &ts);
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if (rc < 0) {
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dev_err(ds->dev, "xmit: timed out polling for tstamp\n");
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kfree_skb(clone);
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goto out_unlock_ptp;
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}
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ts = sja1105_tstamp_reconstruct(priv, now, ts);
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ts = timecounter_cyc2time(&priv->tstamp_tc, ts);
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shwt.hwtstamp = ns_to_ktime(ts);
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skb_complete_tx_timestamp(clone, &shwt);
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out_unlock_ptp:
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mutex_unlock(&priv->ptp_lock);
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out:
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mutex_unlock(&priv->mgmt_lock);
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return NETDEV_TX_OK;
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}
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@ -1677,6 +1711,22 @@ static int sja1105_set_ageing_time(struct dsa_switch *ds,
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return sja1105_static_config_reload(priv);
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}
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/* Called from dsa_skb_tx_timestamp. This callback is just to make DSA clone
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* the skb and have it available in DSA_SKB_CB in the .port_deferred_xmit
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* callback, where we will timestamp it synchronously.
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*/
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bool sja1105_port_txtstamp(struct dsa_switch *ds, int port,
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struct sk_buff *skb, unsigned int type)
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{
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struct sja1105_private *priv = ds->priv;
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struct sja1105_port *sp = &priv->ports[port];
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if (!sp->hwts_tx_en)
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return false;
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return true;
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}
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static const struct dsa_switch_ops sja1105_switch_ops = {
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.get_tag_protocol = sja1105_get_tag_protocol,
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.setup = sja1105_setup,
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@ -1701,6 +1751,7 @@ static const struct dsa_switch_ops sja1105_switch_ops = {
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.port_mdb_add = sja1105_mdb_add,
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.port_mdb_del = sja1105_mdb_del,
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.port_deferred_xmit = sja1105_port_deferred_xmit,
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.port_txtstamp = sja1105_port_txtstamp,
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};
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static int sja1105_check_device_id(struct sja1105_private *priv)
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@ -113,6 +113,112 @@ int sja1105pqrs_ptp_cmd(const void *ctx, const void *data)
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}
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EXPORT_SYMBOL_GPL(sja1105pqrs_ptp_cmd);
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/* The switch returns partial timestamps (24 bits for SJA1105 E/T, which wrap
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* around in 0.135 seconds, and 32 bits for P/Q/R/S, wrapping around in 34.35
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* seconds).
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*
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* This receives the RX or TX MAC timestamps, provided by hardware as
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* the lower bits of the cycle counter, sampled at the time the timestamp was
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* collected.
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*
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* To reconstruct into a full 64-bit-wide timestamp, the cycle counter is
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* read and the high-order bits are filled in.
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*
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* Must be called within one wraparound period of the partial timestamp since
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* it was generated by the MAC.
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*/
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u64 sja1105_tstamp_reconstruct(struct sja1105_private *priv, u64 now,
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u64 ts_partial)
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{
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u64 partial_tstamp_mask = CYCLECOUNTER_MASK(priv->info->ptp_ts_bits);
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u64 ts_reconstructed;
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ts_reconstructed = (now & ~partial_tstamp_mask) | ts_partial;
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/* Check lower bits of current cycle counter against the timestamp.
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* If the current cycle counter is lower than the partial timestamp,
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* then wraparound surely occurred and must be accounted for.
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*/
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if ((now & partial_tstamp_mask) <= ts_partial)
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ts_reconstructed -= (partial_tstamp_mask + 1);
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return ts_reconstructed;
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}
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EXPORT_SYMBOL_GPL(sja1105_tstamp_reconstruct);
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/* Reads the SPI interface for an egress timestamp generated by the switch
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* for frames sent using management routes.
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*
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* SJA1105 E/T layout of the 4-byte SPI payload:
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*
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* 31 23 15 7 0
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* | | | | |
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* +-----+-----+-----+ ^
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* ^ |
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* | |
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* 24-bit timestamp Update bit
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*
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*
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* SJA1105 P/Q/R/S layout of the 8-byte SPI payload:
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*
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* 31 23 15 7 0 63 55 47 39 32
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* | | | | | | | | | |
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* ^ +-----+-----+-----+-----+
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* | ^
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* | |
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* Update bit 32-bit timestamp
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*
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* Notice that the update bit is in the same place.
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* To have common code for E/T and P/Q/R/S for reading the timestamp,
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* we need to juggle with the offset and the bit indices.
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*/
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int sja1105_ptpegr_ts_poll(struct sja1105_private *priv, int port, u64 *ts)
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{
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const struct sja1105_regs *regs = priv->info->regs;
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int tstamp_bit_start, tstamp_bit_end;
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int timeout = 10;
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u8 packed_buf[8];
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u64 update;
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int rc;
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do {
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rc = sja1105_spi_send_packed_buf(priv, SPI_READ,
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regs->ptpegr_ts[port],
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packed_buf,
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priv->info->ptpegr_ts_bytes);
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if (rc < 0)
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return rc;
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sja1105_unpack(packed_buf, &update, 0, 0,
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priv->info->ptpegr_ts_bytes);
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if (update)
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break;
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usleep_range(10, 50);
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} while (--timeout);
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if (!timeout)
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return -ETIMEDOUT;
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/* Point the end bit to the second 32-bit word on P/Q/R/S,
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* no-op on E/T.
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*/
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tstamp_bit_end = (priv->info->ptpegr_ts_bytes - 4) * 8;
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/* Shift the 24-bit timestamp on E/T to be collected from 31:8.
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* No-op on P/Q/R/S.
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*/
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tstamp_bit_end += 32 - priv->info->ptp_ts_bits;
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tstamp_bit_start = tstamp_bit_end + priv->info->ptp_ts_bits - 1;
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*ts = 0;
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sja1105_unpack(packed_buf, ts, tstamp_bit_start, tstamp_bit_end,
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priv->info->ptpegr_ts_bytes);
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return 0;
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}
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EXPORT_SYMBOL_GPL(sja1105_ptpegr_ts_poll);
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int sja1105_ptp_reset(struct sja1105_private *priv)
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{
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struct dsa_switch *ds = priv->ds;
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@ -10,6 +10,8 @@ int sja1105_ptp_clock_register(struct sja1105_private *priv);
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void sja1105_ptp_clock_unregister(struct sja1105_private *priv);
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int sja1105_ptpegr_ts_poll(struct sja1105_private *priv, int port, u64 *ts);
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int sja1105et_ptp_cmd(const void *ctx, const void *data);
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int sja1105pqrs_ptp_cmd(const void *ctx, const void *data);
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@ -17,6 +19,9 @@ int sja1105pqrs_ptp_cmd(const void *ctx, const void *data);
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int sja1105_get_ts_info(struct dsa_switch *ds, int port,
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struct ethtool_ts_info *ts);
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u64 sja1105_tstamp_reconstruct(struct sja1105_private *priv, u64 now,
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u64 ts_partial);
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int sja1105_ptp_reset(struct sja1105_private *priv);
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#else
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@ -31,6 +36,18 @@ static inline void sja1105_ptp_clock_unregister(struct sja1105_private *priv)
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return;
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}
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static inline int
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sja1105_ptpegr_ts_poll(struct sja1105_private *priv, int port, u64 *ts)
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{
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return 0;
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}
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static inline u64 sja1105_tstamp_reconstruct(struct sja1105_private *priv,
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u64 now, u64 ts_partial)
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{
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return 0;
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}
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static inline int sja1105_ptp_reset(struct sja1105_private *priv)
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{
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return 0;
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@ -514,6 +514,7 @@ static struct sja1105_regs sja1105et_regs = {
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.rgmii_tx_clk = {0x100016, 0x10001D, 0x100024, 0x10002B, 0x100032},
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.rmii_ref_clk = {0x100015, 0x10001C, 0x100023, 0x10002A, 0x100031},
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.rmii_ext_tx_clk = {0x100018, 0x10001F, 0x100026, 0x10002D, 0x100034},
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.ptpegr_ts = {0xC0, 0xC2, 0xC4, 0xC6, 0xC8},
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.ptp_control = 0x17,
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.ptpclk = 0x18, /* Spans 0x18 to 0x19 */
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.ptpclkrate = 0x1A,
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@ -544,6 +545,7 @@ static struct sja1105_regs sja1105pqrs_regs = {
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.rmii_ref_clk = {0x100015, 0x10001B, 0x100021, 0x100027, 0x10002D},
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.rmii_ext_tx_clk = {0x100017, 0x10001D, 0x100023, 0x100029, 0x10002F},
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.qlevel = {0x604, 0x614, 0x624, 0x634, 0x644},
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.ptpegr_ts = {0xC0, 0xC4, 0xC8, 0xCC, 0xD0},
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.ptp_control = 0x18,
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.ptpclk = 0x19,
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.ptpclkrate = 0x1B,
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@ -555,6 +557,8 @@ struct sja1105_info sja1105e_info = {
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.part_no = SJA1105ET_PART_NO,
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.static_ops = sja1105e_table_ops,
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.dyn_ops = sja1105et_dyn_ops,
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.ptp_ts_bits = 24,
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.ptpegr_ts_bytes = 4,
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.reset_cmd = sja1105et_reset_cmd,
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.fdb_add_cmd = sja1105et_fdb_add,
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.fdb_del_cmd = sja1105et_fdb_del,
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@ -567,6 +571,8 @@ struct sja1105_info sja1105t_info = {
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.part_no = SJA1105ET_PART_NO,
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.static_ops = sja1105t_table_ops,
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.dyn_ops = sja1105et_dyn_ops,
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.ptp_ts_bits = 24,
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.ptpegr_ts_bytes = 4,
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.reset_cmd = sja1105et_reset_cmd,
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.fdb_add_cmd = sja1105et_fdb_add,
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.fdb_del_cmd = sja1105et_fdb_del,
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@ -579,6 +585,8 @@ struct sja1105_info sja1105p_info = {
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.part_no = SJA1105P_PART_NO,
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.static_ops = sja1105p_table_ops,
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.dyn_ops = sja1105pqrs_dyn_ops,
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.ptp_ts_bits = 32,
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.ptpegr_ts_bytes = 8,
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.reset_cmd = sja1105pqrs_reset_cmd,
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.fdb_add_cmd = sja1105pqrs_fdb_add,
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.fdb_del_cmd = sja1105pqrs_fdb_del,
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@ -591,6 +599,8 @@ struct sja1105_info sja1105q_info = {
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.part_no = SJA1105Q_PART_NO,
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.static_ops = sja1105q_table_ops,
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.dyn_ops = sja1105pqrs_dyn_ops,
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.ptp_ts_bits = 32,
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.ptpegr_ts_bytes = 8,
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.reset_cmd = sja1105pqrs_reset_cmd,
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.fdb_add_cmd = sja1105pqrs_fdb_add,
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.fdb_del_cmd = sja1105pqrs_fdb_del,
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@ -603,6 +613,8 @@ struct sja1105_info sja1105r_info = {
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.part_no = SJA1105R_PART_NO,
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.static_ops = sja1105r_table_ops,
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.dyn_ops = sja1105pqrs_dyn_ops,
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.ptp_ts_bits = 32,
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.ptpegr_ts_bytes = 8,
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.reset_cmd = sja1105pqrs_reset_cmd,
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.fdb_add_cmd = sja1105pqrs_fdb_add,
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.fdb_del_cmd = sja1105pqrs_fdb_del,
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@ -616,6 +628,8 @@ struct sja1105_info sja1105s_info = {
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.static_ops = sja1105s_table_ops,
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.dyn_ops = sja1105pqrs_dyn_ops,
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.regs = &sja1105pqrs_regs,
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.ptp_ts_bits = 32,
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.ptpegr_ts_bytes = 8,
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.reset_cmd = sja1105pqrs_reset_cmd,
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.fdb_add_cmd = sja1105pqrs_fdb_add,
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.fdb_del_cmd = sja1105pqrs_fdb_del,
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@ -22,6 +22,7 @@
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struct sja1105_port {
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struct dsa_port *dp;
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bool hwts_tx_en;
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int mgmt_slot;
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};
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