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drm/radeon: fix sclk DS enablement 

Only enable it for levels 0 and 1.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
hifive-unleashed-5.1
Alex Deucher 2014-11-07 13:06:57 -05:00
parent d3052b8ce8
commit 489ba72c1e
1 changed files with 2 additions and 0 deletions
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2
drivers/gpu/drm/radeon/ci_dpm.c
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@ -2872,6 +2872,8 @@ static int ci_populate_all_graphic_levels(struct radeon_device *rdev)
&pi->smc_state_table.GraphicsLevel[i]);
if (ret)
return ret;
if (i > 1)
pi->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0;
if (i == (dpm_table->sclk_table.count - 1))
pi->smc_state_table.GraphicsLevel[i].DisplayWatermark =
PPSMC_DISPLAY_WATERMARK_HIGH;