dmaengine/amba-pl08x: Simplify pl08x_ensure_on()
Simply writing 1 on bit 0 is sufficient instead of reading and clearing bits. Also as per manual, for bit 3-31 of DMACConfiguration register: "read undefined, write as 0" So, we must not rely on values read from this registers bit 3-31. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -1502,13 +1502,7 @@ bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
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*/
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static void pl08x_ensure_on(struct pl08x_driver_data *pl08x)
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{
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u32 val;
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val = readl(pl08x->base + PL080_CONFIG);
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val &= ~(PL080_CONFIG_M2_BE | PL080_CONFIG_M1_BE | PL080_CONFIG_ENABLE);
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/* We implicitly clear bit 1 and that means little-endian mode */
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val |= PL080_CONFIG_ENABLE;
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writel(val, pl08x->base + PL080_CONFIG);
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writel(PL080_CONFIG_ENABLE, pl08x->base + PL080_CONFIG);
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}
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static void pl08x_unmap_buffers(struct pl08x_txd *txd)
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