media: rcar-vin: enable support for r8a7795
Add the SoC specific information for Renesas r8a7795 ES1.x and ES2.0. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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@ -6,7 +6,7 @@ config VIDEO_RCAR_VIN
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select V4L2_FWNODE
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---help---
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Support for Renesas R-Car Video Input (VIN) driver.
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Supports R-Car Gen2 SoCs.
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Supports R-Car Gen2 and Gen3 SoCs.
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To compile this driver as a module, choose M here: the
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module will be called rcar-vin.
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@ -21,6 +21,7 @@
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/sys_soc.h>
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#include <media/v4l2-async.h>
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#include <media/v4l2-fwnode.h>
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@ -832,6 +833,104 @@ static const struct rvin_info rcar_info_gen2 = {
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.max_height = 2048,
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};
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static const struct rvin_group_route rcar_info_r8a7795_routes[] = {
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{ .csi = RVIN_CSI40, .channel = 0, .vin = 0, .mask = BIT(0) | BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 0, .mask = BIT(1) | BIT(4) },
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{ .csi = RVIN_CSI40, .channel = 1, .vin = 0, .mask = BIT(2) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 1, .mask = BIT(0) },
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{ .csi = RVIN_CSI40, .channel = 1, .vin = 1, .mask = BIT(1) | BIT(3) },
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{ .csi = RVIN_CSI40, .channel = 0, .vin = 1, .mask = BIT(2) },
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{ .csi = RVIN_CSI20, .channel = 1, .vin = 1, .mask = BIT(4) },
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{ .csi = RVIN_CSI20, .channel = 1, .vin = 2, .mask = BIT(0) },
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{ .csi = RVIN_CSI40, .channel = 0, .vin = 2, .mask = BIT(1) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 2, .mask = BIT(2) },
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{ .csi = RVIN_CSI40, .channel = 2, .vin = 2, .mask = BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 2, .vin = 2, .mask = BIT(4) },
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{ .csi = RVIN_CSI40, .channel = 1, .vin = 3, .mask = BIT(0) },
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{ .csi = RVIN_CSI20, .channel = 1, .vin = 3, .mask = BIT(1) | BIT(2) },
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{ .csi = RVIN_CSI40, .channel = 3, .vin = 3, .mask = BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 3, .vin = 3, .mask = BIT(4) },
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{ .csi = RVIN_CSI41, .channel = 0, .vin = 4, .mask = BIT(0) | BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 4, .mask = BIT(1) | BIT(4) },
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{ .csi = RVIN_CSI41, .channel = 1, .vin = 4, .mask = BIT(2) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 5, .mask = BIT(0) },
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{ .csi = RVIN_CSI41, .channel = 1, .vin = 5, .mask = BIT(1) | BIT(3) },
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{ .csi = RVIN_CSI41, .channel = 0, .vin = 5, .mask = BIT(2) },
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{ .csi = RVIN_CSI20, .channel = 1, .vin = 5, .mask = BIT(4) },
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{ .csi = RVIN_CSI20, .channel = 1, .vin = 6, .mask = BIT(0) },
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{ .csi = RVIN_CSI41, .channel = 0, .vin = 6, .mask = BIT(1) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 6, .mask = BIT(2) },
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{ .csi = RVIN_CSI41, .channel = 2, .vin = 6, .mask = BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 2, .vin = 6, .mask = BIT(4) },
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{ .csi = RVIN_CSI41, .channel = 1, .vin = 7, .mask = BIT(0) },
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{ .csi = RVIN_CSI20, .channel = 1, .vin = 7, .mask = BIT(1) | BIT(2) },
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{ .csi = RVIN_CSI41, .channel = 3, .vin = 7, .mask = BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 3, .vin = 7, .mask = BIT(4) },
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{ /* Sentinel */ }
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};
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static const struct rvin_info rcar_info_r8a7795 = {
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.model = RCAR_GEN3,
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.use_mc = true,
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.max_width = 4096,
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.max_height = 4096,
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.routes = rcar_info_r8a7795_routes,
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};
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static const struct rvin_group_route rcar_info_r8a7795es1_routes[] = {
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{ .csi = RVIN_CSI40, .channel = 0, .vin = 0, .mask = BIT(0) | BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 0, .mask = BIT(1) | BIT(4) },
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{ .csi = RVIN_CSI21, .channel = 0, .vin = 0, .mask = BIT(2) | BIT(5) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 1, .mask = BIT(0) },
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{ .csi = RVIN_CSI21, .channel = 0, .vin = 1, .mask = BIT(1) },
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{ .csi = RVIN_CSI40, .channel = 0, .vin = 1, .mask = BIT(2) },
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{ .csi = RVIN_CSI40, .channel = 1, .vin = 1, .mask = BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 1, .vin = 1, .mask = BIT(4) },
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{ .csi = RVIN_CSI21, .channel = 1, .vin = 1, .mask = BIT(5) },
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{ .csi = RVIN_CSI21, .channel = 0, .vin = 2, .mask = BIT(0) },
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{ .csi = RVIN_CSI40, .channel = 0, .vin = 2, .mask = BIT(1) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 2, .mask = BIT(2) },
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{ .csi = RVIN_CSI40, .channel = 2, .vin = 2, .mask = BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 2, .vin = 2, .mask = BIT(4) },
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{ .csi = RVIN_CSI21, .channel = 2, .vin = 2, .mask = BIT(5) },
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{ .csi = RVIN_CSI40, .channel = 1, .vin = 3, .mask = BIT(0) },
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{ .csi = RVIN_CSI20, .channel = 1, .vin = 3, .mask = BIT(1) },
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{ .csi = RVIN_CSI21, .channel = 1, .vin = 3, .mask = BIT(2) },
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{ .csi = RVIN_CSI40, .channel = 3, .vin = 3, .mask = BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 3, .vin = 3, .mask = BIT(4) },
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{ .csi = RVIN_CSI21, .channel = 3, .vin = 3, .mask = BIT(5) },
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{ .csi = RVIN_CSI41, .channel = 0, .vin = 4, .mask = BIT(0) | BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 4, .mask = BIT(1) | BIT(4) },
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{ .csi = RVIN_CSI21, .channel = 0, .vin = 4, .mask = BIT(2) | BIT(5) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 5, .mask = BIT(0) },
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{ .csi = RVIN_CSI21, .channel = 0, .vin = 5, .mask = BIT(1) },
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{ .csi = RVIN_CSI41, .channel = 0, .vin = 5, .mask = BIT(2) },
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{ .csi = RVIN_CSI41, .channel = 1, .vin = 5, .mask = BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 1, .vin = 5, .mask = BIT(4) },
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{ .csi = RVIN_CSI21, .channel = 1, .vin = 5, .mask = BIT(5) },
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{ .csi = RVIN_CSI21, .channel = 0, .vin = 6, .mask = BIT(0) },
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{ .csi = RVIN_CSI41, .channel = 0, .vin = 6, .mask = BIT(1) },
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{ .csi = RVIN_CSI20, .channel = 0, .vin = 6, .mask = BIT(2) },
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{ .csi = RVIN_CSI41, .channel = 2, .vin = 6, .mask = BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 2, .vin = 6, .mask = BIT(4) },
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{ .csi = RVIN_CSI21, .channel = 2, .vin = 6, .mask = BIT(5) },
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{ .csi = RVIN_CSI41, .channel = 1, .vin = 7, .mask = BIT(0) },
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{ .csi = RVIN_CSI20, .channel = 1, .vin = 7, .mask = BIT(1) },
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{ .csi = RVIN_CSI21, .channel = 1, .vin = 7, .mask = BIT(2) },
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{ .csi = RVIN_CSI41, .channel = 3, .vin = 7, .mask = BIT(3) },
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{ .csi = RVIN_CSI20, .channel = 3, .vin = 7, .mask = BIT(4) },
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{ .csi = RVIN_CSI21, .channel = 3, .vin = 7, .mask = BIT(5) },
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{ /* Sentinel */ }
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};
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static const struct rvin_info rcar_info_r8a7795es1 = {
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.model = RCAR_GEN3,
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.use_mc = true,
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.max_width = 4096,
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.max_height = 4096,
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.routes = rcar_info_r8a7795es1_routes,
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};
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static const struct of_device_id rvin_of_id_table[] = {
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{
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.compatible = "renesas,vin-r8a7778",
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@ -861,12 +960,25 @@ static const struct of_device_id rvin_of_id_table[] = {
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.compatible = "renesas,rcar-gen2-vin",
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.data = &rcar_info_gen2,
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},
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{
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.compatible = "renesas,vin-r8a7795",
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.data = &rcar_info_r8a7795,
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},
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{ /* Sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, rvin_of_id_table);
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static const struct soc_device_attribute r8a7795es1[] = {
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{
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.soc_id = "r8a7795", .revision = "ES1.*",
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.data = &rcar_info_r8a7795es1,
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},
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{ /* Sentinel */ }
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};
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static int rcar_vin_probe(struct platform_device *pdev)
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{
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const struct soc_device_attribute *attr;
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struct rvin_dev *vin;
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struct resource *mem;
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int irq, ret;
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@ -878,6 +990,14 @@ static int rcar_vin_probe(struct platform_device *pdev)
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vin->dev = &pdev->dev;
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vin->info = of_device_get_match_data(&pdev->dev);
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/*
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* Special care is needed on r8a7795 ES1.x since it
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* uses different routing than r8a7795 ES2.0.
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*/
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attr = soc_device_match(r8a7795es1);
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if (attr)
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vin->info = attr->data;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (mem == NULL)
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return -EINVAL;
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