MIPS: ingenic: Hardcode mem size for qi,lb60 board
Old Device Tree for the qi,lb60 (aka. Ben Nanonote) did not have a 'memory' node. The kernel would then read the memory controller registers to know how much RAM was available. Since every other supported board has had a 'memory' node from the beginning, we can just hardcode a RAM size of 32 MiB when running with an old Device Tree without the 'memory' node. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -14,6 +14,7 @@
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#include <linux/of_clk.h>
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#include <linux/of_clk.h>
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#include <linux/of_fdt.h>
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#include <linux/of_fdt.h>
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#include <linux/pm.h>
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#include <linux/pm.h>
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#include <linux/sizes.h>
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#include <linux/suspend.h>
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#include <linux/suspend.h>
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#include <asm/bootinfo.h>
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#include <asm/bootinfo.h>
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@ -22,31 +23,6 @@
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#include <asm/reboot.h>
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#include <asm/reboot.h>
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#include <asm/time.h>
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#include <asm/time.h>
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#define JZ4740_EMC_BASE_ADDR 0x13010000
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#define JZ4740_EMC_SDRAM_CTRL 0x80
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static void __init jz4740_detect_mem(void)
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{
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void __iomem *jz_emc_base;
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u32 ctrl, bus, bank, rows, cols;
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phys_addr_t size;
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jz_emc_base = ioremap(JZ4740_EMC_BASE_ADDR, 0x100);
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ctrl = readl(jz_emc_base + JZ4740_EMC_SDRAM_CTRL);
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bus = 2 - ((ctrl >> 31) & 1);
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bank = 1 + ((ctrl >> 19) & 1);
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cols = 8 + ((ctrl >> 26) & 7);
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rows = 11 + ((ctrl >> 20) & 3);
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printk(KERN_DEBUG
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"SDRAM preconfigured: bus:%u bank:%u rows:%u cols:%u\n",
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bus, bank, rows, cols);
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iounmap(jz_emc_base);
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size = 1 << (bus + bank + cols + rows);
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add_memory_region(0, size, BOOT_MEM_RAM);
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}
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static unsigned long __init get_board_mach_type(const void *fdt)
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static unsigned long __init get_board_mach_type(const void *fdt)
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{
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{
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if (!fdt_node_check_compatible(fdt, 0, "ingenic,x2000"))
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if (!fdt_node_check_compatible(fdt, 0, "ingenic,x2000"))
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@ -68,13 +44,16 @@ static unsigned long __init get_board_mach_type(const void *fdt)
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void __init plat_mem_setup(void)
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void __init plat_mem_setup(void)
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{
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{
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void *dtb = (void *)fw_passed_dtb;
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void *dtb = (void *)fw_passed_dtb;
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int offset;
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__dt_setup_arch(dtb);
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__dt_setup_arch(dtb);
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offset = fdt_path_offset(dtb, "/memory");
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/*
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if (offset < 0)
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* Old devicetree files for the qi,lb60 board did not have a /memory
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jz4740_detect_mem();
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* node. Hardcode the memory info here.
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*/
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if (!fdt_node_check_compatible(dtb, 0, "qi,lb60") &&
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fdt_path_offset(dtb, "/memory") < 0)
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early_init_dt_add_memory_arch(0, SZ_32M);
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mips_machtype = get_board_mach_type(dtb);
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mips_machtype = get_board_mach_type(dtb);
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}
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}
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