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omap1: mmc: Add platform init for omap7xx 

The MMC mux pins normally used by omap chips in devices.c
are different from what is needed by omap7xx chips.  This
change adds a conditional around the mux setup code to
enable the correct mux pins.

The omap730 and omap850 both use a different clock for the "fck"
clock of the MMC interface than other omap processors based on the
SOFT_REQ_REG, pin 12.  The "ick" clock is the same as that used
by other omap processors.

* Added the missing clock definition as mmc3_ck to clock.h
* Added the clock definition to omap_clks in clock.c
* Added CK_7XX to the mmci-omap.0 "ick" clock already in clock.c

With these changes, it is now possible to initialize and use MMC
cards with omap730 and omap850 devices.

Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
hifive-unleashed-5.1
Cory Maccarrone 2009-11-22 10:10:50 -08:00 committed by Tony Lindgren
parent d9f5007491
commit 490a566522
5 changed files with 35 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/mach-omap1/clock.c
View File

@ -125,7 +125,8 @@ static struct omap_clk omap_clks[] = {
CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310),
CLK(NULL, "bclk", &bclk_16xx, CK_16XX),
CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310),
CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
CLK("mmci-omap.0", "fck", &mmc3_ck, CK_7XX),
CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX),
CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX),
/* Virtual clocks */

12
arch/arm/mach-omap1/clock.h
View File

@ -637,6 +637,18 @@ static struct clk mmc2_ck = {
.enable_bit = 20,
};
static struct clk mmc3_ck = {
.name = "mmc_ck",
.id = 2,
.ops = &clkops_generic,
/* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk,
.rate = 48000000,
.flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 12,
};
static struct clk virtual_ck_mpu = {
.name = "mpu",
.ops = &clkops_null,

15
arch/arm/mach-omap1/devices.c
View File

@ -108,15 +108,22 @@ static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
int controller_nr)
{
if (controller_nr == 0) {
omap_cfg_reg(MMC_CMD);
omap_cfg_reg(MMC_CLK);
omap_cfg_reg(MMC_DAT0);
if (cpu_is_omap7xx()) {
omap_cfg_reg(MMC_7XX_CMD);
omap_cfg_reg(MMC_7XX_CLK);
omap_cfg_reg(MMC_7XX_DAT0);
} else {
omap_cfg_reg(MMC_CMD);
omap_cfg_reg(MMC_CLK);
omap_cfg_reg(MMC_DAT0);
}
if (cpu_is_omap1710()) {
omap_cfg_reg(M15_1710_MMC_CLKI);
omap_cfg_reg(P19_1710_MMC_CMDDIR);
omap_cfg_reg(P20_1710_MMC_DATDIR0);
}
if (mmc_controller->slots[0].wires == 4) {
if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
omap_cfg_reg(MMC_DAT1);
/* NOTE: DAT2 can be on W10 (here) or M15 */
if (!mmc_controller->slots[0].nomux)

5
arch/arm/mach-omap1/mux.c
View File

@ -51,6 +51,11 @@ MUX_CFG_7XX("E3_7XX_KBC4", 13, 25, 0, 24, 1, 0)
MUX_CFG_7XX("AA17_7XX_USB_DM", 2, 21, 0, 20, 0, 0)
MUX_CFG_7XX("W16_7XX_USB_PU_EN", 2, 25, 0, 24, 0, 0)
MUX_CFG_7XX("W17_7XX_USB_VBUSI", 2, 29, 0, 28, 0, 0)
/* MMC Pins */
MUX_CFG_7XX("MMC_7XX_CMD", 2, 9, 0, 8, 1, 0)
MUX_CFG_7XX("MMC_7XX_CLK", 2, 13, 0, 12, 1, 0)
MUX_CFG_7XX("MMC_7XX_DAT0", 2, 17, 0, 16, 1, 0)
};
#define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins)
#else

5
arch/arm/plat-omap/include/plat/mux.h
View File

@ -219,6 +219,11 @@ enum omap7xx_index {
AA17_7XX_USB_DM,
W16_7XX_USB_PU_EN,
W17_7XX_USB_VBUSI,
/* MMC */
MMC_7XX_CMD,
MMC_7XX_CLK,
MMC_7XX_DAT0,
};
enum omap1xxx_index {