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dmaengine: tegra210-adma: Fix spelling 

Correct spelling of 'register' in Tegra210 ADMA driver.

Fixes: ded1f3db4c ("dmaengine: tegra210-adma: prepare for supporting newer Tegra chips")

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
hifive-unleashed-5.2
Jon Hunter 2019-05-16 16:53:54 +01:00 committed by Vinod Koul
parent 9ab59bf5dd
commit 492252493e
1 changed files with 1 additions and 1 deletions
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drivers/dma/tegra210-adma.c
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@ -95,7 +95,7 @@ struct tegra_adma;
* @global_int_clear: Register offset of DMA global interrupt clear.
* @ch_req_tx_shift: Register offset for AHUB transmit channel select.
* @ch_req_rx_shift: Register offset for AHUB receive channel select.
* @ch_base_offset: Reister offset of DMA channel registers.
* @ch_base_offset: Register offset of DMA channel registers.
* @ch_fifo_ctrl: Default value for channel FIFO CTRL register.
* @ch_req_mask: Mask for Tx or Rx channel select.
* @ch_req_max: Maximum number of Tx or Rx channels available.