x86/amd-iommu: Remove amd_iommu_pd_table
The data that was stored in this table is now available in dev->archdata.iommu. So this table is not longer necessary. This patch removes the remaining uses of that variable and removes it from the code. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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@ -457,9 +457,6 @@ extern unsigned amd_iommu_aperture_order;
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/* largest PCI device id we expect translation requests for */
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/* largest PCI device id we expect translation requests for */
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extern u16 amd_iommu_last_bdf;
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extern u16 amd_iommu_last_bdf;
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/* data structures for protection domain handling */
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extern struct protection_domain **amd_iommu_pd_table;
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/* allocation bitmap for domain ids */
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/* allocation bitmap for domain ids */
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extern unsigned long *amd_iommu_pd_alloc_bitmap;
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extern unsigned long *amd_iommu_pd_alloc_bitmap;
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@ -1309,8 +1309,6 @@ static void set_dte_entry(u16 devid, struct protection_domain *domain)
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{
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{
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u64 pte_root = virt_to_phys(domain->pt_root);
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u64 pte_root = virt_to_phys(domain->pt_root);
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BUG_ON(amd_iommu_pd_table[devid] != NULL);
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pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK)
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pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK)
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<< DEV_ENTRY_MODE_SHIFT;
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<< DEV_ENTRY_MODE_SHIFT;
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pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV;
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pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV;
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@ -1318,20 +1316,10 @@ static void set_dte_entry(u16 devid, struct protection_domain *domain)
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amd_iommu_dev_table[devid].data[2] = domain->id;
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amd_iommu_dev_table[devid].data[2] = domain->id;
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amd_iommu_dev_table[devid].data[1] = upper_32_bits(pte_root);
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amd_iommu_dev_table[devid].data[1] = upper_32_bits(pte_root);
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amd_iommu_dev_table[devid].data[0] = lower_32_bits(pte_root);
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amd_iommu_dev_table[devid].data[0] = lower_32_bits(pte_root);
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amd_iommu_pd_table[devid] = domain;
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}
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}
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static void clear_dte_entry(u16 devid)
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static void clear_dte_entry(u16 devid)
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{
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{
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struct protection_domain *domain = amd_iommu_pd_table[devid];
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BUG_ON(domain == NULL);
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/* remove domain from the lookup table */
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amd_iommu_pd_table[devid] = NULL;
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/* remove entry from the device table seen by the hardware */
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/* remove entry from the device table seen by the hardware */
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amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV;
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amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV;
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amd_iommu_dev_table[devid].data[1] = 0;
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amd_iommu_dev_table[devid].data[1] = 0;
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@ -1641,15 +1629,11 @@ static struct protection_domain *get_domain(struct device *dev)
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static void update_device_table(struct protection_domain *domain)
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static void update_device_table(struct protection_domain *domain)
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{
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{
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unsigned long flags;
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struct iommu_dev_data *dev_data;
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int i;
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for (i = 0; i <= amd_iommu_last_bdf; ++i) {
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list_for_each_entry(dev_data, &domain->dev_list, list) {
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if (amd_iommu_pd_table[i] != domain)
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u16 devid = get_device_id(dev_data->dev);
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continue;
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set_dte_entry(devid, domain);
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write_lock_irqsave(&amd_iommu_devtable_lock, flags);
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set_dte_entry(i, domain);
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write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
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}
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}
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}
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}
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@ -2259,14 +2243,17 @@ free_domains:
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static void cleanup_domain(struct protection_domain *domain)
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static void cleanup_domain(struct protection_domain *domain)
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{
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{
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struct iommu_dev_data *dev_data, *next;
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unsigned long flags;
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unsigned long flags;
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u16 devid;
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write_lock_irqsave(&amd_iommu_devtable_lock, flags);
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write_lock_irqsave(&amd_iommu_devtable_lock, flags);
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for (devid = 0; devid <= amd_iommu_last_bdf; ++devid)
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list_for_each_entry_safe(dev_data, next, &domain->dev_list, list) {
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if (amd_iommu_pd_table[devid] == domain)
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struct device *dev = dev_data->dev;
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clear_dte_entry(devid);
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do_detach(dev);
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atomic_set(&dev_data->bind, 0);
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}
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write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
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write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
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}
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}
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@ -164,12 +164,6 @@ u16 *amd_iommu_alias_table;
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*/
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*/
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struct amd_iommu **amd_iommu_rlookup_table;
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struct amd_iommu **amd_iommu_rlookup_table;
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/*
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* The pd table (protection domain table) is used to find the protection domain
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* data structure a device belongs to. Indexed with the PCI device id too.
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*/
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struct protection_domain **amd_iommu_pd_table;
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/*
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/*
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* AMD IOMMU allows up to 2^16 differend protection domains. This is a bitmap
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* AMD IOMMU allows up to 2^16 differend protection domains. This is a bitmap
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* to know which ones are already in use.
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* to know which ones are already in use.
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@ -1238,15 +1232,6 @@ static int __init amd_iommu_init(void)
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if (amd_iommu_rlookup_table == NULL)
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if (amd_iommu_rlookup_table == NULL)
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goto free;
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goto free;
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/*
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* Protection Domain table - maps devices to protection domains
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* This table has the same size as the rlookup_table
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*/
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amd_iommu_pd_table = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
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get_order(rlookup_table_size));
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if (amd_iommu_pd_table == NULL)
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goto free;
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amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages(
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amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages(
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GFP_KERNEL | __GFP_ZERO,
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GFP_KERNEL | __GFP_ZERO,
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get_order(MAX_DOMAIN_ID/8));
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get_order(MAX_DOMAIN_ID/8));
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@ -1314,9 +1299,6 @@ free:
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free_pages((unsigned long)amd_iommu_pd_alloc_bitmap,
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free_pages((unsigned long)amd_iommu_pd_alloc_bitmap,
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get_order(MAX_DOMAIN_ID/8));
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get_order(MAX_DOMAIN_ID/8));
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free_pages((unsigned long)amd_iommu_pd_table,
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get_order(rlookup_table_size));
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free_pages((unsigned long)amd_iommu_rlookup_table,
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free_pages((unsigned long)amd_iommu_rlookup_table,
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get_order(rlookup_table_size));
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get_order(rlookup_table_size));
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