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Merge branch 'for-rmk' of git://git.marvell.com/orion

hifive-unleashed-5.1
Russell King 2008-08-09 18:03:13 +01:00 committed by Russell King
parent f0af7245f1 18365d181f
commit 492c71dd54
42 changed files with 575 additions and 52 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm/configs/orion5x_defconfig
View File

@ -757,7 +757,14 @@ CONFIG_INPUT_EVDEV=y
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
@ -1111,11 +1118,11 @@ CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_RS5C372=y
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
CONFIG_RTC_DRV_PCF8563=y
# CONFIG_RTC_DRV_PCF8583 is not set
CONFIG_RTC_DRV_M41T80=y
# CONFIG_RTC_DRV_M41T80_WDT is not set
# CONFIG_RTC_DRV_S35390A is not set
CONFIG_RTC_DRV_S35390A=y
#
# SPI RTC drivers

8
arch/arm/include/asm/memory.h
View File

@ -149,6 +149,14 @@
#define arch_adjust_zones(node,size,holes) do { } while (0)
#endif
/*
* Amount of memory reserved for the vmalloc() area, and minimum
* address for vmalloc mappings.
*/
extern unsigned long vmalloc_reserve;
#define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve)
/*
* PFNs are used to describe any physical page; this means
* PFN 0 == physical address 0.

13
arch/arm/kernel/setup.c
View File

@ -81,6 +81,8 @@ EXPORT_SYMBOL(system_serial_high);
unsigned int elf_hwcap;
EXPORT_SYMBOL(elf_hwcap);
unsigned long __initdata vmalloc_reserve = 128 << 20;
#ifdef MULTI_CPU
struct processor processor;
@ -500,6 +502,17 @@ static void __init early_mem(char **p)
}
__early_param("mem=", early_mem);
/*
* vmalloc=size forces the vmalloc area to be exactly 'size'
* bytes. This can be used to increase (or decrease) the vmalloc
* area - the default is 128m.
*/
static void __init early_vmalloc(char **arg)
{
vmalloc_reserve = memparse(*arg, arg);
}
__early_param("vmalloc=", early_vmalloc);
/*
* Initial parsing of the command line.
*/

247
arch/arm/mach-kirkwood/common.c
View File

@ -15,15 +15,17 @@
#include <linux/mbus.h>
#include <linux/mv643xx_eth.h>
#include <linux/ata_platform.h>
#include <linux/spi/orion_spi.h>
#include <asm/page.h>
#include <asm/timex.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/kirkwood.h>
#include <asm/plat-orion/cache-feroceon-l2.h>
#include <asm/plat-orion/ehci-orion.h>
#include <asm/plat-orion/orion_nand.h>
#include <asm/plat-orion/time.h>
#include <plat/cache-feroceon-l2.h>
#include <plat/ehci-orion.h>
#include <plat/mv_xor.h>
#include <plat/orion_nand.h>
#include <plat/time.h>
#include "common.h"
/*****************************************************************************
@ -195,6 +197,37 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
}
/*****************************************************************************
* SPI
****************************************************************************/
static struct orion_spi_info kirkwood_spi_plat_data = {
.tclk = KIRKWOOD_TCLK,
};
static struct resource kirkwood_spi_resources[] = {
{
.start = SPI_PHYS_BASE,
.end = SPI_PHYS_BASE + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device kirkwood_spi = {
.name = "orion_spi",
.id = 0,
.resource = kirkwood_spi_resources,
.dev = {
.platform_data = &kirkwood_spi_plat_data,
},
.num_resources = ARRAY_SIZE(kirkwood_spi_resources),
};
void __init kirkwood_spi_init()
{
platform_device_register(&kirkwood_spi);
}
/*****************************************************************************
* UART0
****************************************************************************/
@ -283,6 +316,212 @@ void __init kirkwood_uart1_init(void)
}
/*****************************************************************************
* XOR
****************************************************************************/
static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
.dram = &kirkwood_mbus_dram_info,
};
static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK;
/*****************************************************************************
* XOR0
****************************************************************************/
static struct resource kirkwood_xor0_shared_resources[] = {
{
.name = "xor 0 low",
.start = XOR0_PHYS_BASE,
.end = XOR0_PHYS_BASE + 0xff,
.flags = IORESOURCE_MEM,
}, {
.name = "xor 0 high",
.start = XOR0_HIGH_PHYS_BASE,
.end = XOR0_HIGH_PHYS_BASE + 0xff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device kirkwood_xor0_shared = {
.name = MV_XOR_SHARED_NAME,
.id = 0,
.dev = {
.platform_data = &kirkwood_xor_shared_data,
},
.num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
.resource = kirkwood_xor0_shared_resources,
};
static struct resource kirkwood_xor00_resources[] = {
[0] = {
.start = IRQ_KIRKWOOD_XOR_00,
.end = IRQ_KIRKWOOD_XOR_00,
.flags = IORESOURCE_IRQ,
},
};
static struct mv_xor_platform_data kirkwood_xor00_data = {
.shared = &kirkwood_xor0_shared,
.hw_id = 0,
.pool_size = PAGE_SIZE,
};
static struct platform_device kirkwood_xor00_channel = {
.name = MV_XOR_NAME,
.id = 0,
.num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
.resource = kirkwood_xor00_resources,
.dev = {
.dma_mask = &kirkwood_xor_dmamask,
.coherent_dma_mask = DMA_64BIT_MASK,
.platform_data = (void *)&kirkwood_xor00_data,
},
};
static struct resource kirkwood_xor01_resources[] = {
[0] = {
.start = IRQ_KIRKWOOD_XOR_01,
.end = IRQ_KIRKWOOD_XOR_01,
.flags = IORESOURCE_IRQ,
},
};
static struct mv_xor_platform_data kirkwood_xor01_data = {
.shared = &kirkwood_xor0_shared,
.hw_id = 1,
.pool_size = PAGE_SIZE,
};
static struct platform_device kirkwood_xor01_channel = {
.name = MV_XOR_NAME,
.id = 1,
.num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
.resource = kirkwood_xor01_resources,
.dev = {
.dma_mask = &kirkwood_xor_dmamask,
.coherent_dma_mask = DMA_64BIT_MASK,
.platform_data = (void *)&kirkwood_xor01_data,
},
};
void __init kirkwood_xor0_init(void)
{
platform_device_register(&kirkwood_xor0_shared);
/*
* two engines can't do memset simultaneously, this limitation
* satisfied by removing memset support from one of the engines.
*/
dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
platform_device_register(&kirkwood_xor00_channel);
dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
platform_device_register(&kirkwood_xor01_channel);
}
/*****************************************************************************
* XOR1
****************************************************************************/
static struct resource kirkwood_xor1_shared_resources[] = {
{
.name = "xor 1 low",
.start = XOR1_PHYS_BASE,
.end = XOR1_PHYS_BASE + 0xff,
.flags = IORESOURCE_MEM,
}, {
.name = "xor 1 high",
.start = XOR1_HIGH_PHYS_BASE,
.end = XOR1_HIGH_PHYS_BASE + 0xff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device kirkwood_xor1_shared = {
.name = MV_XOR_SHARED_NAME,
.id = 1,
.dev = {
.platform_data = &kirkwood_xor_shared_data,
},
.num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
.resource = kirkwood_xor1_shared_resources,
};
static struct resource kirkwood_xor10_resources[] = {
[0] = {
.start = IRQ_KIRKWOOD_XOR_10,
.end = IRQ_KIRKWOOD_XOR_10,
.flags = IORESOURCE_IRQ,
},
};
static struct mv_xor_platform_data kirkwood_xor10_data = {
.shared = &kirkwood_xor1_shared,
.hw_id = 0,
.pool_size = PAGE_SIZE,
};
static struct platform_device kirkwood_xor10_channel = {
.name = MV_XOR_NAME,
.id = 2,
.num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
.resource = kirkwood_xor10_resources,
.dev = {
.dma_mask = &kirkwood_xor_dmamask,
.coherent_dma_mask = DMA_64BIT_MASK,
.platform_data = (void *)&kirkwood_xor10_data,
},
};
static struct resource kirkwood_xor11_resources[] = {
[0] = {
.start = IRQ_KIRKWOOD_XOR_11,
.end = IRQ_KIRKWOOD_XOR_11,
.flags = IORESOURCE_IRQ,
},
};
static struct mv_xor_platform_data kirkwood_xor11_data = {
.shared = &kirkwood_xor1_shared,
.hw_id = 1,
.pool_size = PAGE_SIZE,
};
static struct platform_device kirkwood_xor11_channel = {
.name = MV_XOR_NAME,
.id = 3,
.num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
.resource = kirkwood_xor11_resources,
.dev = {
.dma_mask = &kirkwood_xor_dmamask,
.coherent_dma_mask = DMA_64BIT_MASK,
.platform_data = (void *)&kirkwood_xor11_data,
},
};
void __init kirkwood_xor1_init(void)
{
platform_device_register(&kirkwood_xor1_shared);
/*
* two engines can't do memset simultaneously, this limitation
* satisfied by removing memset support from one of the engines.
*/
dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
platform_device_register(&kirkwood_xor10_channel);
dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
platform_device_register(&kirkwood_xor11_channel);
}
/*****************************************************************************
* Time handling
****************************************************************************/

3
arch/arm/mach-kirkwood/common.h
View File

@ -33,8 +33,11 @@ void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data);
void kirkwood_pcie_init(void);
void kirkwood_rtc_init(void);
void kirkwood_sata_init(struct mv_sata_platform_data *sata_data);
void kirkwood_spi_init(void);
void kirkwood_uart0_init(void);
void kirkwood_uart1_init(void);
void kirkwood_xor0_init(void);
void kirkwood_xor1_init(void);
extern struct sys_timer kirkwood_timer;

9
arch/arm/mach-kirkwood/include/mach/kirkwood.h
View File

@ -88,6 +88,15 @@
#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
#define XOR0_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60800)
#define XOR0_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60800)
#define XOR1_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60900)
#define XOR1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60900)
#define XOR0_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60A00)
#define XOR0_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60A00)
#define XOR1_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60B00)
#define XOR1_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60B00)
#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x70000)
#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000)

2
arch/arm/mach-kirkwood/irq.c
View File

@ -12,7 +12,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/plat-orion/irq.h>
#include <plat/irq.h>
#include "common.h"
void __init kirkwood_init_irq(void)

2
arch/arm/mach-kirkwood/pcie.c
View File

@ -12,7 +12,7 @@
#include <linux/pci.h>
#include <linux/mbus.h>
#include <asm/mach/pci.h>
#include <asm/plat-orion/pcie.h>
#include <plat/pcie.h>
#include "common.h"

23
arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
View File

@ -18,6 +18,9 @@
#include <linux/timer.h>
#include <linux/ata_platform.h>
#include <linux/mv643xx_eth.h>
#include <linux/spi/flash.h>
#include <linux/spi/spi.h>
#include <linux/spi/orion_spi.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
@ -34,6 +37,21 @@ static struct mv_sata_platform_data rd88f6192_sata_data = {
.n_ports = 2,
};
static const struct flash_platform_data rd88F6192_spi_slave_data = {
.type = "m25p128",
};
static struct spi_board_info __initdata rd88F6192_spi_slave_info[] = {
{
.modalias = "m25p80",
.platform_data = &rd88F6192_spi_slave_data,
.irq = -1,
.max_speed_hz = 20000000,
.bus_num = 0,
.chip_select = 0,
},
};
static void __init rd88f6192_init(void)
{
/*
@ -45,7 +63,12 @@ static void __init rd88f6192_init(void)
kirkwood_ge00_init(&rd88f6192_ge00_data);
kirkwood_rtc_init();
kirkwood_sata_init(&rd88f6192_sata_data);
spi_register_board_info(rd88F6192_spi_slave_info,
ARRAY_SIZE(rd88F6192_spi_slave_info));
kirkwood_spi_init();
kirkwood_uart0_init();
kirkwood_xor0_init();
kirkwood_xor1_init();
}
static int __init rd88f6192_pci_init(void)

2
arch/arm/mach-kirkwood/rd88f6281-setup.c
View File

@ -23,7 +23,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/kirkwood.h>
#include <asm/plat-orion/orion_nand.h>
#include <plat/orion_nand.h>
#include "common.h"
static struct mtd_partition rd88f6281_nand_parts[] = {

4
arch/arm/mach-loki/common.c
View File

@ -19,8 +19,8 @@
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/loki.h>
#include <asm/plat-orion/orion_nand.h>
#include <asm/plat-orion/time.h>
#include <plat/orion_nand.h>
#include <plat/time.h>
#include "common.h"
/*****************************************************************************

2
arch/arm/mach-loki/irq.c
View File

@ -12,7 +12,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/plat-orion/irq.h>
#include <plat/irq.h>
#include "common.h"
void __init loki_init_irq(void)

8
arch/arm/mach-mv78xx0/common.c
View File

@ -18,10 +18,10 @@
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/mv78xx0.h>
#include <asm/plat-orion/cache-feroceon-l2.h>
#include <asm/plat-orion/ehci-orion.h>
#include <asm/plat-orion/orion_nand.h>
#include <asm/plat-orion/time.h>
#include <plat/cache-feroceon-l2.h>
#include <plat/ehci-orion.h>
#include <plat/orion_nand.h>
#include <plat/time.h>
#include "common.h"

2
arch/arm/mach-mv78xx0/irq.c
View File

@ -12,7 +12,7 @@
#include <linux/init.h>
#include <linux/pci.h>
#include <mach/mv78xx0.h>
#include <asm/plat-orion/irq.h>
#include <plat/irq.h>
#include "common.h"
void __init mv78xx0_init_irq(void)

2
arch/arm/mach-mv78xx0/pcie.c
View File

@ -12,7 +12,7 @@
#include <linux/pci.h>
#include <linux/mbus.h>
#include <asm/mach/pci.h>
#include <asm/plat-orion/pcie.h>
#include <plat/pcie.h>
#include "common.h"
struct pcie_port {

115
arch/arm/mach-orion5x/common.c
View File

@ -26,9 +26,10 @@
#include <asm/mach/time.h>
#include <mach/hardware.h>
#include <mach/orion5x.h>
#include <asm/plat-orion/ehci-orion.h>
#include <asm/plat-orion/orion_nand.h>
#include <asm/plat-orion/time.h>
#include <plat/ehci-orion.h>
#include <plat/mv_xor.h>
#include <plat/orion_nand.h>
#include <plat/time.h>
#include "common.h"
/*****************************************************************************
@ -354,6 +355,103 @@ void __init orion5x_uart1_init(void)
}
/*****************************************************************************
* XOR engine
****************************************************************************/
static struct resource orion5x_xor_shared_resources[] = {
{
.name = "xor low",
.start = ORION5X_XOR_PHYS_BASE,
.end = ORION5X_XOR_PHYS_BASE + 0xff,
.flags = IORESOURCE_MEM,
}, {
.name = "xor high",
.start = ORION5X_XOR_PHYS_BASE + 0x200,
.end = ORION5X_XOR_PHYS_BASE + 0x2ff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device orion5x_xor_shared = {
.name = MV_XOR_SHARED_NAME,
.id = 0,
.num_resources = ARRAY_SIZE(orion5x_xor_shared_resources),
.resource = orion5x_xor_shared_resources,
};
static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
static struct resource orion5x_xor0_resources[] = {
[0] = {
.start = IRQ_ORION5X_XOR0,
.end = IRQ_ORION5X_XOR0,
.flags = IORESOURCE_IRQ,
},
};
static struct mv_xor_platform_data orion5x_xor0_data = {
.shared = &orion5x_xor_shared,
.hw_id = 0,
.pool_size = PAGE_SIZE,
};
static struct platform_device orion5x_xor0_channel = {
.name = MV_XOR_NAME,
.id = 0,
.num_resources = ARRAY_SIZE(orion5x_xor0_resources),
.resource = orion5x_xor0_resources,
.dev = {
.dma_mask = &orion5x_xor_dmamask,
.coherent_dma_mask = DMA_64BIT_MASK,
.platform_data = (void *)&orion5x_xor0_data,
},
};
static struct resource orion5x_xor1_resources[] = {
[0] = {
.start = IRQ_ORION5X_XOR1,
.end = IRQ_ORION5X_XOR1,
.flags = IORESOURCE_IRQ,
},
};
static struct mv_xor_platform_data orion5x_xor1_data = {
.shared = &orion5x_xor_shared,
.hw_id = 1,
.pool_size = PAGE_SIZE,
};
static struct platform_device orion5x_xor1_channel = {
.name = MV_XOR_NAME,
.id = 1,
.num_resources = ARRAY_SIZE(orion5x_xor1_resources),
.resource = orion5x_xor1_resources,
.dev = {
.dma_mask = &orion5x_xor_dmamask,
.coherent_dma_mask = DMA_64BIT_MASK,
.platform_data = (void *)&orion5x_xor1_data,
},
};
void __init orion5x_xor_init(void)
{
platform_device_register(&orion5x_xor_shared);
/*
* two engines can't do memset simultaneously, this limitation
* satisfied by removing memset support from one of the engines.
*/
dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
platform_device_register(&orion5x_xor0_channel);
dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
platform_device_register(&orion5x_xor1_channel);
}
/*****************************************************************************
* Time handling
****************************************************************************/
@ -382,6 +480,8 @@ static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
*dev_name = "MV88F5281-D2";
} else if (*rev == MV88F5281_REV_D1) {
*dev_name = "MV88F5281-D1";
} else if (*rev == MV88F5281_REV_D0) {
*dev_name = "MV88F5281-D0";
} else {
*dev_name = "MV88F5281-Rev-Unsupported";
}
@ -416,6 +516,15 @@ void __init orion5x_init(void)
* Setup Orion address map
*/
orion5x_setup_cpu_mbus_bridge();
/*
* Don't issue "Wait for Interrupt" instruction if we are
* running on D0 5281 silicon.
*/
if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
disable_hlt();
}
}
/*

1
arch/arm/mach-orion5x/common.h
View File

@ -32,6 +32,7 @@ void orion5x_i2c_init(void);
void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
void orion5x_uart0_init(void);
void orion5x_uart1_init(void);
void orion5x_xor_init(void);
/*
* PCIe/PCI functions.

2
arch/arm/mach-orion5x/db88f5281-setup.c
View File

@ -25,7 +25,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include <asm/plat-orion/orion_nand.h>
#include <plat/orion_nand.h>
#include "common.h"
#include "mpp.h"

5
arch/arm/mach-orion5x/include/mach/orion5x.h
View File

@ -73,6 +73,7 @@
#define MV88F5182_REV_A2 2
/* Orion-2 (88F5281) */
#define MV88F5281_DEV_ID 0x5281
#define MV88F5281_REV_D0 4
#define MV88F5281_REV_D1 5
#define MV88F5281_REV_D2 6
@ -105,6 +106,10 @@
#define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x50000)
#define ORION5X_USB0_REG(x) (ORION5X_USB0_VIRT_BASE | (x))
#define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x60900)
#define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x60900)
#define ORION5X_XOR_REG(x) (ORION5X_XOR_VIRT_BASE | (x))
#define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x70000)
#define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x70000)
#define ORION5X_ETH_REG(x) (ORION5X_ETH_VIRT_BASE | (x))

2
arch/arm/mach-orion5x/irq.c
View File

@ -16,7 +16,7 @@
#include <asm/gpio.h>
#include <asm/io.h>
#include <mach/orion5x.h>
#include <asm/plat-orion/irq.h>
#include <plat/irq.h>
#include "common.h"
/*****************************************************************************

3
arch/arm/mach-orion5x/kurobox_pro-setup.c
View File

@ -25,7 +25,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include <asm/plat-orion/orion_nand.h>
#include <plat/orion_nand.h>
#include "common.h"
#include "mpp.h"
@ -356,6 +356,7 @@ static void __init kurobox_pro_init(void)
orion5x_sata_init(&kurobox_pro_sata_data);
orion5x_uart0_init();
orion5x_uart1_init();
orion5x_xor_init();
orion5x_setup_dev_boot_win(KUROBOX_PRO_NOR_BOOT_BASE,
KUROBOX_PRO_NOR_BOOT_SIZE);

1
arch/arm/mach-orion5x/mss2-setup.c
View File

@ -239,6 +239,7 @@ static void __init mss2_init(void)
orion5x_i2c_init();
orion5x_sata_init(&mss2_sata_data);
orion5x_uart0_init();
orion5x_xor_init();
orion5x_setup_dev_boot_win(MSS2_NOR_BOOT_BASE, MSS2_NOR_BOOT_SIZE);
platform_device_register(&mss2_nor_flash);

1
arch/arm/mach-orion5x/mv2120-setup.c
View File

@ -203,6 +203,7 @@ static void __init mv2120_init(void)
orion5x_i2c_init();
orion5x_sata_init(&mv2120_sata_data);
orion5x_uart0_init();
orion5x_xor_init();
orion5x_setup_dev_boot_win(MV2120_NOR_BOOT_BASE, MV2120_NOR_BOOT_SIZE);
platform_device_register(&mv2120_nor_flash);

2
arch/arm/mach-orion5x/pci.c
View File

@ -14,7 +14,7 @@
#include <linux/pci.h>
#include <linux/mbus.h>
#include <asm/mach/pci.h>
#include <asm/plat-orion/pcie.h>
#include <plat/pcie.h>
#include "common.h"
/*****************************************************************************

1
arch/arm/mach-orion5x/rd88f5182-setup.c
View File

@ -292,6 +292,7 @@ static void __init rd88f5182_init(void)
orion5x_i2c_init();
orion5x_sata_init(&rd88f5182_sata_data);
orion5x_uart0_init();
orion5x_xor_init();
orion5x_setup_dev_boot_win(RD88F5182_NOR_BOOT_BASE,
RD88F5182_NOR_BOOT_SIZE);

5
arch/arm/mach-orion5x/ts209-setup.c
View File

@ -207,12 +207,12 @@ static struct i2c_board_info __initdata qnap_ts209_i2c_rtc = {
static struct gpio_keys_button qnap_ts209_buttons[] = {
{
.code = KEY_RESTART,
.code = KEY_COPY,
.gpio = QNAP_TS209_GPIO_KEY_MEDIA,
.desc = "USB Copy Button",
.active_low = 1,
}, {
.code = KEY_POWER,
.code = KEY_RESTART,
.gpio = QNAP_TS209_GPIO_KEY_RESET,
.desc = "Reset Button",
.active_low = 1,
@ -296,6 +296,7 @@ static void __init qnap_ts209_init(void)
orion5x_i2c_init();
orion5x_sata_init(&qnap_ts209_sata_data);
orion5x_uart0_init();
orion5x_xor_init();
orion5x_setup_dev_boot_win(QNAP_TS209_NOR_BOOT_BASE,
QNAP_TS209_NOR_BOOT_SIZE);

48
arch/arm/mach-orion5x/ts409-setup.c
View File

@ -3,6 +3,9 @@
*
* Maintainer: Sylver Bruneau <sylver.bruneau@gmail.com>
*
* Copyright (C) 2008 Sylver Bruneau <sylver.bruneau@gmail.com>
* Copyright (C) 2008 Martin Michlmayr <tbm@cyrius.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
@ -16,6 +19,7 @@
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/leds.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/i2c.h>
@ -162,16 +166,59 @@ static struct i2c_board_info __initdata qnap_ts409_i2c_rtc = {
I2C_BOARD_INFO("s35390a", 0x30),
};
/*****************************************************************************
* LEDs attached to GPIO
****************************************************************************/
static struct gpio_led ts409_led_pins[] = {
{
.name = "ts409:red:sata1",
.gpio = 4,
.active_low = 1,
}, {
.name = "ts409:red:sata2",
.gpio = 5,
.active_low = 1,
}, {
.name = "ts409:red:sata3",
.gpio = 6,
.active_low = 1,
}, {
.name = "ts409:red:sata4",
.gpio = 7,
.active_low = 1,
},
};
static struct gpio_led_platform_data ts409_led_data = {
.leds = ts409_led_pins,
.num_leds = ARRAY_SIZE(ts409_led_pins),
};
static struct platform_device ts409_leds = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &ts409_led_data,
},
};
/****************************************************************************
* GPIO Attached Keys
* Power button is attached to the PIC microcontroller
****************************************************************************/
#define QNAP_TS409_GPIO_KEY_RESET 14
#define QNAP_TS409_GPIO_KEY_MEDIA 15
static struct gpio_keys_button qnap_ts409_buttons[] = {
{
.code = KEY_RESTART,
.gpio = QNAP_TS409_GPIO_KEY_RESET,
.desc = "Reset Button",
.active_low = 1,
}, {
.code = KEY_COPY,
.gpio = QNAP_TS409_GPIO_KEY_MEDIA,
.desc = "USB Copy Button",
.active_low = 1,
@ -255,6 +302,7 @@ static void __init qnap_ts409_init(void)
if (qnap_ts409_i2c_rtc.irq == 0)
pr_warning("qnap_ts409_init: failed to get RTC IRQ\n");
i2c_register_board_info(0, &qnap_ts409_i2c_rtc, 1);
platform_device_register(&ts409_leds);
/* register tsx09 specific power-off method */
pm_power_off = qnap_tsx09_power_off;

1
arch/arm/mach-orion5x/ts78xx-setup.c
View File

@ -256,6 +256,7 @@ static void __init ts78xx_init(void)
orion5x_sata_init(&ts78xx_sata_data);
orion5x_uart0_init();
orion5x_uart1_init();
orion5x_xor_init();
orion5x_setup_dev_boot_win(TS78XX_NOR_BOOT_BASE,
TS78XX_NOR_BOOT_SIZE);

2
arch/arm/mm/cache-feroceon-l2.c
View File

@ -14,7 +14,7 @@
#include <linux/init.h>
#include <asm/cacheflush.h>
#include <asm/plat-orion/cache-feroceon-l2.h>
#include <plat/cache-feroceon-l2.h>
/*

50
arch/arm/mm/mmu.c
View File

@ -568,6 +568,55 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
create_mapping(io_desc + i);
}
static int __init check_membank_valid(struct membank *mb)
{
/*
* Check whether this memory region has non-zero size.
*/
if (mb->size == 0)
return 0;
/*
* Check whether this memory region would entirely overlap
* the vmalloc area.
*/
if (phys_to_virt(mb->start) >= VMALLOC_MIN) {
printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "
"(vmalloc region overlap).\n",
mb->start, mb->start + mb->size - 1);
return 0;
}
/*
* Check whether this memory region would partially overlap
* the vmalloc area.
*/
if (phys_to_virt(mb->start + mb->size) < phys_to_virt(mb->start) ||
phys_to_virt(mb->start + mb->size) > VMALLOC_MIN) {
unsigned long newsize = VMALLOC_MIN - phys_to_virt(mb->start);
printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx "
"to -%.8lx (vmalloc region overlap).\n",
mb->start, mb->start + mb->size - 1,
mb->start + newsize - 1);
mb->size = newsize;
}
return 1;
}
static void __init sanity_check_meminfo(struct meminfo *mi)
{
int i;
int j;
for (i = 0, j = 0; i < mi->nr_banks; i++) {
if (check_membank_valid(&mi->bank[i]))
mi->bank[j++] = mi->bank[i];
}
mi->nr_banks = j;
}
static inline void prepare_page_table(struct meminfo *mi)
{
unsigned long addr;
@ -753,6 +802,7 @@ void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
void *zero_page;
build_mem_type_table();
sanity_check_meminfo(mi);
prepare_page_table(mi);
bootmem_init(mi);
devicemaps_init(mdesc);

2
include/asm-arm/plat-orion/cache-feroceon-l2.h → arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
View File

@ -1,5 +1,5 @@
/*
* include/asm-arm/plat-orion/cache-feroceon-l2.h
* arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
*
* Copyright (C) 2008 Marvell Semiconductor
*

6
include/asm-arm/plat-orion/ehci-orion.h → arch/arm/plat-orion/include/plat/ehci-orion.h
View File

@ -1,13 +1,13 @@
/*
* include/asm-arm/plat-orion/ehci-orion.h
* arch/arm/plat-orion/include/plat/ehci-orion.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_PLAT_ORION_EHCI_ORION_H
#define __ASM_PLAT_ORION_EHCI_ORION_H
#ifndef __PLAT_EHCI_ORION_H
#define __PLAT_EHCI_ORION_H
#include <linux/mbus.h>

6
include/asm-arm/plat-orion/irq.h → arch/arm/plat-orion/include/plat/irq.h
View File

@ -1,5 +1,5 @@
/*
* include/asm-arm/plat-orion/irq.h
* arch/arm/plat-orion/include/plat/irq.h
*
* Marvell Orion SoC IRQ handling.
*
@ -8,8 +8,8 @@
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_PLAT_ORION_IRQ_H
#define __ASM_PLAT_ORION_IRQ_H
#ifndef __PLAT_IRQ_H
#define __PLAT_IRQ_H
void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr);

6
include/asm-arm/plat-orion/mv_xor.h → arch/arm/plat-orion/include/plat/mv_xor.h
View File

@ -1,9 +1,11 @@
/*
* arch/arm/plat-orion/include/plat/mv_xor.h
*
* Marvell XOR platform device data definition file.
*/
#ifndef __ASM_PLAT_ORION_MV_XOR_H
#define __ASM_PLAT_ORION_MV_XOR_H
#ifndef __PLAT_MV_XOR_H
#define __PLAT_MV_XOR_H
#include <linux/dmaengine.h>
#include <linux/mbus.h>

6
include/asm-arm/plat-orion/orion_nand.h → arch/arm/plat-orion/include/plat/orion_nand.h
View File

@ -1,13 +1,13 @@
/*
* include/asm-arm/plat-orion/orion_nand.h
* arch/arm/plat-orion/include/plat/orion_nand.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_PLAT_ORION_ORION_NAND_H
#define __ASM_PLAT_ORION_ORION_NAND_H
#ifndef __PLAT_ORION_NAND_H
#define __PLAT_ORION_NAND_H
/*
* Device bus NAND private data

6
include/asm-arm/plat-orion/pcie.h → arch/arm/plat-orion/include/plat/pcie.h
View File

@ -1,5 +1,5 @@
/*
* include/asm-arm/plat-orion/pcie.h
* arch/arm/plat-orion/include/plat/pcie.h
*
* Marvell Orion SoC PCIe handling.
*
@ -8,8 +8,8 @@
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_PLAT_ORION_PCIE_H
#define __ASM_PLAT_ORION_PCIE_H
#ifndef __PLAT_PCIE_H
#define __PLAT_PCIE_H
u32 orion_pcie_dev_id(void __iomem *base);
u32 orion_pcie_rev(void __iomem *base);

6
include/asm-arm/plat-orion/time.h → arch/arm/plat-orion/include/plat/time.h
View File

@ -1,5 +1,5 @@
/*
* include/asm-arm/plat-orion/time.h
* arch/arm/plat-orion/include/plat/time.h
*
* Marvell Orion SoC time handling.
*
@ -8,8 +8,8 @@
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_PLAT_ORION_TIME_H
#define __ASM_PLAT_ORION_TIME_H
#ifndef __PLAT_TIME_H
#define __PLAT_TIME_H
void orion_time_init(unsigned int irq, unsigned int tclk);

2
arch/arm/plat-orion/irq.c
View File

@ -12,7 +12,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/plat-orion/irq.h>
#include <plat/irq.h>
static void orion_irq_mask(u32 irq)
{

2
arch/arm/plat-orion/pcie.c
View File

@ -12,7 +12,7 @@
#include <linux/pci.h>
#include <linux/mbus.h>
#include <asm/mach/pci.h>
#include <asm/plat-orion/pcie.h>
#include <plat/pcie.h>
/*
* PCIe unit register offsets.

2
drivers/dma/mv_xor.c
View File

@ -25,7 +25,7 @@
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/memory.h>
#include <asm/plat-orion/mv_xor.h>
#include <plat/mv_xor.h>
#include "mv_xor.h"
static void mv_xor_issue_pending(struct dma_chan *chan);

2
drivers/mtd/nand/orion_nand.c
View File

@ -19,7 +19,7 @@
#include <asm/io.h>
#include <asm/sizes.h>
#include <mach/hardware.h>
#include <asm/plat-orion/orion_nand.h>
#include <plat/orion_nand.h>
#ifdef CONFIG_MTD_CMDLINE_PARTS
static const char *part_probes[] = { "cmdlinepart", NULL };

2
drivers/usb/host/ehci-orion.c
View File

@ -12,7 +12,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/mbus.h>
#include <asm/plat-orion/ehci-orion.h>
#include <plat/ehci-orion.h>
#define rdl(off) __raw_readl(hcd->regs + (off))
#define wrl(off, val) __raw_writel((val), hcd->regs + (off))