fbdev fixes for 3.15:
- fix build errors for bf54x-lq043fb and imxfb - fbcon fix for da8xx-fb - omapdss fixes for hdmi audio, irq handling and fclk calculation -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTTkUEAAoJEPo9qoy8lh71ccsP/2i14uYSVkoEkNfYKXbL0zzx Tj9CZy1YD2AFtONvxEZM2R5du+bAxMlhAExXsA/+DMOwzT/v9UpWDZHpxaM9FSsG TwZGzxeWkRe0B69b/nkGgaYXmcQWD15JXItrBGsQP87ls9clRcC0S+aX5tMs62v/ 5C5NY2xVD49DrLjOU2GPxnuGS6dXIGXzZnvJg4CYsYArDfnab4FCFxw18bBuKWx/ PIA8lQDRFfZsN6rBj7WO0kBPO8+54ITEZbrjkH+xAjhyXFcS2AZ+uYWHkojmlXZa Q+k1kHp+fA1NlZiyrI//Ux5NsUcCQjt5q/K3nAjgOnsILf6iv8iY8p+NtvOHn0Dm UfQCHNLFQqv57XDl3bHpq6vYS0jTZ2syqE78MPz3C4OWwnE/7Tmor1BPfR9Z2zX3 pwRe87NABDC+SBP9XxkhKKFCKjViC+Cpn+OTEMiSib/dthJB18aLPyyQ9fI6/42p lEVTP5h5RPhY4E1jBFk+Mp1pOdO7Q2z4dxCyd9Ud4KRbtyAq9OJ4K5sPcvPUlQRk y2ffCO4UpYQqF0cVjtf1Fu41pbl9tQxcwnFVrzGyFc+dybhZa7gDYbgLB+Hec0nU HvyzqyxL6E2EAAXwsVuBa9Q6BR90nz7UA7oZXXY+Kq0wd81lcTMCFrkQnstPm7Jp HCtQLNgw13v1jRK8PUUI =ytBC -----END PGP SIGNATURE----- Merge tag 'fbdev-fixes-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux Pull fbdev fixes from Tomi Valkeinen: - fix build errors for bf54x-lq043fb and imxfb - fbcon fix for da8xx-fb - omapdss fixes for hdmi audio, irq handling and fclk calculation * tag 'fbdev-fixes-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: video: bf54x-lq043fb: fix build error OMAPDSS: Change struct reg_field to dispc_reg_field OMAPDSS: Take pixelclock unit change into account in hdmi_compute_acr() OMAPDSS: fix shared irq handlers video: imxfb: Select LCD_CLASS_DEVICE unconditionally OMAPDSS: fix rounding when calculating fclk rate video: da8xx-fb: Fix casting of info->pseudo_palette
This commit is contained in:
commit
498f96204f
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@ -359,6 +359,8 @@ config FB_SA1100
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config FB_IMX
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tristate "Freescale i.MX1/21/25/27 LCD support"
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depends on FB && ARCH_MXC
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select BACKLIGHT_LCD_SUPPORT
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select LCD_CLASS_DEVICE
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select FB_CFB_FILLRECT
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select FB_CFB_COPYAREA
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select FB_CFB_IMAGEBLIT
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@ -49,13 +49,13 @@
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#include <linux/spinlock.h>
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#include <linux/dma-mapping.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <asm/blackfin.h>
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#include <asm/irq.h>
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#include <asm/dpmc.h>
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#include <asm/dma-mapping.h>
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#include <asm/dma.h>
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#include <asm/gpio.h>
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#include <asm/portmux.h>
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#include <mach/bf54x-lq043.h>
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@ -663,15 +663,7 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,
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(green << info->var.green.offset) |
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(blue << info->var.blue.offset);
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switch (info->var.bits_per_pixel) {
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case 16:
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((u16 *) (info->pseudo_palette))[regno] = v;
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break;
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case 24:
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case 32:
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((u32 *) (info->pseudo_palette))[regno] = v;
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break;
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}
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((u32 *) (info->pseudo_palette))[regno] = v;
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if (palette[0] != 0x4000) {
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update_hw = 1;
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palette[0] = 0x4000;
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@ -101,6 +101,8 @@ static struct {
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void __iomem *base;
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int irq;
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irq_handler_t user_handler;
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void *user_data;
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unsigned long core_clk_rate;
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unsigned long tv_pclk_rate;
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@ -113,6 +115,8 @@ static struct {
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u32 ctx[DISPC_SZ_REGS / sizeof(u32)];
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const struct dispc_features *feat;
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bool is_enabled;
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} dispc;
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enum omap_color_component {
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@ -141,12 +145,18 @@ enum mgr_reg_fields {
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DISPC_MGR_FLD_NUM,
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};
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struct dispc_reg_field {
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u16 reg;
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u8 high;
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u8 low;
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};
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static const struct {
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const char *name;
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u32 vsync_irq;
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u32 framedone_irq;
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u32 sync_lost_irq;
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struct reg_field reg_desc[DISPC_MGR_FLD_NUM];
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struct dispc_reg_field reg_desc[DISPC_MGR_FLD_NUM];
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} mgr_desc[] = {
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[OMAP_DSS_CHANNEL_LCD] = {
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.name = "LCD",
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@ -238,13 +248,13 @@ static inline u32 dispc_read_reg(const u16 idx)
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static u32 mgr_fld_read(enum omap_channel channel, enum mgr_reg_fields regfld)
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{
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const struct reg_field rfld = mgr_desc[channel].reg_desc[regfld];
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const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld];
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return REG_GET(rfld.reg, rfld.high, rfld.low);
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}
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static void mgr_fld_write(enum omap_channel channel,
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enum mgr_reg_fields regfld, int val) {
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const struct reg_field rfld = mgr_desc[channel].reg_desc[regfld];
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const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld];
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REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low);
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}
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@ -3669,16 +3679,44 @@ static int __init dispc_init_features(struct platform_device *pdev)
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return 0;
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}
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static irqreturn_t dispc_irq_handler(int irq, void *arg)
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{
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if (!dispc.is_enabled)
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return IRQ_NONE;
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return dispc.user_handler(irq, dispc.user_data);
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}
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int dispc_request_irq(irq_handler_t handler, void *dev_id)
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{
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return devm_request_irq(&dispc.pdev->dev, dispc.irq, handler,
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IRQF_SHARED, "OMAP DISPC", dev_id);
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int r;
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if (dispc.user_handler != NULL)
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return -EBUSY;
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dispc.user_handler = handler;
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dispc.user_data = dev_id;
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/* ensure the dispc_irq_handler sees the values above */
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smp_wmb();
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r = devm_request_irq(&dispc.pdev->dev, dispc.irq, dispc_irq_handler,
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IRQF_SHARED, "OMAP DISPC", &dispc);
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if (r) {
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dispc.user_handler = NULL;
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dispc.user_data = NULL;
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}
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return r;
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}
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EXPORT_SYMBOL(dispc_request_irq);
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void dispc_free_irq(void *dev_id)
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{
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devm_free_irq(&dispc.pdev->dev, dispc.irq, dev_id);
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devm_free_irq(&dispc.pdev->dev, dispc.irq, &dispc);
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dispc.user_handler = NULL;
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dispc.user_data = NULL;
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}
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EXPORT_SYMBOL(dispc_free_irq);
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@ -3750,6 +3788,12 @@ static int __exit omap_dispchw_remove(struct platform_device *pdev)
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static int dispc_runtime_suspend(struct device *dev)
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{
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dispc.is_enabled = false;
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/* ensure the dispc_irq_handler sees the is_enabled value */
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smp_wmb();
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/* wait for current handler to finish before turning the DISPC off */
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synchronize_irq(dispc.irq);
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dispc_save_context();
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return 0;
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@ -3763,12 +3807,15 @@ static int dispc_runtime_resume(struct device *dev)
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* _omap_dispc_initial_config(). We can thus use it to detect if
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* we have lost register context.
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*/
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if (REG_GET(DISPC_CONFIG, 2, 1) == OMAP_DSS_LOAD_FRAME_ONLY)
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return 0;
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if (REG_GET(DISPC_CONFIG, 2, 1) != OMAP_DSS_LOAD_FRAME_ONLY) {
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_omap_dispc_initial_config();
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_omap_dispc_initial_config();
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dispc_restore_context();
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}
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dispc_restore_context();
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dispc.is_enabled = true;
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/* ensure the dispc_irq_handler sees the is_enabled value */
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smp_wmb();
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return 0;
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}
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@ -297,6 +297,8 @@ struct dsi_data {
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int irq;
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bool is_enabled;
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struct clk *dss_clk;
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struct clk *sys_clk;
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@ -795,6 +797,9 @@ static irqreturn_t omap_dsi_irq_handler(int irq, void *arg)
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dsidev = (struct platform_device *) arg;
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dsi = dsi_get_dsidrv_data(dsidev);
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if (!dsi->is_enabled)
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return IRQ_NONE;
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spin_lock(&dsi->irq_lock);
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irqstatus = dsi_read_reg(dsidev, DSI_IRQSTATUS);
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@ -5671,6 +5676,15 @@ static int __exit omap_dsihw_remove(struct platform_device *dsidev)
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static int dsi_runtime_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct dsi_data *dsi = dsi_get_dsidrv_data(pdev);
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dsi->is_enabled = false;
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/* ensure the irq handler sees the is_enabled value */
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smp_wmb();
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/* wait for current handler to finish before turning the DSI off */
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synchronize_irq(dsi->irq);
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dispc_runtime_put();
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return 0;
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@ -5678,12 +5692,18 @@ static int dsi_runtime_suspend(struct device *dev)
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static int dsi_runtime_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct dsi_data *dsi = dsi_get_dsidrv_data(pdev);
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int r;
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r = dispc_runtime_get();
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if (r)
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return r;
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dsi->is_enabled = true;
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/* ensure the irq handler sees the is_enabled value */
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smp_wmb();
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return 0;
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}
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@ -457,7 +457,7 @@ bool dss_div_calc(unsigned long pck, unsigned long fck_min,
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fckd_stop = max(DIV_ROUND_UP(prate * m, fck_hw_max), 1ul);
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for (fckd = fckd_start; fckd >= fckd_stop; --fckd) {
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fck = prate / fckd * m;
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fck = DIV_ROUND_UP(prate, fckd) * m;
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if (func(fck, data))
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return true;
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fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier,
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max_dss_fck);
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fck = prate / fck_div * dss.feat->dss_fck_multiplier;
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fck = DIV_ROUND_UP(prate, fck_div) * dss.feat->dss_fck_multiplier;
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}
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r = dss_set_fck_rate(fck);
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@ -131,12 +131,6 @@ struct dsi_clock_info {
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u16 lp_clk_div;
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};
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struct reg_field {
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u16 reg;
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u8 high;
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u8 low;
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};
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struct dss_lcd_mgr_config {
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enum dss_io_pad_mode io_pad_mode;
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@ -347,17 +347,17 @@ int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts)
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case 96000:
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case 192000:
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if (deep_color == 125)
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if (pclk == 27027 || pclk == 74250)
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if (pclk == 27027000 || pclk == 74250000)
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deep_color_correct = true;
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if (deep_color == 150)
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if (pclk == 27027)
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if (pclk == 27027000)
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deep_color_correct = true;
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break;
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case 44100:
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case 88200:
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case 176400:
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if (deep_color == 125)
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if (pclk == 27027)
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if (pclk == 27027000)
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deep_color_correct = true;
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break;
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default:
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}
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}
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/* Calculate CTS. See HDMI 1.3a or 1.4a specifications */
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*cts = pclk * (*n / 128) * deep_color / (sample_freq / 10);
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*cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10);
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return 0;
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}
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