rt2x00: rework RT chipset and revision determination for PCI an SOC devices.
The recent rt2800 devices are no longer really identified by their PCI ID's, but rather by the contents of their CSR0 register. Also for the other chipsets is the contents of this CSR0 register important. Change the chipset determination logic to be more aligned with the rt2800 model. Preparation for the support of rt3070 / rt3090 based devices. Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com> Acked-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
714fa66363
commit
49e721ec6c
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@ -1327,7 +1327,6 @@ static int rt2400pci_validate_eeprom(struct rt2x00_dev *rt2x00dev)
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static int rt2400pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
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{
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u32 reg;
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u16 chip;
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u16 value;
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u16 eeprom;
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@ -1336,17 +1335,13 @@ static int rt2400pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
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*/
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rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
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/*
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* Identify RT chipset.
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*/
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pci_read_config_word(to_pci_dev(rt2x00dev->dev), PCI_DEVICE_ID, &chip);
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/*
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* Identify RF chipset.
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*/
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value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
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rt2x00pci_register_read(rt2x00dev, CSR0, ®);
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rt2x00_set_chip(rt2x00dev, chip, value, reg);
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rt2x00_set_chip(rt2x00dev, RT2460, value,
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rt2x00_get_field32(reg, CSR0_REVISION));
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if (!rt2x00_rf(rt2x00dev, RF2420) && !rt2x00_rf(rt2x00dev, RF2421)) {
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ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
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@ -65,6 +65,7 @@
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* CSR0: ASIC revision number.
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*/
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#define CSR0 0x0000
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#define CSR0_REVISION FIELD32(0x0000ffff)
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/*
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* CSR1: System control register.
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@ -1490,7 +1490,6 @@ static int rt2500pci_validate_eeprom(struct rt2x00_dev *rt2x00dev)
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static int rt2500pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
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{
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u32 reg;
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u16 chip;
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u16 value;
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u16 eeprom;
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@ -1499,17 +1498,13 @@ static int rt2500pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
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*/
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rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
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/*
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* Identify RT chipset.
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*/
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pci_read_config_word(to_pci_dev(rt2x00dev->dev), PCI_DEVICE_ID, &chip);
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/*
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* Identify RF chipset.
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*/
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value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
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rt2x00pci_register_read(rt2x00dev, CSR0, ®);
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rt2x00_set_chip(rt2x00dev, chip, value, reg);
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rt2x00_set_chip(rt2x00dev, RT2560, value,
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rt2x00_get_field32(reg, CSR0_REVISION));
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if (!rt2x00_rf(rt2x00dev, RF2522) &&
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!rt2x00_rf(rt2x00dev, RF2523) &&
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@ -76,6 +76,7 @@
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* CSR0: ASIC revision number.
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*/
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#define CSR0 0x0000
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#define CSR0_REVISION FIELD32(0x0000ffff)
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/*
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* CSR1: System control register.
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@ -1409,8 +1409,7 @@ static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
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rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®);
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rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
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if (!rt2x00_check_rev(rt2x00dev, 0x000ffff0, 0) ||
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rt2x00_check_rev(rt2x00dev, 0x0000000f, 0)) {
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if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
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ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
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return -ENODEV;
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}
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@ -60,11 +60,11 @@
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/*
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* Chipset version.
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*/
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#define RT2860C_VERSION 0x28600100
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#define RT2860D_VERSION 0x28600101
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#define RT2880E_VERSION 0x28720200
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#define RT2883_VERSION 0x28830300
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#define RT3070_VERSION 0x30700200
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#define RT2860C_VERSION 0x0100
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#define RT2860D_VERSION 0x0101
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#define RT2880E_VERSION 0x0200
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#define RT2883_VERSION 0x0300
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#define RT3070_VERSION 0x0200
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/*
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* Signal information.
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@ -408,8 +408,8 @@
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* ASIC_VER: 2860 or 2870
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*/
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#define MAC_CSR0 0x1000
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#define MAC_CSR0_ASIC_REV FIELD32(0x0000ffff)
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#define MAC_CSR0_ASIC_VER FIELD32(0xffff0000)
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#define MAC_CSR0_REVISION FIELD32(0x0000ffff)
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#define MAC_CSR0_CHIPSET FIELD32(0xffff0000)
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/*
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* MAC_SYS_CTRL:
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@ -898,7 +898,8 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
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rt2800_bbp_write(rt2x00dev, 3, bbp);
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if (rt2x00_rev(rt2x00dev) == RT2860C_VERSION) {
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if (rt2x00_rt(rt2x00dev, RT2860) &&
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(rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) {
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if (conf_is_ht40(conf)) {
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rt2800_bbp_write(rt2x00dev, 69, 0x1a);
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rt2800_bbp_write(rt2x00dev, 70, 0x0a);
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@ -1061,7 +1062,8 @@ static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
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{
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if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
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if (rt2x00_is_usb(rt2x00dev) &&
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rt2x00_rev(rt2x00dev) == RT3070_VERSION)
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rt2x00_rt(rt2x00dev, RT3070) &&
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(rt2x00_rev(rt2x00dev) == RT3070_VERSION))
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return 0x1c + (2 * rt2x00dev->lna_gain);
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else
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return 0x2e + rt2x00dev->lna_gain;
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@ -1092,7 +1094,8 @@ EXPORT_SYMBOL_GPL(rt2800_reset_tuner);
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void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual,
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const u32 count)
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{
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if (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)
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if (rt2x00_rt(rt2x00dev, RT2860) &&
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(rt2x00_rev(rt2x00dev) == RT2860C_VERSION))
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return;
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/*
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@ -1178,7 +1181,8 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
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rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
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if (rt2x00_is_usb(rt2x00dev) &&
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rt2x00_rev(rt2x00dev) == RT3070_VERSION) {
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rt2x00_rt(rt2x00dev, RT3070) &&
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(rt2x00_rev(rt2x00dev) == RT3070_VERSION)) {
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rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
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rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
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rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
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@ -1205,8 +1209,14 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
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rt2800_register_read(rt2x00dev, MAX_LEN_CFG, ®);
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rt2x00_set_field32(®, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
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if (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION &&
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rt2x00_rev(rt2x00dev) < RT3070_VERSION)
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if ((rt2x00_rt(rt2x00dev, RT2872) &&
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(rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
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rt2x00_rt(rt2x00dev, RT2880) ||
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rt2x00_rt(rt2x00dev, RT2883) ||
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rt2x00_rt(rt2x00dev, RT2890) ||
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rt2x00_rt(rt2x00dev, RT3052) ||
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(rt2x00_rt(rt2x00dev, RT3070) &&
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(rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
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rt2x00_set_field32(®, MAX_LEN_CFG_MAX_PSDU, 2);
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else
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rt2x00_set_field32(®, MAX_LEN_CFG_MAX_PSDU, 1);
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@ -1485,16 +1495,19 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
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rt2800_bbp_write(rt2x00dev, 103, 0x00);
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rt2800_bbp_write(rt2x00dev, 105, 0x05);
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if (rt2x00_rev(rt2x00dev) == RT2860C_VERSION) {
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if (rt2x00_rt(rt2x00dev, RT2860) &&
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(rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) {
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rt2800_bbp_write(rt2x00dev, 69, 0x16);
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rt2800_bbp_write(rt2x00dev, 73, 0x12);
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}
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if (rt2x00_rev(rt2x00dev) > RT2860D_VERSION)
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if (rt2x00_rt(rt2x00dev, RT2860) &&
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(rt2x00_rev(rt2x00dev) > RT2860D_VERSION))
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rt2800_bbp_write(rt2x00dev, 84, 0x19);
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if (rt2x00_is_usb(rt2x00dev) &&
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rt2x00_rev(rt2x00dev) == RT3070_VERSION) {
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rt2x00_rt(rt2x00dev, RT3070) &&
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(rt2x00_rev(rt2x00dev) == RT3070_VERSION)) {
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rt2800_bbp_write(rt2x00dev, 70, 0x0a);
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rt2800_bbp_write(rt2x00dev, 84, 0x99);
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rt2800_bbp_write(rt2x00dev, 105, 0x05);
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@ -1586,7 +1599,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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u8 bbp;
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if (rt2x00_is_usb(rt2x00dev) &&
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rt2x00_rev(rt2x00dev) != RT3070_VERSION)
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rt2x00_rt(rt2x00dev, RT3070) &&
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(rt2x00_rev(rt2x00dev) != RT3070_VERSION))
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return 0;
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if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
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@ -1757,7 +1771,12 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
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rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820);
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rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
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EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
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} else if (rt2x00_rev(rt2x00dev) < RT2883_VERSION) {
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} else if (rt2x00_rt(rt2x00dev, RT2860) ||
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rt2x00_rt(rt2x00dev, RT2870) ||
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rt2x00_rt(rt2x00dev, RT2872) ||
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rt2x00_rt(rt2x00dev, RT2880) ||
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(rt2x00_rt(rt2x00dev, RT2883) &&
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(rt2x00_rev(rt2x00dev) < RT2883_VERSION))) {
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/*
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* There is a max of 2 RX streams for RT28x0 series
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*/
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@ -1842,7 +1861,6 @@ EXPORT_SYMBOL_GPL(rt2800_validate_eeprom);
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int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
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{
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u32 reg;
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u16 chip;
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u16 value;
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u16 eeprom;
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@ -1857,40 +1875,24 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
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value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
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rt2800_register_read(rt2x00dev, MAC_CSR0, ®);
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if (rt2x00_is_pci(rt2x00dev)) {
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#if defined(CONFIG_RT2X00_LIB_PCI) || defined(CONFIG_RT2X00_LIB_PCI_MODULE)
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pci_read_config_word(to_pci_dev(rt2x00dev->dev),
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PCI_DEVICE_ID,
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&chip);
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#else
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BUG();
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#endif
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} else if (rt2x00_is_usb(rt2x00dev)) {
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/*
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* The check for rt2860 is not a typo, some rt2870 hardware
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* identifies itself as rt2860 in the CSR register.
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*/
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if (((reg & 0xfff00000) == 0x28600000) ||
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((reg & 0xfff00000) == 0x28700000) ||
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((reg & 0xfff00000) == 0x28800000)) {
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chip = RT2870;
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} else if ((reg & 0xffff0000) == 0x30700000) {
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chip = RT3070;
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} else {
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ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
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return -ENODEV;
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}
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} else if (rt2x00_is_soc(rt2x00dev)) {
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#if defined(CONFIG_RALINK_RT288X)
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chip = RT2880;
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#elif defined(CONFIG_RALINK_RT305X)
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chip = RT3052;
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#else
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BUG();
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#endif
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}
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rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
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value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
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rt2x00_set_chip(rt2x00dev, chip, value, reg);
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if (!rt2x00_rt(rt2x00dev, RT2860) &&
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!rt2x00_rt(rt2x00dev, RT2870) &&
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!rt2x00_rt(rt2x00dev, RT2872) &&
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!rt2x00_rt(rt2x00dev, RT2880) &&
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!rt2x00_rt(rt2x00dev, RT2883) &&
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!rt2x00_rt(rt2x00dev, RT2890) &&
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!rt2x00_rt(rt2x00dev, RT3052) &&
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!rt2x00_rt(rt2x00dev, RT3070) &&
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!rt2x00_rt(rt2x00dev, RT3071) &&
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!rt2x00_rt(rt2x00dev, RT3090) &&
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!rt2x00_rt(rt2x00dev, RT3390) &&
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!rt2x00_rt(rt2x00dev, RT3572)) {
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ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
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return -ENODEV;
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}
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if (!rt2x00_rf(rt2x00dev, RF2820) &&
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!rt2x00_rf(rt2x00dev, RF2850) &&
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@ -92,7 +92,6 @@ static bool rt2800usb_check_crc(const u8 *data, const size_t len)
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static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
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const u8 *data, const size_t len)
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{
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u16 chipset = (rt2x00_rev(rt2x00dev) >> 16) & 0xffff;
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size_t offset = 0;
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/*
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@ -111,9 +110,9 @@ static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
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* Check if we need the upper 4kb firmware data or not.
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*/
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if ((len == 4096) &&
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(chipset != 0x2860) &&
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(chipset != 0x2872) &&
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(chipset != 0x3070))
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!rt2x00_rt(rt2x00dev, RT2860) &&
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!rt2x00_rt(rt2x00dev, RT2872) &&
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!rt2x00_rt(rt2x00dev, RT3070))
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return FW_BAD_VERSION;
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/*
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@ -138,14 +137,13 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
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u32 reg;
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u32 offset;
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u32 length;
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u16 chipset = (rt2x00_rev(rt2x00dev) >> 16) & 0xffff;
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/*
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* Check which section of the firmware we need.
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*/
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if ((chipset == 0x2860) ||
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(chipset == 0x2872) ||
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(chipset == 0x3070)) {
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if (rt2x00_rt(rt2x00dev, RT2860) ||
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rt2x00_rt(rt2x00dev, RT2872) ||
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rt2x00_rt(rt2x00dev, RT3070)) {
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offset = 0;
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length = 4096;
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} else {
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@ -200,9 +198,9 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
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*/
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rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0);
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if ((chipset == 0x3070) ||
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(chipset == 0x3071) ||
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(chipset == 0x3572)) {
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if (rt2x00_rt(rt2x00dev, RT3070) ||
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rt2x00_rt(rt2x00dev, RT3071) ||
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rt2x00_rt(rt2x00dev, RT3572)) {
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udelay(200);
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rt2800_mcu_request(rt2x00dev, MCU_CURRENT, 0, 0, 0);
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udelay(10);
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@ -170,25 +170,26 @@ enum rt2x00_chip_intf {
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*/
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struct rt2x00_chip {
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u16 rt;
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#define RT2460 0x0101
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#define RT2560 0x0201
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#define RT2570 0x1201
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#define RT2561s 0x0301 /* Turbo */
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#define RT2561 0x0302
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#define RT2661 0x0401
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#define RT2571 0x1300
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#define RT2860 0x0601 /* 2.4GHz PCI/CB */
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#define RT2860D 0x0681 /* 2.4GHz, 5GHz PCI/CB */
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#define RT2890 0x0701 /* 2.4GHz PCIe */
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#define RT2890D 0x0781 /* 2.4GHz, 5GHz PCIe */
|
||||
#define RT2460 0x2460
|
||||
#define RT2560 0x2560
|
||||
#define RT2570 0x2570
|
||||
#define RT2661 0x2661
|
||||
#define RT2573 0x2573
|
||||
#define RT2860 0x2860 /* 2.4GHz PCI/CB */
|
||||
#define RT2870 0x2870
|
||||
#define RT2872 0x2872
|
||||
#define RT2880 0x2880 /* WSOC */
|
||||
#define RT2883 0x2883 /* WSOC */
|
||||
#define RT2890 0x2890 /* 2.4GHz PCIe */
|
||||
#define RT3052 0x3052 /* WSOC */
|
||||
#define RT3070 0x3070
|
||||
#define RT3071 0x3071
|
||||
#define RT3090 0x3090 /* 2.4GHz PCIe */
|
||||
#define RT2870 0x1600
|
||||
#define RT3070 0x1800
|
||||
#define RT3390 0x3390
|
||||
#define RT3572 0x3572
|
||||
|
||||
u16 rf;
|
||||
u32 rev;
|
||||
u16 rev;
|
||||
|
||||
enum rt2x00_chip_intf intf;
|
||||
};
|
||||
|
@ -918,14 +919,14 @@ static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev,
|
|||
* Chipset handlers
|
||||
*/
|
||||
static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev,
|
||||
const u16 rt, const u16 rf, const u32 rev)
|
||||
const u16 rt, const u16 rf, const u16 rev)
|
||||
{
|
||||
rt2x00dev->chip.rt = rt;
|
||||
rt2x00dev->chip.rf = rf;
|
||||
rt2x00dev->chip.rev = rev;
|
||||
|
||||
INFO(rt2x00dev,
|
||||
"Chipset detected - rt: %04x, rf: %04x, rev: %08x.\n",
|
||||
"Chipset detected - rt: %04x, rf: %04x, rev: %04x.\n",
|
||||
rt2x00dev->chip.rt, rt2x00dev->chip.rf, rt2x00dev->chip.rev);
|
||||
}
|
||||
|
||||
|
@ -939,17 +940,11 @@ static inline char rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf)
|
|||
return (rt2x00dev->chip.rf == rf);
|
||||
}
|
||||
|
||||
static inline u32 rt2x00_rev(struct rt2x00_dev *rt2x00dev)
|
||||
static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
return rt2x00dev->chip.rev;
|
||||
}
|
||||
|
||||
static inline bool rt2x00_check_rev(struct rt2x00_dev *rt2x00dev,
|
||||
const u32 mask, const u32 rev)
|
||||
{
|
||||
return ((rt2x00dev->chip.rev & mask) == rev);
|
||||
}
|
||||
|
||||
static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev,
|
||||
enum rt2x00_chip_intf intf)
|
||||
{
|
||||
|
|
|
@ -184,7 +184,7 @@ void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
|
|||
dump_hdr->data_length = cpu_to_le32(skb->len);
|
||||
dump_hdr->chip_rt = cpu_to_le16(rt2x00dev->chip.rt);
|
||||
dump_hdr->chip_rf = cpu_to_le16(rt2x00dev->chip.rf);
|
||||
dump_hdr->chip_rev = cpu_to_le32(rt2x00dev->chip.rev);
|
||||
dump_hdr->chip_rev = cpu_to_le16(rt2x00dev->chip.rev);
|
||||
dump_hdr->type = cpu_to_le16(type);
|
||||
dump_hdr->queue_index = desc->entry->queue->qid;
|
||||
dump_hdr->entry_index = desc->entry->entry_idx;
|
||||
|
@ -573,7 +573,7 @@ static struct dentry *rt2x00debug_create_file_chipset(const char *name,
|
|||
blob->data = data;
|
||||
data += sprintf(data, "rt chip:\t%04x\n", intf->rt2x00dev->chip.rt);
|
||||
data += sprintf(data, "rf chip:\t%04x\n", intf->rt2x00dev->chip.rf);
|
||||
data += sprintf(data, "revision:\t%08x\n", intf->rt2x00dev->chip.rev);
|
||||
data += sprintf(data, "revision:\t%04x\n", intf->rt2x00dev->chip.rev);
|
||||
data += sprintf(data, "\n");
|
||||
data += sprintf(data, "register\tbase\twords\twordsize\n");
|
||||
data += sprintf(data, "csr\t%d\t%d\t%d\n",
|
||||
|
|
|
@ -1131,16 +1131,18 @@ dynamic_cca_tune:
|
|||
*/
|
||||
static char *rt61pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
u16 chip;
|
||||
char *fw_name;
|
||||
|
||||
switch (rt2x00dev->chip.rt) {
|
||||
case RT2561:
|
||||
pci_read_config_word(to_pci_dev(rt2x00dev->dev), PCI_DEVICE_ID, &chip);
|
||||
switch (chip) {
|
||||
case RT2561_PCI_ID:
|
||||
fw_name = FIRMWARE_RT2561;
|
||||
break;
|
||||
case RT2561s:
|
||||
case RT2561s_PCI_ID:
|
||||
fw_name = FIRMWARE_RT2561s;
|
||||
break;
|
||||
case RT2661:
|
||||
case RT2661_PCI_ID:
|
||||
fw_name = FIRMWARE_RT2661;
|
||||
break;
|
||||
default:
|
||||
|
@ -2282,7 +2284,6 @@ static int rt61pci_validate_eeprom(struct rt2x00_dev *rt2x00dev)
|
|||
static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
|
||||
{
|
||||
u32 reg;
|
||||
u16 chip;
|
||||
u16 value;
|
||||
u16 eeprom;
|
||||
|
||||
|
@ -2291,17 +2292,13 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
|
|||
*/
|
||||
rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
|
||||
|
||||
/*
|
||||
* Identify RT chipset.
|
||||
*/
|
||||
pci_read_config_word(to_pci_dev(rt2x00dev->dev), PCI_DEVICE_ID, &chip);
|
||||
|
||||
/*
|
||||
* Identify RF chipset.
|
||||
*/
|
||||
value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
|
||||
rt2x00pci_register_read(rt2x00dev, MAC_CSR0, ®);
|
||||
rt2x00_set_chip(rt2x00dev, chip, value, reg);
|
||||
rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
|
||||
value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
|
||||
|
||||
if (!rt2x00_rf(rt2x00dev, RF5225) &&
|
||||
!rt2x00_rf(rt2x00dev, RF5325) &&
|
||||
|
|
|
@ -27,6 +27,13 @@
|
|||
#ifndef RT61PCI_H
|
||||
#define RT61PCI_H
|
||||
|
||||
/*
|
||||
* RT chip PCI IDs.
|
||||
*/
|
||||
#define RT2561s_PCI_ID 0x0301
|
||||
#define RT2561_PCI_ID 0x0302
|
||||
#define RT2661_PCI_ID 0x0401
|
||||
|
||||
/*
|
||||
* RF chip defines.
|
||||
*/
|
||||
|
@ -225,6 +232,8 @@ struct hw_pairwise_ta_entry {
|
|||
* MAC_CSR0: ASIC revision number.
|
||||
*/
|
||||
#define MAC_CSR0 0x3000
|
||||
#define MAC_CSR0_REVISION FIELD32(0x0000000f)
|
||||
#define MAC_CSR0_CHIPSET FIELD32(0x000ffff0)
|
||||
|
||||
/*
|
||||
* MAC_CSR1: System control register.
|
||||
|
|
|
@ -1820,10 +1820,10 @@ static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
|
|||
*/
|
||||
value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR0, ®);
|
||||
rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
|
||||
rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
|
||||
value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
|
||||
|
||||
if (!rt2x00_check_rev(rt2x00dev, 0x000ffff0, 0x25730) ||
|
||||
rt2x00_check_rev(rt2x00dev, 0x0000000f, 0)) {
|
||||
if (!rt2x00_rt(rt2x00dev, RT2573) || (rt2x00_rev(rt2x00dev) == 0)) {
|
||||
ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
|
|
@ -142,6 +142,8 @@ struct hw_pairwise_ta_entry {
|
|||
* MAC_CSR0: ASIC revision number.
|
||||
*/
|
||||
#define MAC_CSR0 0x3000
|
||||
#define MAC_CSR0_REVISION FIELD32(0x0000000f)
|
||||
#define MAC_CSR0_CHIPSET FIELD32(0x000ffff0)
|
||||
|
||||
/*
|
||||
* MAC_CSR1: System control register.
|
||||
|
|
Loading…
Reference in a new issue