Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: arch/arm/mach-omap2/smartreflex.c: add missing iounmap ARM: OMAP2+: arch/arm/mach-omap2/devices.c: introduce missing kfree ARM: OMAP: fix MMC2 loopback clock handling ARM: OMAP: fix erroneous mmc2 clock change on mmc3 setup ARM: OMAP2+: GPMC: fix device size setup ARM: OMAP2+: timer: Fix crash due to wrong arg to __omap_dm_timer_read_counter ARM: OMAP3: hwmod data: register dss hwmods after dss_core ARM: OMAP2/3: PRM: fix missing plat/irqs.h build breakage ARM: OMAP2+: io: fix compilation breakage on 2420-only configs ARM: OMAP4: hwmod data: Add names for DMIC memory address space ARM: OMAP3: hwmod data: add SYSC_HAS_ENAWAKEUP for dispc ARM: OMAP2+: hwmod data: split omap2/3 dispc hwmod class ARM: OMAP2: fix regulator warnings ARM: OMAP2: fix omap3 touchbook kconfig warning i2c: OMAP: Fix OMAP1 build error
This commit is contained in:
commit
4a81220a61
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@ -213,13 +213,12 @@ config MACH_OMAP3_PANDORA
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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select REGULATOR_FIXED_VOLTAGE
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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config MACH_OMAP3_TOUCHBOOK
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bool "OMAP3 Touch Book"
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depends on ARCH_OMAP3
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default y
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select BACKLIGHT_CLASS_DEVICE
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config MACH_OMAP_3430SDP
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bool "OMAP 3430 SDP board"
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@ -265,7 +264,7 @@ config MACH_OMAP_ZOOM2
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select SERIAL_8250
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select SERIAL_CORE_CONSOLE
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select SERIAL_8250_CONSOLE
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select REGULATOR_FIXED_VOLTAGE
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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config MACH_OMAP_ZOOM3
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bool "OMAP3630 Zoom3 board"
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@ -275,7 +274,7 @@ config MACH_OMAP_ZOOM3
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select SERIAL_8250
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select SERIAL_CORE_CONSOLE
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select SERIAL_8250_CONSOLE
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select REGULATOR_FIXED_VOLTAGE
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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config MACH_CM_T35
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bool "CompuLab CM-T35/CM-T3730 modules"
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@ -334,7 +333,7 @@ config MACH_OMAP_4430SDP
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depends on ARCH_OMAP4
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select OMAP_PACKAGE_CBL
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select OMAP_PACKAGE_CBS
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select REGULATOR_FIXED_VOLTAGE
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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config MACH_OMAP4_PANDA
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bool "OMAP4 Panda Board"
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@ -342,7 +341,7 @@ config MACH_OMAP4_PANDA
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depends on ARCH_OMAP4
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select OMAP_PACKAGE_CBL
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select OMAP_PACKAGE_CBS
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select REGULATOR_FIXED_VOLTAGE
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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config OMAP3_EMU
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bool "OMAP3 debugging peripherals"
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@ -405,6 +405,7 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
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break;
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default:
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pr_err("Invalid McSPI Revision value\n");
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kfree(pdata);
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return -EINVAL;
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}
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@ -528,7 +528,13 @@ int gpmc_cs_configure(int cs, int cmd, int wval)
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case GPMC_CONFIG_DEV_SIZE:
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regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
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/* clear 2 target bits */
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regval &= ~GPMC_CONFIG1_DEVICESIZE(3);
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/* set the proper value */
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regval |= GPMC_CONFIG1_DEVICESIZE(wval);
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gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
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break;
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@ -175,14 +175,15 @@ static void hsmmc2_select_input_clk_src(struct omap_mmc_platform_data *mmc)
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{
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u32 reg;
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if (mmc->slots[0].internal_clock) {
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reg = omap_ctrl_readl(control_devconf1_offset);
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reg = omap_ctrl_readl(control_devconf1_offset);
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if (mmc->slots[0].internal_clock)
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reg |= OMAP2_MMCSDIO2ADPCLKISEL;
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omap_ctrl_writel(reg, control_devconf1_offset);
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}
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else
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reg &= ~OMAP2_MMCSDIO2ADPCLKISEL;
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omap_ctrl_writel(reg, control_devconf1_offset);
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}
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static void hsmmc23_before_set_reg(struct device *dev, int slot,
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static void hsmmc2_before_set_reg(struct device *dev, int slot,
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int power_on, int vdd)
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{
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struct omap_mmc_platform_data *mmc = dev->platform_data;
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@ -407,14 +408,13 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
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c->caps &= ~MMC_CAP_8_BIT_DATA;
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c->caps |= MMC_CAP_4_BIT_DATA;
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}
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/* FALLTHROUGH */
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case 3:
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if (mmc->slots[0].features & HSMMC_HAS_PBIAS) {
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/* off-chip level shifting, or none */
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mmc->slots[0].before_set_reg = hsmmc23_before_set_reg;
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mmc->slots[0].before_set_reg = hsmmc2_before_set_reg;
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mmc->slots[0].after_set_reg = NULL;
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}
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break;
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case 3:
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case 4:
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case 5:
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mmc->slots[0].before_set_reg = NULL;
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@ -388,7 +388,7 @@ static void __init omap_hwmod_init_postsetup(void)
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omap_pm_if_early_init();
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}
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#ifdef CONFIG_ARCH_OMAP2
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#ifdef CONFIG_SOC_OMAP2420
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void __init omap2420_init_early(void)
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{
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omap2_set_globals_242x();
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@ -400,7 +400,9 @@ void __init omap2420_init_early(void)
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omap_hwmod_init_postsetup();
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omap2420_clk_init();
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}
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#endif
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#ifdef CONFIG_SOC_OMAP2430
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void __init omap2430_init_early(void)
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{
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omap2_set_globals_243x();
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@ -55,27 +55,6 @@ struct omap_hwmod_class omap2_dss_hwmod_class = {
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.reset = omap_dss_reset,
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};
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/*
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* 'dispc' class
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* display controller
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*/
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static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
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SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2_dispc_hwmod_class = {
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.name = "dispc",
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.sysc = &omap2_dispc_sysc,
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};
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/*
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* 'rfbi' class
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* remote frame buffer interface
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@ -28,6 +28,28 @@ struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
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{ .name = "dispc", .dma_req = 5 },
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{ .dma_req = -1 }
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};
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/*
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* 'dispc' class
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* display controller
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*/
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static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
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SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2_dispc_hwmod_class = {
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.name = "dispc",
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.sysc = &omap2_dispc_sysc,
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};
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/* OMAP2xxx Timer Common */
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static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
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.rev_offs = 0x0000,
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@ -1480,6 +1480,28 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
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.masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
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};
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/*
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* 'dispc' class
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* display controller
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*/
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static struct omap_hwmod_class_sysconfig omap3_dispc_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
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SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
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SYSC_HAS_ENAWAKEUP),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap3_dispc_hwmod_class = {
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.name = "dispc",
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.sysc = &omap3_dispc_sysc,
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};
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/* l4_core -> dss_dispc */
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static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {
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.master = &omap3xxx_l4_core_hwmod,
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@ -1503,7 +1525,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {
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static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
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.name = "dss_dispc",
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.class = &omap2_dispc_hwmod_class,
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.class = &omap3_dispc_hwmod_class,
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.mpu_irqs = omap2_dispc_irqs,
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.main_clk = "dss1_alwon_fck",
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.prcm = {
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&omap3xxx_uart2_hwmod,
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&omap3xxx_uart3_hwmod,
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/* dss class */
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&omap3xxx_dss_dispc_hwmod,
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&omap3xxx_dss_dsi1_hwmod,
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&omap3xxx_dss_rfbi_hwmod,
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&omap3xxx_dss_venc_hwmod,
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/* i2c class */
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&omap3xxx_i2c1_hwmod,
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&omap3xxx_i2c2_hwmod,
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@ -3635,6 +3651,15 @@ static __initdata struct omap_hwmod *am35xx_hwmods[] = {
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NULL
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};
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static __initdata struct omap_hwmod *omap3xxx_dss_hwmods[] = {
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/* dss class */
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&omap3xxx_dss_dispc_hwmod,
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&omap3xxx_dss_dsi1_hwmod,
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&omap3xxx_dss_rfbi_hwmod,
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&omap3xxx_dss_venc_hwmod,
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NULL
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};
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int __init omap3xxx_hwmod_init(void)
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{
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int r;
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@ -3708,6 +3733,21 @@ int __init omap3xxx_hwmod_init(void)
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if (h)
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r = omap_hwmod_register(h);
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if (r < 0)
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return r;
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/*
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* DSS code presumes that dss_core hwmod is handled first,
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* _before_ any other DSS related hwmods so register common
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* DSS hwmods last to ensure that dss_core is already registered.
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* Otherwise some change things may happen, for ex. if dispc
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* is handled before dss_core and DSS is enabled in bootloader
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* DIPSC will be reset with outputs enabled which sometimes leads
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* to unrecoverable L3 error.
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* XXX The long-term fix to this is to ensure modules are set up
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* in dependency order in the hwmod core code.
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*/
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r = omap_hwmod_register(omap3xxx_dss_hwmods);
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return r;
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}
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@ -1031,6 +1031,7 @@ static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = {
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static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = {
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{
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.name = "mpu",
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.pa_start = 0x4012e000,
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.pa_end = 0x4012e07f,
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.flags = ADDR_TYPE_RT
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@ -1049,6 +1050,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = {
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static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = {
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{
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.name = "dma",
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.pa_start = 0x4902e000,
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.pa_end = 0x4902e07f,
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.flags = ADDR_TYPE_RT
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@ -19,6 +19,7 @@
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#include "common.h"
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#include <plat/cpu.h>
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#include <plat/prcm.h>
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#include <plat/irqs.h>
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#include "vp.h"
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@ -897,7 +897,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
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ret = sr_late_init(sr_info);
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if (ret) {
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pr_warning("%s: Error in SR late init\n", __func__);
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return ret;
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goto err_iounmap;
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}
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}
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@ -270,7 +270,7 @@ static struct clocksource clocksource_gpt = {
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static u32 notrace dmtimer_read_sched_clock(void)
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{
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if (clksrc.reserved)
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return __omap_dm_timer_read_counter(clksrc.io_base, 1);
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return __omap_dm_timer_read_counter(&clksrc, 1);
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return 0;
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}
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@ -1018,7 +1018,7 @@ omap_i2c_probe(struct platform_device *pdev)
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goto err_release_region;
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}
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match = of_match_device(omap_i2c_of_match, &pdev->dev);
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match = of_match_device(of_match_ptr(omap_i2c_of_match), &pdev->dev);
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if (match) {
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u32 freq = 100000; /* default to 100000 Hz */
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