net: fec: Let fec_ptp have its own interrupt routine
This is better for code locality and should slightly speed up normal interrupts. This also allows PPS clock output to start working for i.mx7. This is because i.mx7 was already using the limit of 3 interrupts, and needed another. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>hifive-unleashed-5.1
Troy Kisky
David S. Miller
parent
ca1b17b7e8
commit
4ad1ceec05
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@ -34,6 +34,19 @@ Optional properties:
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- fsl,err006687-workaround-present: If present indicates that the system has
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the hardware workaround for ERR006687 applied and does not need a software
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workaround.
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-interrupt-names: names of the interrupts listed in interrupts property in
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the same order. The defaults if not specified are
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__Number of interrupts__ __Default__
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1 "int0"
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2 "int0", "pps"
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3 "int0", "int1", "int2"
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4 "int0", "int1", "int2", "pps"
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The order may be changed as long as they correspond to the interrupts
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property. Currently, only i.mx7 uses "int1" and "int2". They correspond to
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tx/rx queues 1 and 2. "int0" will be used for queue 0 and ENET_MII interrupts.
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For imx6sx, "int0" handles all 3 queues and ENET_MII. "pps" is for the pulse
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per second interrupt associated with 1588 precision time protocol(PTP).
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Optional subnodes:
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- mdio : specifies the mdio bus in the FEC, used as a container for phy nodes
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@ -583,12 +583,11 @@ struct fec_enet_private {
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u64 ethtool_stats[0];
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};
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void fec_ptp_init(struct platform_device *pdev);
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void fec_ptp_init(struct platform_device *pdev, int irq_idx);
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void fec_ptp_stop(struct platform_device *pdev);
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void fec_ptp_start_cyclecounter(struct net_device *ndev);
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int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr);
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int fec_ptp_get(struct net_device *ndev, struct ifreq *ifr);
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uint fec_ptp_check_pps_event(struct fec_enet_private *fep);
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/****************************************************************************/
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#endif /* FEC_H */
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@ -1602,10 +1602,6 @@ fec_enet_interrupt(int irq, void *dev_id)
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ret = IRQ_HANDLED;
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complete(&fep->mdio_done);
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}
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if (fep->ptp_clock)
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if (fec_ptp_check_pps_event(fep))
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ret = IRQ_HANDLED;
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return ret;
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}
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@ -3312,6 +3308,19 @@ fec_enet_get_queue_num(struct platform_device *pdev, int *num_tx, int *num_rx)
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}
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static int fec_enet_get_irq_cnt(struct platform_device *pdev)
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{
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int irq_cnt = platform_irq_count(pdev);
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if (irq_cnt > FEC_IRQ_NUM)
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irq_cnt = FEC_IRQ_NUM; /* last for pps */
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else if (irq_cnt == 2)
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irq_cnt = 1; /* last for pps */
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else if (irq_cnt <= 0)
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irq_cnt = 1; /* At least 1 irq is needed */
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return irq_cnt;
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}
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static int
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fec_probe(struct platform_device *pdev)
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{
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@ -3325,6 +3334,8 @@ fec_probe(struct platform_device *pdev)
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struct device_node *np = pdev->dev.of_node, *phy_node;
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int num_tx_qs;
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int num_rx_qs;
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char irq_name[8];
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int irq_cnt;
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fec_enet_get_queue_num(pdev, &num_tx_qs, &num_rx_qs);
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@ -3465,18 +3476,20 @@ fec_probe(struct platform_device *pdev)
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if (ret)
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goto failed_reset;
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irq_cnt = fec_enet_get_irq_cnt(pdev);
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if (fep->bufdesc_ex)
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fec_ptp_init(pdev);
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fec_ptp_init(pdev, irq_cnt);
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ret = fec_enet_init(ndev);
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if (ret)
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goto failed_init;
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for (i = 0; i < FEC_IRQ_NUM; i++) {
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irq = platform_get_irq(pdev, i);
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for (i = 0; i < irq_cnt; i++) {
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sprintf(irq_name, "int%d", i);
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irq = platform_get_irq_byname(pdev, irq_name);
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if (irq < 0)
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irq = platform_get_irq(pdev, i);
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if (irq < 0) {
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if (i)
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break;
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ret = irq;
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goto failed_irq;
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}
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@ -549,6 +549,37 @@ static void fec_time_keep(struct work_struct *work)
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schedule_delayed_work(&fep->time_keep, HZ);
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}
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/* This function checks the pps event and reloads the timer compare counter. */
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static irqreturn_t fec_pps_interrupt(int irq, void *dev_id)
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{
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struct net_device *ndev = dev_id;
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struct fec_enet_private *fep = netdev_priv(ndev);
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u32 val;
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u8 channel = fep->pps_channel;
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struct ptp_clock_event event;
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val = readl(fep->hwp + FEC_TCSR(channel));
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if (val & FEC_T_TF_MASK) {
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/* Write the next next compare(not the next according the spec)
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* value to the register
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*/
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writel(fep->next_counter, fep->hwp + FEC_TCCR(channel));
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do {
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writel(val, fep->hwp + FEC_TCSR(channel));
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} while (readl(fep->hwp + FEC_TCSR(channel)) & FEC_T_TF_MASK);
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/* Update the counter; */
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fep->next_counter = (fep->next_counter + fep->reload_period) &
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fep->cc.mask;
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event.type = PTP_CLOCK_PPS;
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ptp_clock_event(fep->ptp_clock, &event);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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/**
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* fec_ptp_init
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* @ndev: The FEC network adapter
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@ -558,10 +589,12 @@ static void fec_time_keep(struct work_struct *work)
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* cyclecounter init routine and exits.
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*/
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void fec_ptp_init(struct platform_device *pdev)
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void fec_ptp_init(struct platform_device *pdev, int irq_idx)
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{
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struct net_device *ndev = platform_get_drvdata(pdev);
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struct fec_enet_private *fep = netdev_priv(ndev);
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int irq;
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int ret;
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fep->ptp_caps.owner = THIS_MODULE;
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snprintf(fep->ptp_caps.name, 16, "fec ptp");
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@ -587,6 +620,20 @@ void fec_ptp_init(struct platform_device *pdev)
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INIT_DELAYED_WORK(&fep->time_keep, fec_time_keep);
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irq = platform_get_irq_byname(pdev, "pps");
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if (irq < 0)
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irq = platform_get_irq(pdev, irq_idx);
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/* Failure to get an irq is not fatal,
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* only the PTP_CLOCK_PPS clock events should stop
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*/
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if (irq >= 0) {
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ret = devm_request_irq(&pdev->dev, irq, fec_pps_interrupt,
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0, pdev->name, ndev);
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if (ret < 0)
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dev_warn(&pdev->dev, "request for pps irq failed(%d)\n",
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ret);
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}
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fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev);
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if (IS_ERR(fep->ptp_clock)) {
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fep->ptp_clock = NULL;
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@ -605,36 +652,3 @@ void fec_ptp_stop(struct platform_device *pdev)
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if (fep->ptp_clock)
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ptp_clock_unregister(fep->ptp_clock);
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}
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/**
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* fec_ptp_check_pps_event
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* @fep: the fec_enet_private structure handle
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*
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* This function check the pps event and reload the timer compare counter.
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*/
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uint fec_ptp_check_pps_event(struct fec_enet_private *fep)
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{
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u32 val;
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u8 channel = fep->pps_channel;
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struct ptp_clock_event event;
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val = readl(fep->hwp + FEC_TCSR(channel));
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if (val & FEC_T_TF_MASK) {
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/* Write the next next compare(not the next according the spec)
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* value to the register
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*/
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writel(fep->next_counter, fep->hwp + FEC_TCCR(channel));
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do {
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writel(val, fep->hwp + FEC_TCSR(channel));
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} while (readl(fep->hwp + FEC_TCSR(channel)) & FEC_T_TF_MASK);
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/* Update the counter; */
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fep->next_counter = (fep->next_counter + fep->reload_period) & fep->cc.mask;
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event.type = PTP_CLOCK_PPS;
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ptp_clock_event(fep->ptp_clock, &event);
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return 1;
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}
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return 0;
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}
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