sh: sh2a sh_clk_ops rename
Convert sh2a SoCs to use sh_clk_ops. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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71984236d6
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4ad2c06155
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@ -30,7 +30,7 @@ static void master_clk_init(struct clk *clk)
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pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
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}
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static struct clk_ops sh7201_master_clk_ops = {
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static struct sh_clk_ops sh7201_master_clk_ops = {
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.init = master_clk_init,
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};
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@ -40,7 +40,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7201_module_clk_ops = {
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static struct sh_clk_ops sh7201_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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@ -50,7 +50,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7201_bus_clk_ops = {
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static struct sh_clk_ops sh7201_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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@ -60,18 +60,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
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return clk->parent->rate / ifc_divisors[idx];
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}
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static struct clk_ops sh7201_cpu_clk_ops = {
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static struct sh_clk_ops sh7201_cpu_clk_ops = {
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.recalc = cpu_clk_recalc,
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};
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static struct clk_ops *sh7201_clk_ops[] = {
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static struct sh_clk_ops *sh7201_clk_ops[] = {
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&sh7201_master_clk_ops,
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&sh7201_module_clk_ops,
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&sh7201_bus_clk_ops,
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&sh7201_cpu_clk_ops,
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};
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void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
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void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
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{
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if (test_mode_pin(MODE_PIN1 | MODE_PIN0))
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pll2_mult = 1;
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@ -32,7 +32,7 @@ static void master_clk_init(struct clk *clk)
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clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult;
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}
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static struct clk_ops sh7203_master_clk_ops = {
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static struct sh_clk_ops sh7203_master_clk_ops = {
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.init = master_clk_init,
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};
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@ -42,7 +42,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7203_module_clk_ops = {
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static struct sh_clk_ops sh7203_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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@ -52,22 +52,22 @@ static unsigned long bus_clk_recalc(struct clk *clk)
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return clk->parent->rate / pfc_divisors[idx-2];
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}
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static struct clk_ops sh7203_bus_clk_ops = {
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static struct sh_clk_ops sh7203_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static struct clk_ops sh7203_cpu_clk_ops = {
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static struct sh_clk_ops sh7203_cpu_clk_ops = {
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.recalc = followparent_recalc,
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};
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static struct clk_ops *sh7203_clk_ops[] = {
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static struct sh_clk_ops *sh7203_clk_ops[] = {
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&sh7203_master_clk_ops,
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&sh7203_module_clk_ops,
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&sh7203_bus_clk_ops,
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&sh7203_cpu_clk_ops,
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};
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void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
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void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
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{
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if (test_mode_pin(MODE_PIN1))
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pll2_mult = 4;
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@ -29,7 +29,7 @@ static void master_clk_init(struct clk *clk)
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clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
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}
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static struct clk_ops sh7206_master_clk_ops = {
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static struct sh_clk_ops sh7206_master_clk_ops = {
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.init = master_clk_init,
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};
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@ -39,7 +39,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7206_module_clk_ops = {
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static struct sh_clk_ops sh7206_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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@ -48,7 +48,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
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return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
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}
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static struct clk_ops sh7206_bus_clk_ops = {
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static struct sh_clk_ops sh7206_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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@ -58,18 +58,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
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return clk->parent->rate / ifc_divisors[idx];
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}
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static struct clk_ops sh7206_cpu_clk_ops = {
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static struct sh_clk_ops sh7206_cpu_clk_ops = {
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.recalc = cpu_clk_recalc,
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};
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static struct clk_ops *sh7206_clk_ops[] = {
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static struct sh_clk_ops *sh7206_clk_ops[] = {
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&sh7206_master_clk_ops,
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&sh7206_module_clk_ops,
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&sh7206_bus_clk_ops,
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&sh7206_cpu_clk_ops,
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};
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void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
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void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
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{
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if (test_mode_pin(MODE_PIN2 | MODE_PIN1 | MODE_PIN0))
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pll2_mult = 1;
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