x86/mm: Define virtual memory map for 5-level paging
The first part of memory map (up to %esp fixup) simply scales existing map for 4-level paging by factor of 9 -- number of bits addressed by the additional page table level. The rest of the map is unchanged. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch@vger.kernel.org Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/20170330080731.65421-4-kirill.shutemov@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>hifive-unleashed-5.1
Kirill A. Shutemov
Ingo Molnar
parent
361b4b58ec
commit
4c7c44837b
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@ -4,7 +4,7 @@
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Virtual memory map with 4 level page tables:
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0000000000000000 - 00007fffffffffff (=47 bits) user space, different per mm
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hole caused by [48:63] sign extension
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hole caused by [47:63] sign extension
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ffff800000000000 - ffff87ffffffffff (=43 bits) guard hole, reserved for hypervisor
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ffff880000000000 - ffffc7ffffffffff (=64 TB) direct mapping of all phys. memory
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ffffc80000000000 - ffffc8ffffffffff (=40 bits) hole
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@ -23,12 +23,39 @@ ffffffffa0000000 - ffffffffff5fffff (=1526 MB) module mapping space (variable)
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ffffffffff600000 - ffffffffffdfffff (=8 MB) vsyscalls
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ffffffffffe00000 - ffffffffffffffff (=2 MB) unused hole
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Virtual memory map with 5 level page tables:
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0000000000000000 - 00ffffffffffffff (=56 bits) user space, different per mm
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hole caused by [56:63] sign extension
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ff00000000000000 - ff0fffffffffffff (=52 bits) guard hole, reserved for hypervisor
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ff10000000000000 - ff8fffffffffffff (=55 bits) direct mapping of all phys. memory
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ff90000000000000 - ff91ffffffffffff (=49 bits) hole
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ff92000000000000 - ffd1ffffffffffff (=54 bits) vmalloc/ioremap space
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ffd2000000000000 - ffd3ffffffffffff (=49 bits) hole
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ffd4000000000000 - ffd5ffffffffffff (=49 bits) virtual memory map (512TB)
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... unused hole ...
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ffd8000000000000 - fff7ffffffffffff (=53 bits) kasan shadow memory (8PB)
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... unused hole ...
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ffffff0000000000 - ffffff7fffffffff (=39 bits) %esp fixup stacks
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... unused hole ...
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ffffffef00000000 - fffffffeffffffff (=64 GB) EFI region mapping space
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... unused hole ...
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ffffffff80000000 - ffffffff9fffffff (=512 MB) kernel text mapping, from phys 0
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ffffffffa0000000 - ffffffffff5fffff (=1526 MB) module mapping space
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ffffffffff600000 - ffffffffffdfffff (=8 MB) vsyscalls
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ffffffffffe00000 - ffffffffffffffff (=2 MB) unused hole
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Architecture defines a 64-bit virtual address. Implementations can support
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less. Currently supported are 48- and 57-bit virtual addresses. Bits 63
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through to the most-significant implemented bit are set to either all ones
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or all zero. This causes hole between user space and kernel addresses.
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The direct mapping covers all memory in the system up to the highest
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memory address (this means in some cases it can also include PCI memory
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holes).
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vmalloc space is lazily synchronized into the different PML4 pages of
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the processes using the page fault handler, with init_level4_pgt as
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vmalloc space is lazily synchronized into the different PML4/PML5 pages of
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the processes using the page fault handler, with init_top_pgt as
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reference.
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Current X86-64 implementations support up to 46 bits of address space (64 TB),
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@ -291,6 +291,7 @@ config ARCH_SUPPORTS_DEBUG_PAGEALLOC
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config KASAN_SHADOW_OFFSET
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hex
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depends on KASAN
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default 0xdff8000000000000 if X86_5LEVEL
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default 0xdffffc0000000000
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config HAVE_INTEL_TXT
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@ -11,9 +11,12 @@
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* 'kernel address space start' >> KASAN_SHADOW_SCALE_SHIFT
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*/
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#define KASAN_SHADOW_START (KASAN_SHADOW_OFFSET + \
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(0xffff800000000000ULL >> 3))
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/* 47 bits for kernel address -> (47 - 3) bits for shadow */
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#define KASAN_SHADOW_END (KASAN_SHADOW_START + (1ULL << (47 - 3)))
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((-1UL << __VIRTUAL_MASK_SHIFT) >> 3))
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/*
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* 47 bits for kernel address -> (47 - 3) bits for shadow
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* 56 bits for kernel address -> (56 - 3) bits for shadow
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*/
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#define KASAN_SHADOW_END (KASAN_SHADOW_START + (1ULL << (__VIRTUAL_MASK_SHIFT - 3)))
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#ifndef __ASSEMBLY__
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@ -36,7 +36,12 @@
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* hypervisor to fit. Choosing 16 slots here is arbitrary, but it's
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* what Xen requires.
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*/
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#ifdef CONFIG_X86_5LEVEL
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#define __PAGE_OFFSET_BASE _AC(0xff10000000000000, UL)
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#else
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#define __PAGE_OFFSET_BASE _AC(0xffff880000000000, UL)
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#endif
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#ifdef CONFIG_RANDOMIZE_MEMORY
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#define __PAGE_OFFSET page_offset_base
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#else
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@ -46,8 +51,13 @@
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#define __START_KERNEL_map _AC(0xffffffff80000000, UL)
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/* See Documentation/x86/x86_64/mm.txt for a description of the memory map. */
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#ifdef CONFIG_X86_5LEVEL
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#define __PHYSICAL_MASK_SHIFT 52
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#define __VIRTUAL_MASK_SHIFT 56
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#else
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#define __PHYSICAL_MASK_SHIFT 46
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#define __VIRTUAL_MASK_SHIFT 47
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#endif
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/*
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* Kernel image size is limited to 1GiB due to the fixmap living in the
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@ -56,9 +56,15 @@ typedef struct { pteval_t pte; } pte_t;
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/* See Documentation/x86/x86_64/mm.txt for a description of the memory map. */
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#define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
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#ifdef CONFIG_X86_5LEVEL
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#define VMALLOC_SIZE_TB _AC(16384, UL)
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#define __VMALLOC_BASE _AC(0xff92000000000000, UL)
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#define __VMEMMAP_BASE _AC(0xffd4000000000000, UL)
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#else
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#define VMALLOC_SIZE_TB _AC(32, UL)
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#define __VMALLOC_BASE _AC(0xffffc90000000000, UL)
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#define __VMEMMAP_BASE _AC(0xffffea0000000000, UL)
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#endif
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#ifdef CONFIG_RANDOMIZE_MEMORY
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#define VMALLOC_START vmalloc_base
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#define VMEMMAP_START vmemmap_base
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@ -26,8 +26,13 @@
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# endif
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#else /* CONFIG_X86_32 */
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# define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */
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# define MAX_PHYSADDR_BITS 44
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# define MAX_PHYSMEM_BITS 46
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# ifdef CONFIG_X86_5LEVEL
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# define MAX_PHYSADDR_BITS 52
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# define MAX_PHYSMEM_BITS 52
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# else
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# define MAX_PHYSADDR_BITS 44
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# define MAX_PHYSMEM_BITS 46
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# endif
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#endif
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#endif /* CONFIG_SPARSEMEM */
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