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Renesas ARM Based SoC r8a73a4 DT Timers Updates for v3.19 

* Initialise CMT1 timer using DT
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Merge tag 'renesas-r8a73a4-dt-timers-for-v3.19' into dt-for-v3.19.base

Renesas ARM Based SoC r8a73a4 DT Timers Updates for v3.19

* Initialise CMT1 timer using DT
hifive-unleashed-5.1
Simon Horman 2014-10-30 09:54:13 +09:00
parent 0ee56d4035 fd3edcbe9f
commit 4df49d9e1f
18 changed files with 293 additions and 274 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm/boot/dts/Makefile
View File

@ -376,25 +376,25 @@ dtb-$(CONFIG_ARCH_S5PV210) += s5pv210-aquila.dtb \
s5pv210-smdkc110.dtb \
s5pv210-smdkv210.dtb \
s5pv210-torbreck.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \
dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \
r8a73a4-ape6evm.dtb \
r8a73a4-ape6evm-reference.dtb \
r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \
r8a7778-bockw-reference.dtb \
r8a7779-marzen.dtb \
r8a7791-koelsch.dtb \
r8a7790-lager.dtb \
r8a7791-koelsch.dtb \
sh7372-mackerel.dtb \
sh73a0-kzm9g.dtb \
sh73a0-kzm9g-reference.dtb \
r8a73a4-ape6evm.dtb \
r8a73a4-ape6evm-reference.dtb \
sh7372-mackerel.dtb
sh73a0-kzm9g-reference.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
r7s72100-genmai.dtb \
r8a7740-armadillo800eva.dtb \
r8a7779-marzen.dtb \
r8a7790-lager.dtb \
r8a7791-henninger.dtb \
r8a7791-koelsch.dtb \
r8a7790-lager.dtb \
r8a7779-marzen.dtb \
r8a7794-alt.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
socfpga_cyclone5_socdk.dtb \

63
arch/arm/boot/dts/emev2-kzm9d.dts
View File

@ -25,37 +25,7 @@
chosen {
bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
};
reg_1p8v: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_3p3v: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
lan9220@20000000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x20000000 0x10000>;
phy-mode = "mii";
interrupt-parent = <&gpio0>;
interrupts = <1 IRQ_TYPE_EDGE_RISING>;
reg-io-width = <4>;
smsc,irq-active-high;
smsc,irq-push-pull;
vddvario-supply = <&reg_1p8v>;
vdd33a-supply = <&reg_3p3v>;
stdout-path = &uart1;
};
gpio_keys {
@ -92,4 +62,35 @@
gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
};
};
reg_1p8v: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_3p3v: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
lan9220@20000000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x20000000 0x10000>;
phy-mode = "mii";
interrupt-parent = <&gpio0>;
interrupts = <1 IRQ_TYPE_EDGE_RISING>;
reg-io-width = <4>;
smsc,irq-active-high;
smsc,irq-push-pull;
vddvario-supply = <&reg_1p8v>;
vdd33a-supply = <&reg_3p3v>;
};
};

12
arch/arm/boot/dts/emev2.dtsi
View File

@ -55,7 +55,7 @@
<0 121 IRQ_TYPE_LEVEL_HIGH>;
};
smu@e0110000 {
clocks@e0110000 {
compatible = "renesas,emev2-smu";
reg = <0xe0110000 0x10000>;
#address-cells = <2>;
@ -129,7 +129,7 @@
};
};
sti@e0180000 {
timer@e0180000 {
compatible = "renesas,em-sti";
reg = <0xe0180000 0x54>;
interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
@ -137,7 +137,7 @@
clock-names = "sclk";
};
uart@e1020000 {
uart0: serial@e1020000 {
compatible = "renesas,em-uart";
reg = <0xe1020000 0x38>;
interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
@ -145,7 +145,7 @@
clock-names = "sclk";
};
uart@e1030000 {
uart1: serial@e1030000 {
compatible = "renesas,em-uart";
reg = <0xe1030000 0x38>;
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
@ -153,7 +153,7 @@
clock-names = "sclk";
};
uart@e1040000 {
uart2: serial@e1040000 {
compatible = "renesas,em-uart";
reg = <0xe1040000 0x38>;
interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
@ -161,7 +161,7 @@
clock-names = "sclk";
};
uart@e1050000 {
uart3: serial@e1050000 {
compatible = "renesas,em-uart";
reg = <0xe1050000 0x38>;
interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;

3
arch/arm/boot/dts/r7s72100-genmai.dts
View File

@ -21,7 +21,8 @@
};
chosen {
bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = &scif2;
};
memory {

202
arch/arm/boot/dts/r7s72100.dtsi
View File

@ -52,16 +52,6 @@
clock-output-names = "usb_x1";
};
/* Special CPG clocks */
cpg_clocks: cpg_clocks@fcfe0000 {
#clock-cells = <1>;
compatible = "renesas,r7s72100-cpg-clocks",
"renesas,rz-cpg-clocks";
reg = <0xfcfe0000 0x18>;
clocks = <&extal_clk>, <&usb_x1_clk>;
clock-output-names = "pll", "i", "g";
};
/* Fixed factor clocks */
b_clk: b_clk {
#clock-cells = <0>;
@ -88,6 +78,16 @@
clock-output-names = "p0";
};
/* Special CPG clocks */
cpg_clocks: cpg_clocks@fcfe0000 {
#clock-cells = <1>;
compatible = "renesas,r7s72100-cpg-clocks",
"renesas,rz-cpg-clocks";
reg = <0xfcfe0000 0x18>;
clocks = <&extal_clk>, <&usb_x1_clk>;
clock-output-names = "pll", "i", "g";
};
/* MSTP clocks */
mstp3_clks: mstp3_clks@fcfe0420 {
#clock-cells = <1>;
@ -148,97 +148,6 @@
};
};
gic: interrupt-controller@e8201000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0xe8201000 0x1000>,
<0xe8202000 0x1000>;
};
i2c0: i2c@fcfee000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfee000 0x44>;
interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>,
<0 158 IRQ_TYPE_EDGE_RISING>,
<0 159 IRQ_TYPE_EDGE_RISING>,
<0 160 IRQ_TYPE_LEVEL_HIGH>,
<0 161 IRQ_TYPE_LEVEL_HIGH>,
<0 162 IRQ_TYPE_LEVEL_HIGH>,
<0 163 IRQ_TYPE_LEVEL_HIGH>,
<0 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
clock-frequency = <100000>;
status = "disabled";
};
i2c1: i2c@fcfee400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfee400 0x44>;
interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>,
<0 166 IRQ_TYPE_EDGE_RISING>,
<0 167 IRQ_TYPE_EDGE_RISING>,
<0 168 IRQ_TYPE_LEVEL_HIGH>,
<0 169 IRQ_TYPE_LEVEL_HIGH>,
<0 170 IRQ_TYPE_LEVEL_HIGH>,
<0 171 IRQ_TYPE_LEVEL_HIGH>,
<0 172 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C1>;
clock-frequency = <100000>;
status = "disabled";
};
i2c2: i2c@fcfee800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfee800 0x44>;
interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>,
<0 174 IRQ_TYPE_EDGE_RISING>,
<0 175 IRQ_TYPE_EDGE_RISING>,
<0 176 IRQ_TYPE_LEVEL_HIGH>,
<0 177 IRQ_TYPE_LEVEL_HIGH>,
<0 178 IRQ_TYPE_LEVEL_HIGH>,
<0 179 IRQ_TYPE_LEVEL_HIGH>,
<0 180 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C2>;
clock-frequency = <100000>;
status = "disabled";
};
i2c3: i2c@fcfeec00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfeec00 0x44>;
interrupts = <0 181 IRQ_TYPE_LEVEL_HIGH>,
<0 182 IRQ_TYPE_EDGE_RISING>,
<0 183 IRQ_TYPE_EDGE_RISING>,
<0 184 IRQ_TYPE_LEVEL_HIGH>,
<0 185 IRQ_TYPE_LEVEL_HIGH>,
<0 186 IRQ_TYPE_LEVEL_HIGH>,
<0 187 IRQ_TYPE_LEVEL_HIGH>,
<0 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C3>;
clock-frequency = <100000>;
status = "disabled";
};
mtu2: timer@fcff0000 {
compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
reg = <0xfcff0000 0x400>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tgi0a";
clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
clock-names = "fck";
status = "disabled";
};
scif0: serial@e8007000 {
compatible = "renesas,scif-r7s72100", "renesas,scif";
reg = <0xe8007000 64>;
@ -404,4 +313,95 @@
#size-cells = <0>;
status = "disabled";
};
gic: interrupt-controller@e8201000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0xe8201000 0x1000>,
<0xe8202000 0x1000>;
};
i2c0: i2c@fcfee000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfee000 0x44>;
interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>,
<0 158 IRQ_TYPE_EDGE_RISING>,
<0 159 IRQ_TYPE_EDGE_RISING>,
<0 160 IRQ_TYPE_LEVEL_HIGH>,
<0 161 IRQ_TYPE_LEVEL_HIGH>,
<0 162 IRQ_TYPE_LEVEL_HIGH>,
<0 163 IRQ_TYPE_LEVEL_HIGH>,
<0 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
clock-frequency = <100000>;
status = "disabled";
};
i2c1: i2c@fcfee400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfee400 0x44>;
interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>,
<0 166 IRQ_TYPE_EDGE_RISING>,
<0 167 IRQ_TYPE_EDGE_RISING>,
<0 168 IRQ_TYPE_LEVEL_HIGH>,
<0 169 IRQ_TYPE_LEVEL_HIGH>,
<0 170 IRQ_TYPE_LEVEL_HIGH>,
<0 171 IRQ_TYPE_LEVEL_HIGH>,
<0 172 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C1>;
clock-frequency = <100000>;
status = "disabled";
};
i2c2: i2c@fcfee800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfee800 0x44>;
interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>,
<0 174 IRQ_TYPE_EDGE_RISING>,
<0 175 IRQ_TYPE_EDGE_RISING>,
<0 176 IRQ_TYPE_LEVEL_HIGH>,
<0 177 IRQ_TYPE_LEVEL_HIGH>,
<0 178 IRQ_TYPE_LEVEL_HIGH>,
<0 179 IRQ_TYPE_LEVEL_HIGH>,
<0 180 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C2>;
clock-frequency = <100000>;
status = "disabled";
};
i2c3: i2c@fcfeec00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfeec00 0x44>;
interrupts = <0 181 IRQ_TYPE_LEVEL_HIGH>,
<0 182 IRQ_TYPE_EDGE_RISING>,
<0 183 IRQ_TYPE_EDGE_RISING>,
<0 184 IRQ_TYPE_LEVEL_HIGH>,
<0 185 IRQ_TYPE_LEVEL_HIGH>,
<0 186 IRQ_TYPE_LEVEL_HIGH>,
<0 187 IRQ_TYPE_LEVEL_HIGH>,
<0 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C3>;
clock-frequency = <100000>;
status = "disabled";
};
mtu2: timer@fcff0000 {
compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
reg = <0xfcff0000 0x400>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tgi0a";
clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
clock-names = "fck";
status = "disabled";
};
};

7
arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
View File

@ -21,7 +21,8 @@
};
chosen {
bootargs = "console=ttySC0,115200 ignore_loglevel rw";
bootargs = "ignore_loglevel rw";
stdout-path = &scifa0;
};
memory@40000000 {
@ -93,6 +94,10 @@
voltage-tolerance = <1>; /* 1% */
};
&cmt1 {
status = "okay";
};
&pfc {
scifa0_pins: serial0 {
renesas,groups = "scifa0_data";

243
arch/arm/boot/dts/r8a73a4.dtsi
View File

@ -30,18 +30,6 @@
};
};
gic: interrupt-controller@f1001000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@ -50,6 +38,91 @@
<1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
dmac: dma-multiplexer {
compatible = "renesas,shdma-mux";
#dma-cells = <1>;
dma-channels = <20>;
dma-requests = <256>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
dma0: dma-controller@e6700020 {
compatible = "renesas,shdma-r8a73a4";
reg = <0 0xe6700020 0 0x89e0>;
interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
0 200 IRQ_TYPE_LEVEL_HIGH
0 201 IRQ_TYPE_LEVEL_HIGH
0 202 IRQ_TYPE_LEVEL_HIGH
0 203 IRQ_TYPE_LEVEL_HIGH
0 204 IRQ_TYPE_LEVEL_HIGH
0 205 IRQ_TYPE_LEVEL_HIGH
0 206 IRQ_TYPE_LEVEL_HIGH
0 207 IRQ_TYPE_LEVEL_HIGH
0 208 IRQ_TYPE_LEVEL_HIGH
0 209 IRQ_TYPE_LEVEL_HIGH
0 210 IRQ_TYPE_LEVEL_HIGH
0 211 IRQ_TYPE_LEVEL_HIGH
0 212 IRQ_TYPE_LEVEL_HIGH
0 213 IRQ_TYPE_LEVEL_HIGH
0 214 IRQ_TYPE_LEVEL_HIGH
0 215 IRQ_TYPE_LEVEL_HIGH
0 216 IRQ_TYPE_LEVEL_HIGH
0 217 IRQ_TYPE_LEVEL_HIGH
0 218 IRQ_TYPE_LEVEL_HIGH
0 219 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15",
"ch16", "ch17", "ch18", "ch19";
};
};
pfc: pfc@e6050000 {
compatible = "renesas,pfc-r8a73a4";
reg = <0 0xe6050000 0 0x9000>;
gpio-controller;
#gpio-cells = <2>;
interrupts-extended =
<&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>,
<&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>,
<&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
<&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
<&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
<&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
<&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
<&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
<&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>,
<&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>,
<&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
<&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
<&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
<&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
<&irqc1 24 0>, <&irqc1 25 0>;
};
i2c5: i2c@e60b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x428>;
interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
cmt1: timer@e6130000 {
compatible = "renesas,cmt-48-gen2";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
renesas,channels-mask = <0xff>;
status = "disabled";
};
irqc0: interrupt-controller@e61c0000 {
compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
#interrupt-cells = <2>;
@ -122,48 +195,6 @@
<0 57 IRQ_TYPE_LEVEL_HIGH>;
};
dmac: dma-multiplexer@0 {
compatible = "renesas,shdma-mux";
#dma-cells = <1>;
dma-channels = <20>;
dma-requests = <256>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
dma0: dma-controller@e6700020 {
compatible = "renesas,shdma-r8a73a4";
reg = <0 0xe6700020 0 0x89e0>;
interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
0 200 IRQ_TYPE_LEVEL_HIGH
0 201 IRQ_TYPE_LEVEL_HIGH
0 202 IRQ_TYPE_LEVEL_HIGH
0 203 IRQ_TYPE_LEVEL_HIGH
0 204 IRQ_TYPE_LEVEL_HIGH
0 205 IRQ_TYPE_LEVEL_HIGH
0 206 IRQ_TYPE_LEVEL_HIGH
0 207 IRQ_TYPE_LEVEL_HIGH
0 208 IRQ_TYPE_LEVEL_HIGH
0 209 IRQ_TYPE_LEVEL_HIGH
0 210 IRQ_TYPE_LEVEL_HIGH
0 211 IRQ_TYPE_LEVEL_HIGH
0 212 IRQ_TYPE_LEVEL_HIGH
0 213 IRQ_TYPE_LEVEL_HIGH
0 214 IRQ_TYPE_LEVEL_HIGH
0 215 IRQ_TYPE_LEVEL_HIGH
0 216 IRQ_TYPE_LEVEL_HIGH
0 217 IRQ_TYPE_LEVEL_HIGH
0 218 IRQ_TYPE_LEVEL_HIGH
0 219 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15",
"ch16", "ch17", "ch18", "ch19";
};
};
thermal@e61f0000 {
compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal";
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
@ -216,15 +247,6 @@
status = "disabled";
};
i2c5: i2c@e60b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x428>;
interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c6: i2c@e6550000 {
#address-cells = <1>;
#size-cells = <0>;
@ -252,20 +274,6 @@
status = "disabled";
};
scifa0: serial@e6c40000 {
compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
reg = <0 0xe6c40000 0 0x100>;
interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa1: serial@e6c50000 {
compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
reg = <0 0xe6c50000 0 0x100>;
interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifb2: serial@e6c20000 {
compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
reg = <0 0xe6c20000 0 0x100>;
@ -280,6 +288,20 @@
status = "disabled";
};
scifa0: serial@e6c40000 {
compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
reg = <0 0xe6c40000 0 0x100>;
interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa1: serial@e6c50000 {
compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
reg = <0 0xe6c50000 0 0x100>;
interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifb4: serial@e6ce0000 {
compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
reg = <0 0xe6ce0000 0 0x100>;
@ -294,45 +316,6 @@
status = "disabled";
};
mmcif0: mmc@ee200000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
};
mmcif1: mmc@ee220000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee220000 0 0x80>;
interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
};
pfc: pfc@e6050000 {
compatible = "renesas,pfc-r8a73a4";
reg = <0 0xe6050000 0 0x9000>;
gpio-controller;
#gpio-cells = <2>;
interrupts-extended =
<&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>,
<&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>,
<&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
<&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
<&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
<&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
<&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
<&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
<&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>,
<&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>,
<&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
<&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
<&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
<&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
<&irqc1 24 0>, <&irqc1 25 0>;
};
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a73a4";
reg = <0 0xee100000 0 0x100>;
@ -356,4 +339,32 @@
cap-sd-highspeed;
status = "disabled";
};
mmcif0: mmc@ee200000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
};
mmcif1: mmc@ee220000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee220000 0 0x80>;
interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
status = "disabled";
};
gic: interrupt-controller@f1001000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
};

1
arch/arm/boot/dts/r8a7740-armadillo800eva.dts
View File

@ -25,6 +25,7 @@
chosen {
bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
stdout-path = &scifa1;
};
memory {

3
arch/arm/boot/dts/r8a7778-bockw-reference.dts
View File

@ -28,7 +28,8 @@
};
chosen {
bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
bootargs = "ignore_loglevel root=/dev/nfs ip=dhcp rw";
stdout-path = &scif0;
};
memory {

1
arch/arm/boot/dts/r8a7779-marzen.dts
View File

@ -25,6 +25,7 @@
chosen {
bootargs = "console=ttySC2,115200 ignore_loglevel root=/dev/nfs ip=on";
stdout-path = &scif2;
};
memory {

1
arch/arm/boot/dts/r8a7790-lager.dts
View File

@ -25,6 +25,7 @@
chosen {
bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = &scifa0;
};
memory@40000000 {

1
arch/arm/boot/dts/r8a7791-henninger.dts
View File

@ -23,6 +23,7 @@
chosen {
bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = &scif0;
};
memory@40000000 {

1
arch/arm/boot/dts/r8a7791-koelsch.dts
View File

@ -26,6 +26,7 @@
chosen {
bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = &scif0;
};
memory@40000000 {

1
arch/arm/boot/dts/r8a7794-alt.dts
View File

@ -21,6 +21,7 @@
chosen {
bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = &scif2;
};
memory@40000000 {

1
arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
View File

@ -40,6 +40,7 @@
chosen {
bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel rw";
stdout-path = &scifa4;
};
memory {

1
arch/arm/mach-shmobile/board-ape6evm-reference.c
View File

@ -44,7 +44,6 @@ static void __init ape6evm_add_standard_devices(void)
clk_put(parent);
clk_put(mp);
r8a73a4_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}

1
arch/arm/mach-shmobile/r8a73a4.h
View File

@ -11,7 +11,6 @@ enum {
};
void r8a73a4_add_standard_devices(void);
void r8a73a4_add_dt_devices(void);
void r8a73a4_clock_init(void);
void r8a73a4_pinmux_init(void);

9
arch/arm/mach-shmobile/setup-r8a73a4.c
View File

@ -176,18 +176,13 @@ static struct resource cmt1_resources[] = {
DEFINE_RES_IRQ(gic_spi(120)),
};
#define r8a7790_register_cmt(idx) \
#define r8a73a4_register_cmt(idx) \
platform_device_register_resndata(NULL, "sh-cmt-48-gen2", \
idx, cmt##idx##_resources, \
ARRAY_SIZE(cmt##idx##_resources), \
&cmt##idx##_platform_data, \
sizeof(struct sh_timer_config))
void __init r8a73a4_add_dt_devices(void)
{
r8a7790_register_cmt(1);
}
/* DMA */
static const struct sh_dmae_slave_config dma_slaves[] = {
{
@ -278,7 +273,7 @@ static struct resource dma_resources[] = {
void __init r8a73a4_add_standard_devices(void)
{
r8a73a4_add_dt_devices();
r8a73a4_register_cmt(1);
r8a73a4_register_scif(0);
r8a73a4_register_scif(1);
r8a73a4_register_scif(2);