drm/amd/display: simplify link_encoder
- remove unnecessary feature flags - remove wireless and VGA validation Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tony Cheng
Alex Deucher
parent
73c7260292
commit
4dfb0badee
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@ -317,7 +317,6 @@ static bool is_dp_sink_present(struct core_link *link)
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{
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enum gpio_result gpio_result;
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uint32_t clock_pin = 0;
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uint32_t data_pin = 0;
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struct ddc *ddc;
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@ -353,12 +352,7 @@ static bool is_dp_sink_present(struct core_link *link)
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gpio_result = dal_gpio_get_value(ddc->pin_clock, &clock_pin);
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ASSERT(gpio_result == GPIO_RESULT_OK);
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if (gpio_result == GPIO_RESULT_OK)
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if (link->link_enc->features.flags.bits.
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DP_SINK_DETECT_POLL_DATA_PIN)
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gpio_result = dal_gpio_get_value(ddc->pin_data, &data_pin);
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present = (gpio_result == GPIO_RESULT_OK) && !(clock_pin || data_pin);
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present = (gpio_result == GPIO_RESULT_OK) && !clock_pin;
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dal_ddc_close(ddc);
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@ -67,11 +67,6 @@
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#define HPD_REG(reg)\
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(enc110->hpd_regs->reg)
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/* For current ASICs pixel clock - 600MHz */
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#define MAX_ENCODER_CLK 600000
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#define DCE11_UNIPHY_MAX_PIXEL_CLK_IN_KHZ 594000
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#define DEFAULT_AUX_MAX_DATA_SIZE 16
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#define AUX_MAX_DEFER_WRITE_RETRY 20
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/*
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@ -845,18 +840,15 @@ bool dce110_link_encoder_validate_dvi_output(
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{
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uint32_t max_pixel_clock = TMDS_MAX_PIXEL_CLOCK;
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if (enc110->base.features.max_pixel_clock < TMDS_MAX_PIXEL_CLOCK)
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max_pixel_clock = enc110->base.features.max_pixel_clock;
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if (signal == SIGNAL_TYPE_DVI_DUAL_LINK)
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max_pixel_clock <<= 1;
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max_pixel_clock *= 2;
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/* This handles the case of HDMI downgrade to DVI we don't want to
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* we don't want to cap the pixel clock if the DDI is not DVI.
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*/
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if (connector_signal != SIGNAL_TYPE_DVI_DUAL_LINK &&
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connector_signal != SIGNAL_TYPE_DVI_SINGLE_LINK)
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max_pixel_clock = enc110->base.features.max_pixel_clock;
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max_pixel_clock = enc110->base.features.max_hdmi_pixel_clock;
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/* DVI only support RGB pixel encoding */
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if (crtc_timing->pixel_encoding != PIXEL_ENCODING_RGB)
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@ -893,9 +885,6 @@ static bool dce110_link_encoder_validate_hdmi_output(
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enum dc_color_depth max_deep_color =
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enc110->base.features.max_hdmi_deep_color;
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if (max_deep_color > enc110->base.features.max_deep_color)
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max_deep_color = enc110->base.features.max_deep_color;
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if (max_deep_color < crtc_timing->display_color_depth)
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return false;
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@ -903,8 +892,7 @@ static bool dce110_link_encoder_validate_hdmi_output(
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return false;
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if ((adjusted_pix_clk_khz == 0) ||
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(adjusted_pix_clk_khz > enc110->base.features.max_hdmi_pixel_clock) ||
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(adjusted_pix_clk_khz > enc110->base.features.max_pixel_clock))
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(adjusted_pix_clk_khz > enc110->base.features.max_hdmi_pixel_clock))
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return false;
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/* DCE11 HW does not support 420 */
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@ -915,19 +903,6 @@ static bool dce110_link_encoder_validate_hdmi_output(
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return true;
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}
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bool dce110_link_encoder_validate_rgb_output(
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const struct dce110_link_encoder *enc110,
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const struct dc_crtc_timing *crtc_timing)
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{
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if (crtc_timing->pix_clk_khz > enc110->base.features.max_pixel_clock)
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return false;
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if (crtc_timing->pixel_encoding != PIXEL_ENCODING_RGB)
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return false;
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return true;
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}
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bool dce110_link_encoder_validate_dp_output(
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const struct dce110_link_encoder *enc110,
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const struct dc_crtc_timing *crtc_timing)
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@ -949,21 +924,6 @@ bool dce110_link_encoder_validate_dp_output(
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return false;
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}
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bool dce110_link_encoder_validate_wireless_output(
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const struct dce110_link_encoder *enc110,
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const struct dc_crtc_timing *crtc_timing)
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{
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if (crtc_timing->pix_clk_khz > enc110->base.features.max_pixel_clock)
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return false;
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/* Wireless only supports YCbCr444 */
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if (crtc_timing->pixel_encoding ==
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PIXEL_ENCODING_YCBCR444)
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return true;
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return false;
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}
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bool dce110_link_encoder_construct(
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struct dce110_link_encoder *enc110,
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const struct encoder_init_data *init_data,
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@ -985,12 +945,6 @@ bool dce110_link_encoder_construct(
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enc110->base.transmitter = init_data->transmitter;
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enc110->base.features.flags.bits.IS_AUDIO_CAPABLE = true;
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enc110->base.features.max_pixel_clock =
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MAX_ENCODER_CLK;
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enc110->base.features.max_deep_color = COLOR_DEPTH_121212;
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enc110->base.features.max_hdmi_deep_color = COLOR_DEPTH_121212;
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if (enc110->base.ctx->dc->debug.disable_hdmi_deep_color)
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@ -1070,7 +1024,6 @@ bool dce110_link_encoder_construct(
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bp_cap_info.DP_HBR2_CAP;
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enc110->base.features.flags.bits.IS_HBR3_CAPABLE =
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bp_cap_info.DP_HBR3_EN;
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}
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/* TODO: check PPLIB maxPhyClockInKHz <= 540000, if yes,
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@ -1082,7 +1035,6 @@ bool dce110_link_encoder_construct(
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/* test pattern 4 support */
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enc110->base.features.flags.bits.IS_TPS4_CAPABLE = true;
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enc110->base.features.flags.bits.IS_Y_ONLY_CAPABLE = false;
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/*
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dal_adapter_service_is_feature_supported(as,
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FEATURE_SUPPORT_DP_Y_ONLY);
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@ -1118,22 +1070,14 @@ bool dce110_link_encoder_validate_output_with_stream(
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&stream->public.timing,
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stream->phy_pix_clk);
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break;
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case SIGNAL_TYPE_RGB:
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is_valid = dce110_link_encoder_validate_rgb_output(
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enc110, &stream->public.timing);
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break;
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case SIGNAL_TYPE_DISPLAY_PORT:
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case SIGNAL_TYPE_DISPLAY_PORT_MST:
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case SIGNAL_TYPE_EDP:
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is_valid = dce110_link_encoder_validate_dp_output(
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enc110, &stream->public.timing);
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break;
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case SIGNAL_TYPE_WIRELESS:
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is_valid = dce110_link_encoder_validate_wireless_output(
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enc110, &stream->public.timing);
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break;
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default:
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is_valid = true;
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is_valid = false;
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break;
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}
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@ -33,34 +33,16 @@ struct encoder_init_data {
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struct encoder_feature_support {
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union {
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struct {
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/* 1 - external encoder; 0 - internal encoder */
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uint32_t EXTERNAL_ENCODER:1;
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uint32_t ANALOG_ENCODER:1;
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uint32_t STEREO_SYNC:1;
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/* check the DDC data pin
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* when performing DP Sink detection */
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uint32_t DP_SINK_DETECT_POLL_DATA_PIN:1;
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/* CPLIB authentication
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* for external DP chip supported */
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uint32_t CPLIB_DP_AUTHENTICATION:1;
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uint32_t IS_HBR2_CAPABLE:1;
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uint32_t IS_HBR3_CAPABLE:1;
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uint32_t IS_HBR2_VALIDATED:1;
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uint32_t IS_TPS3_CAPABLE:1;
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uint32_t IS_TPS4_CAPABLE:1;
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uint32_t IS_AUDIO_CAPABLE:1;
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uint32_t IS_VCE_SUPPORTED:1;
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uint32_t IS_CONVERTER:1;
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uint32_t IS_Y_ONLY_CAPABLE:1;
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uint32_t IS_YCBCR_CAPABLE:1;
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} bits;
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uint32_t raw;
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} flags;
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/* maximum supported deep color depth */
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enum dc_color_depth max_deep_color;
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enum dc_color_depth max_hdmi_deep_color;
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/* maximum supported clock */
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unsigned int max_pixel_clock;
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unsigned int max_hdmi_pixel_clock;
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bool ycbcr420_supported;
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};
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@ -28,8 +28,6 @@
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#include "virtual_link_encoder.h"
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#define VIRTUAL_MAX_PIXEL_CLK_IN_KHZ 600000
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static bool virtual_link_encoder_validate_output_with_stream(
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struct link_encoder *enc,
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struct pipe_ctx *pipe_ctx) { return true; }
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@ -138,8 +136,6 @@ bool virtual_link_encoder_construct(
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enc->transmitter = init_data->transmitter;
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enc->features.max_pixel_clock = VIRTUAL_MAX_PIXEL_CLK_IN_KHZ;
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enc->output_signals = SIGNAL_TYPE_VIRTUAL;
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enc->preferred_engine = ENGINE_ID_VIRTUAL;
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