[SPARC64]: Handle unimplemented FPU square-root on Niagara.
The math-emu code only expects unfinished fpop traps when emulating FPU sqrt instructions on pre-Niagara chips. On Niagara we can get unimplemented fpop, so handle that. Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -206,9 +206,30 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f)
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case FSTOQ: TYPE(3,3,1,1,1,0,0); break;
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case FSTOQ: TYPE(3,3,1,1,1,0,0); break;
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case FDTOQ: TYPE(3,3,1,2,1,0,0); break;
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case FDTOQ: TYPE(3,3,1,2,1,0,0); break;
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case FQTOI: TYPE(3,1,0,3,1,0,0); break;
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case FQTOI: TYPE(3,1,0,3,1,0,0); break;
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/* We can get either unimplemented or unfinished
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* for these cases. Pre-Niagara systems generate
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* unfinished fpop for SUBNORMAL cases, and Niagara
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* always gives unimplemented fpop for fsqrt{s,d}.
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*/
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case FSQRTS: {
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unsigned long x = current_thread_info()->xfsr[0];
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x = (x >> 14) & 0xf;
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TYPE(x,1,1,1,1,0,0);
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printk("math-emu: type is %08x\n", type);
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break;
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}
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case FSQRTD: {
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unsigned long x = current_thread_info()->xfsr[0];
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x = (x >> 14) & 0xf;
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TYPE(x,2,1,2,1,0,0);
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break;
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}
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/* SUBNORMAL - ftt == 2 */
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/* SUBNORMAL - ftt == 2 */
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case FSQRTS: TYPE(2,1,1,1,1,0,0); break;
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case FSQRTD: TYPE(2,2,1,2,1,0,0); break;
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case FADDD:
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case FADDD:
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case FSUBD:
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case FSUBD:
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case FMULD:
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case FMULD:
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