sh: pci: Rework SH7780 host controller detection.

This reworks how the host controller is probed, and makes it a bit more
verbose in the event a new type of controller is detected. Additionally,
we also log the revision information.

This now uses the proper access sizes for the vendor/device registers,
rather than relying on a larger access that encapsulated both of them.
Not all devices support 32-bit read cycles for these registers.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2009-04-17 15:05:19 +09:00
parent 0bbc9bc318
commit 4e7b7fdb12
2 changed files with 26 additions and 21 deletions

View file

@ -34,33 +34,39 @@
int __init sh7780_pci_init(struct pci_channel *chan)
{
unsigned int id;
int ret, match = 0;
const char *type = NULL;
int ret;
pr_debug("PCI: Starting intialization.\n");
printk(KERN_NOTICE "PCI: Starting intialization.\n");
chan->reg_base = 0xfe040000;
chan->io_base = 0xfe200000;
ctrl_outl(0x00000001, SH7780_PCI_VCR2); /* Enable PCIC */
/* Enable CPU access to the PCIC registers. */
__raw_writel(PCIECR_ENBL, PCIECR);
/* check for SH7780/SH7780R hardware */
id = pci_read_reg(chan, SH7780_PCIVID);
if ((id & 0xffff) == SH7780_VENDOR_ID) {
switch ((id >> 16) & 0xffff) {
case SH7763_DEVICE_ID:
case SH7780_DEVICE_ID:
case SH7781_DEVICE_ID:
case SH7785_DEVICE_ID:
match = 1;
break;
}
}
if (unlikely(!match)) {
printk(KERN_ERR "PCI: This is not an SH7780 (%x)\n", id);
id = __raw_readw(chan->reg_base + SH7780_PCIVID);
if (id != SH7780_VENDOR_ID) {
printk(KERN_ERR "PCI: Unknown vendor ID 0x%04x.\n", id);
return -ENODEV;
}
id = __raw_readw(chan->reg_base + SH7780_PCIDID);
type = (id == SH7763_DEVICE_ID) ? "SH7763" :
(id == SH7780_DEVICE_ID) ? "SH7780" :
(id == SH7781_DEVICE_ID) ? "SH7781" :
(id == SH7785_DEVICE_ID) ? "SH7785" :
NULL;
if (unlikely(!type)) {
printk(KERN_ERR "PCI: Found an unsupported Renesas host "
"controller, device id 0x%04x.\n", id);
return -EINVAL;
}
printk(KERN_NOTICE "PCI: Found a Renesas %s host "
"controller, revision %d.\n", type,
__raw_readb(chan->reg_base + SH7780_PCIRID));
if ((ret = sh4_pci_check_direct(chan)) != 0)
return ret;

View file

@ -20,9 +20,8 @@
#define SH7785_DEVICE_ID 0x0007
/* SH7780 Control Registers */
#define SH7780_PCI_VCR0 0xFE000000
#define SH7780_PCI_VCR1 0xFE000004
#define SH7780_PCI_VCR2 0xFE000008
#define PCIECR 0xFE000008
#define PCIECR_ENBL 0x01
/* SH7780 Specific Values */
#define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */