drm/amdgpu: move atom functions from amdgpu_device.c
and move them to amdgpu_atombios.c for consistency. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>hifive-unleashed-5.1
Alex Deucher
parent
a89ff457d6
commit
4e89df63c1
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@ -27,6 +27,7 @@
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#include <drm/amdgpu_drm.h>
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#include "amdgpu.h"
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#include "amdgpu_atombios.h"
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#include "amdgpu_atomfirmware.h"
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#include "amdgpu_i2c.h"
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#include "atom.h"
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@ -1699,7 +1700,7 @@ void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock)
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WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch);
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}
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void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev)
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static void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev)
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{
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uint32_t bios_2_scratch, bios_6_scratch;
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@ -1776,7 +1777,7 @@ void amdgpu_atombios_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le)
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#endif
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}
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int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev)
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static int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev)
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{
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struct atom_context *ctx = adev->mode_info.atom_context;
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int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
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@ -1819,3 +1820,234 @@ int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev)
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ctx->scratch_size_bytes = usage_bytes;
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return 0;
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}
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/* ATOM accessor methods */
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/*
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* ATOM is an interpreted byte code stored in tables in the vbios. The
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* driver registers callbacks to access registers and the interpreter
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* in the driver parses the tables and executes then to program specific
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* actions (set display modes, asic init, etc.). See amdgpu_atombios.c,
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* atombios.h, and atom.c
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*/
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/**
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* cail_pll_read - read PLL register
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*
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* @info: atom card_info pointer
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* @reg: PLL register offset
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*
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* Provides a PLL register accessor for the atom interpreter (r4xx+).
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* Returns the value of the PLL register.
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*/
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static uint32_t cail_pll_read(struct card_info *info, uint32_t reg)
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{
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return 0;
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}
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/**
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* cail_pll_write - write PLL register
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*
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* @info: atom card_info pointer
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* @reg: PLL register offset
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* @val: value to write to the pll register
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*
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* Provides a PLL register accessor for the atom interpreter (r4xx+).
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*/
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static void cail_pll_write(struct card_info *info, uint32_t reg, uint32_t val)
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{
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}
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/**
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* cail_mc_read - read MC (Memory Controller) register
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*
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* @info: atom card_info pointer
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* @reg: MC register offset
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*
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* Provides an MC register accessor for the atom interpreter (r4xx+).
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* Returns the value of the MC register.
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*/
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static uint32_t cail_mc_read(struct card_info *info, uint32_t reg)
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{
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return 0;
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}
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/**
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* cail_mc_write - write MC (Memory Controller) register
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*
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* @info: atom card_info pointer
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* @reg: MC register offset
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* @val: value to write to the pll register
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*
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* Provides a MC register accessor for the atom interpreter (r4xx+).
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*/
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static void cail_mc_write(struct card_info *info, uint32_t reg, uint32_t val)
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{
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}
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/**
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* cail_reg_write - write MMIO register
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*
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* @info: atom card_info pointer
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* @reg: MMIO register offset
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* @val: value to write to the pll register
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*
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* Provides a MMIO register accessor for the atom interpreter (r4xx+).
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*/
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static void cail_reg_write(struct card_info *info, uint32_t reg, uint32_t val)
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{
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struct amdgpu_device *adev = info->dev->dev_private;
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WREG32(reg, val);
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}
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/**
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* cail_reg_read - read MMIO register
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*
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* @info: atom card_info pointer
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* @reg: MMIO register offset
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*
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* Provides an MMIO register accessor for the atom interpreter (r4xx+).
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* Returns the value of the MMIO register.
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*/
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static uint32_t cail_reg_read(struct card_info *info, uint32_t reg)
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{
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struct amdgpu_device *adev = info->dev->dev_private;
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uint32_t r;
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r = RREG32(reg);
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return r;
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}
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/**
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* cail_ioreg_write - write IO register
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*
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* @info: atom card_info pointer
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* @reg: IO register offset
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* @val: value to write to the pll register
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*
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* Provides a IO register accessor for the atom interpreter (r4xx+).
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*/
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static void cail_ioreg_write(struct card_info *info, uint32_t reg, uint32_t val)
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{
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struct amdgpu_device *adev = info->dev->dev_private;
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WREG32_IO(reg, val);
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}
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/**
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* cail_ioreg_read - read IO register
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*
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* @info: atom card_info pointer
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* @reg: IO register offset
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*
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* Provides an IO register accessor for the atom interpreter (r4xx+).
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* Returns the value of the IO register.
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*/
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static uint32_t cail_ioreg_read(struct card_info *info, uint32_t reg)
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{
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struct amdgpu_device *adev = info->dev->dev_private;
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uint32_t r;
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r = RREG32_IO(reg);
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return r;
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}
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static ssize_t amdgpu_atombios_get_vbios_version(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct drm_device *ddev = dev_get_drvdata(dev);
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struct amdgpu_device *adev = ddev->dev_private;
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struct atom_context *ctx = adev->mode_info.atom_context;
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return snprintf(buf, PAGE_SIZE, "%s\n", ctx->vbios_version);
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}
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static DEVICE_ATTR(vbios_version, 0444, amdgpu_atombios_get_vbios_version,
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NULL);
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/**
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* amdgpu_atombios_fini - free the driver info and callbacks for atombios
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*
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* @adev: amdgpu_device pointer
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*
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* Frees the driver info and register access callbacks for the ATOM
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* interpreter (r4xx+).
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* Called at driver shutdown.
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*/
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void amdgpu_atombios_fini(struct amdgpu_device *adev)
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{
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if (adev->mode_info.atom_context) {
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kfree(adev->mode_info.atom_context->scratch);
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kfree(adev->mode_info.atom_context->iio);
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}
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kfree(adev->mode_info.atom_context);
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adev->mode_info.atom_context = NULL;
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kfree(adev->mode_info.atom_card_info);
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adev->mode_info.atom_card_info = NULL;
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device_remove_file(adev->dev, &dev_attr_vbios_version);
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}
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/**
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* amdgpu_atombios_init - init the driver info and callbacks for atombios
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*
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* @adev: amdgpu_device pointer
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*
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* Initializes the driver info and register access callbacks for the
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* ATOM interpreter (r4xx+).
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* Returns 0 on sucess, -ENOMEM on failure.
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* Called at driver startup.
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*/
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int amdgpu_atombios_init(struct amdgpu_device *adev)
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{
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struct card_info *atom_card_info =
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kzalloc(sizeof(struct card_info), GFP_KERNEL);
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int ret;
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if (!atom_card_info)
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return -ENOMEM;
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adev->mode_info.atom_card_info = atom_card_info;
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atom_card_info->dev = adev->ddev;
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atom_card_info->reg_read = cail_reg_read;
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atom_card_info->reg_write = cail_reg_write;
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/* needed for iio ops */
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if (adev->rio_mem) {
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atom_card_info->ioreg_read = cail_ioreg_read;
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atom_card_info->ioreg_write = cail_ioreg_write;
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} else {
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DRM_DEBUG("PCI I/O BAR is not found. Using MMIO to access ATOM BIOS\n");
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atom_card_info->ioreg_read = cail_reg_read;
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atom_card_info->ioreg_write = cail_reg_write;
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}
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atom_card_info->mc_read = cail_mc_read;
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atom_card_info->mc_write = cail_mc_write;
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atom_card_info->pll_read = cail_pll_read;
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atom_card_info->pll_write = cail_pll_write;
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adev->mode_info.atom_context = amdgpu_atom_parse(atom_card_info, adev->bios);
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if (!adev->mode_info.atom_context) {
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amdgpu_atombios_fini(adev);
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return -ENOMEM;
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}
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mutex_init(&adev->mode_info.atom_context->mutex);
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if (adev->is_atom_fw) {
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amdgpu_atomfirmware_scratch_regs_init(adev);
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amdgpu_atomfirmware_allocate_fb_scratch(adev);
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} else {
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amdgpu_atombios_scratch_regs_init(adev);
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amdgpu_atombios_allocate_fb_scratch(adev);
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}
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ret = device_create_file(adev->dev, &dev_attr_vbios_version);
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if (ret) {
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DRM_ERROR("Failed to create device file for VBIOS version\n");
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return ret;
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}
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return 0;
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}
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@ -195,7 +195,6 @@ int amdgpu_atombios_init_mc_reg_table(struct amdgpu_device *adev,
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bool amdgpu_atombios_has_gpu_virtualization_table(struct amdgpu_device *adev);
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void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock);
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void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev);
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void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev,
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bool hung);
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bool amdgpu_atombios_scratch_need_asic_init(struct amdgpu_device *adev);
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@ -217,6 +216,7 @@ int amdgpu_atombios_get_svi2_info(struct amdgpu_device *adev,
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u8 voltage_type,
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u8 *svd_gpio_id, u8 *svc_gpio_id);
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int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev);
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void amdgpu_atombios_fini(struct amdgpu_device *adev);
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int amdgpu_atombios_init(struct amdgpu_device *adev);
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#endif
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@ -898,237 +898,6 @@ void amdgpu_dummy_page_fini(struct amdgpu_device *adev)
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adev->dummy_page.page = NULL;
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}
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/* ATOM accessor methods */
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/*
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* ATOM is an interpreted byte code stored in tables in the vbios. The
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* driver registers callbacks to access registers and the interpreter
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* in the driver parses the tables and executes then to program specific
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* actions (set display modes, asic init, etc.). See amdgpu_atombios.c,
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* atombios.h, and atom.c
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*/
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/**
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* cail_pll_read - read PLL register
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*
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* @info: atom card_info pointer
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* @reg: PLL register offset
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*
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* Provides a PLL register accessor for the atom interpreter (r4xx+).
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* Returns the value of the PLL register.
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*/
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static uint32_t cail_pll_read(struct card_info *info, uint32_t reg)
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{
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return 0;
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}
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/**
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* cail_pll_write - write PLL register
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*
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* @info: atom card_info pointer
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* @reg: PLL register offset
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* @val: value to write to the pll register
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*
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* Provides a PLL register accessor for the atom interpreter (r4xx+).
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*/
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static void cail_pll_write(struct card_info *info, uint32_t reg, uint32_t val)
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{
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}
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/**
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* cail_mc_read - read MC (Memory Controller) register
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*
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* @info: atom card_info pointer
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* @reg: MC register offset
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*
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* Provides an MC register accessor for the atom interpreter (r4xx+).
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* Returns the value of the MC register.
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*/
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static uint32_t cail_mc_read(struct card_info *info, uint32_t reg)
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{
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return 0;
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}
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/**
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* cail_mc_write - write MC (Memory Controller) register
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*
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* @info: atom card_info pointer
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* @reg: MC register offset
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* @val: value to write to the pll register
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*
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* Provides a MC register accessor for the atom interpreter (r4xx+).
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*/
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static void cail_mc_write(struct card_info *info, uint32_t reg, uint32_t val)
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{
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}
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/**
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* cail_reg_write - write MMIO register
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*
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* @info: atom card_info pointer
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* @reg: MMIO register offset
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* @val: value to write to the pll register
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*
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* Provides a MMIO register accessor for the atom interpreter (r4xx+).
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*/
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static void cail_reg_write(struct card_info *info, uint32_t reg, uint32_t val)
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{
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struct amdgpu_device *adev = info->dev->dev_private;
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WREG32(reg, val);
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}
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/**
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* cail_reg_read - read MMIO register
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*
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* @info: atom card_info pointer
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* @reg: MMIO register offset
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*
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* Provides an MMIO register accessor for the atom interpreter (r4xx+).
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* Returns the value of the MMIO register.
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*/
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static uint32_t cail_reg_read(struct card_info *info, uint32_t reg)
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{
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struct amdgpu_device *adev = info->dev->dev_private;
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uint32_t r;
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r = RREG32(reg);
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return r;
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}
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/**
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* cail_ioreg_write - write IO register
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*
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* @info: atom card_info pointer
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* @reg: IO register offset
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* @val: value to write to the pll register
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*
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* Provides a IO register accessor for the atom interpreter (r4xx+).
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*/
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static void cail_ioreg_write(struct card_info *info, uint32_t reg, uint32_t val)
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{
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struct amdgpu_device *adev = info->dev->dev_private;
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WREG32_IO(reg, val);
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}
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/**
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* cail_ioreg_read - read IO register
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*
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* @info: atom card_info pointer
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* @reg: IO register offset
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*
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* Provides an IO register accessor for the atom interpreter (r4xx+).
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* Returns the value of the IO register.
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*/
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static uint32_t cail_ioreg_read(struct card_info *info, uint32_t reg)
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{
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struct amdgpu_device *adev = info->dev->dev_private;
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uint32_t r;
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r = RREG32_IO(reg);
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return r;
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}
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static ssize_t amdgpu_atombios_get_vbios_version(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct drm_device *ddev = dev_get_drvdata(dev);
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struct amdgpu_device *adev = ddev->dev_private;
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struct atom_context *ctx = adev->mode_info.atom_context;
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return snprintf(buf, PAGE_SIZE, "%s\n", ctx->vbios_version);
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}
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static DEVICE_ATTR(vbios_version, 0444, amdgpu_atombios_get_vbios_version,
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NULL);
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/**
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* amdgpu_atombios_fini - free the driver info and callbacks for atombios
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*
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* @adev: amdgpu_device pointer
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*
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* Frees the driver info and register access callbacks for the ATOM
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* interpreter (r4xx+).
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* Called at driver shutdown.
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*/
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static void amdgpu_atombios_fini(struct amdgpu_device *adev)
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{
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if (adev->mode_info.atom_context) {
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kfree(adev->mode_info.atom_context->scratch);
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kfree(adev->mode_info.atom_context->iio);
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}
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kfree(adev->mode_info.atom_context);
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adev->mode_info.atom_context = NULL;
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kfree(adev->mode_info.atom_card_info);
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adev->mode_info.atom_card_info = NULL;
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device_remove_file(adev->dev, &dev_attr_vbios_version);
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}
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/**
|
||||
* amdgpu_atombios_init - init the driver info and callbacks for atombios
|
||||
*
|
||||
* @adev: amdgpu_device pointer
|
||||
*
|
||||
* Initializes the driver info and register access callbacks for the
|
||||
* ATOM interpreter (r4xx+).
|
||||
* Returns 0 on sucess, -ENOMEM on failure.
|
||||
* Called at driver startup.
|
||||
*/
|
||||
static int amdgpu_atombios_init(struct amdgpu_device *adev)
|
||||
{
|
||||
struct card_info *atom_card_info =
|
||||
kzalloc(sizeof(struct card_info), GFP_KERNEL);
|
||||
int ret;
|
||||
|
||||
if (!atom_card_info)
|
||||
return -ENOMEM;
|
||||
|
||||
adev->mode_info.atom_card_info = atom_card_info;
|
||||
atom_card_info->dev = adev->ddev;
|
||||
atom_card_info->reg_read = cail_reg_read;
|
||||
atom_card_info->reg_write = cail_reg_write;
|
||||
/* needed for iio ops */
|
||||
if (adev->rio_mem) {
|
||||
atom_card_info->ioreg_read = cail_ioreg_read;
|
||||
atom_card_info->ioreg_write = cail_ioreg_write;
|
||||
} else {
|
||||
DRM_DEBUG("PCI I/O BAR is not found. Using MMIO to access ATOM BIOS\n");
|
||||
atom_card_info->ioreg_read = cail_reg_read;
|
||||
atom_card_info->ioreg_write = cail_reg_write;
|
||||
}
|
||||
atom_card_info->mc_read = cail_mc_read;
|
||||
atom_card_info->mc_write = cail_mc_write;
|
||||
atom_card_info->pll_read = cail_pll_read;
|
||||
atom_card_info->pll_write = cail_pll_write;
|
||||
|
||||
adev->mode_info.atom_context = amdgpu_atom_parse(atom_card_info, adev->bios);
|
||||
if (!adev->mode_info.atom_context) {
|
||||
amdgpu_atombios_fini(adev);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
mutex_init(&adev->mode_info.atom_context->mutex);
|
||||
if (adev->is_atom_fw) {
|
||||
amdgpu_atomfirmware_scratch_regs_init(adev);
|
||||
amdgpu_atomfirmware_allocate_fb_scratch(adev);
|
||||
} else {
|
||||
amdgpu_atombios_scratch_regs_init(adev);
|
||||
amdgpu_atombios_allocate_fb_scratch(adev);
|
||||
}
|
||||
|
||||
ret = device_create_file(adev->dev, &dev_attr_vbios_version);
|
||||
if (ret) {
|
||||
DRM_ERROR("Failed to create device file for VBIOS version\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* if we get transitioned to only one device, take VGA back */
|
||||
/**
|
||||
* amdgpu_vga_set_decode - enable/disable vga decode
|
||||
|
|
|
|||
Loading…
Reference in New Issue