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ARM: dts: imx6qdl-icore-rqs: Move Sound nodes to dtsi 

imx6q, imx6dl icore-rqs modules share common sound nodes,
so move the sound nodes from imx6q-icore-rqs into dtsi so-that
both can share the common node details.

And also replace codec: sgtl5000@0a => sgtl5000: codec@a
on imx6q-icore-rqs.dts to [label:] node-name[@unit-address]
according to devicetree specification from ePAPER v1.1

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
hifive-unleashed-5.1
Jagan Teki 2017-09-18 16:58:30 +05:30 committed by Shawn Guo
parent bf04a32b43
commit 4f0c2c754e
2 changed files with 22 additions and 24 deletions
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24
arch/arm/boot/dts/imx6q-icore-rqs.dts
View File

@ -47,30 +47,6 @@
/ {
model = "Engicam i.CoreM6 Quad/Dual RQS Starter Kit";
compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
sound {
compatible = "fsl,imx-audio-sgtl5000";
model = "imx-audio-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&codec>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
mux-ext-port = <4>;
};
};
&i2c3 {
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
VDDD-supply = <&reg_1p8v>;
};
};
&sata {

22
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
View File

@ -118,6 +118,19 @@
clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
clock-names = "refclk";
};
sound {
compatible = "fsl,imx-audio-sgtl5000";
model = "imx-audio-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
mux-ext-port = <4>;
};
};
&clks {
@ -174,6 +187,15 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
VDDD-supply = <&reg_1p8v>;
};
};
&pcie {