usb: musb: Add context save and restore support
Adding support for MUSB register save and restore during system
suspend and resume.
Changes:
- Added musb_save/restore_context() functions
- Added platform specific musb_platform_save/restore_context()
to handle platform specific jobs.
- Maintaining BlackFin compatibility by adding read/write
functions for registers which are not available in BlackFin
Tested system suspend and resume on OMAP3EVM board.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
hifive-unleashed-5.1
Ajay Kumar Gupta
Greg Kroah-Hartman
parent
8af6096caf
commit
4f712e010b
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@ -2167,6 +2167,148 @@ static int __exit musb_remove(struct platform_device *pdev)
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#ifdef CONFIG_PM
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static struct musb_context_registers musb_context;
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void musb_save_context(struct musb *musb)
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{
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int i;
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void __iomem *musb_base = musb->mregs;
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if (is_host_enabled(musb)) {
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musb_context.frame = musb_readw(musb_base, MUSB_FRAME);
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musb_context.testmode = musb_readb(musb_base, MUSB_TESTMODE);
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}
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musb_context.power = musb_readb(musb_base, MUSB_POWER);
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musb_context.intrtxe = musb_readw(musb_base, MUSB_INTRTXE);
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musb_context.intrrxe = musb_readw(musb_base, MUSB_INTRRXE);
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musb_context.intrusbe = musb_readb(musb_base, MUSB_INTRUSBE);
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musb_context.index = musb_readb(musb_base, MUSB_INDEX);
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musb_context.devctl = musb_readb(musb_base, MUSB_DEVCTL);
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for (i = 0; i < MUSB_C_NUM_EPS; ++i) {
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musb_writeb(musb_base, MUSB_INDEX, i);
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musb_context.index_regs[i].txmaxp =
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musb_readw(musb_base, 0x10 + MUSB_TXMAXP);
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musb_context.index_regs[i].txcsr =
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musb_readw(musb_base, 0x10 + MUSB_TXCSR);
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musb_context.index_regs[i].rxmaxp =
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musb_readw(musb_base, 0x10 + MUSB_RXMAXP);
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musb_context.index_regs[i].rxcsr =
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musb_readw(musb_base, 0x10 + MUSB_RXCSR);
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if (musb->dyn_fifo) {
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musb_context.index_regs[i].txfifoadd =
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musb_read_txfifoadd(musb_base);
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musb_context.index_regs[i].rxfifoadd =
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musb_read_rxfifoadd(musb_base);
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musb_context.index_regs[i].txfifosz =
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musb_read_txfifosz(musb_base);
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musb_context.index_regs[i].rxfifosz =
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musb_read_rxfifosz(musb_base);
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}
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if (is_host_enabled(musb)) {
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musb_context.index_regs[i].txtype =
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musb_readb(musb_base, 0x10 + MUSB_TXTYPE);
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musb_context.index_regs[i].txinterval =
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musb_readb(musb_base, 0x10 + MUSB_TXINTERVAL);
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musb_context.index_regs[i].rxtype =
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musb_readb(musb_base, 0x10 + MUSB_RXTYPE);
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musb_context.index_regs[i].rxinterval =
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musb_readb(musb_base, 0x10 + MUSB_RXINTERVAL);
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musb_context.index_regs[i].txfunaddr =
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musb_read_txfunaddr(musb_base, i);
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musb_context.index_regs[i].txhubaddr =
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musb_read_txhubaddr(musb_base, i);
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musb_context.index_regs[i].txhubport =
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musb_read_txhubport(musb_base, i);
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musb_context.index_regs[i].rxfunaddr =
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musb_read_rxfunaddr(musb_base, i);
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musb_context.index_regs[i].rxhubaddr =
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musb_read_rxhubaddr(musb_base, i);
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musb_context.index_regs[i].rxhubport =
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musb_read_rxhubport(musb_base, i);
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}
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}
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musb_writeb(musb_base, MUSB_INDEX, musb_context.index);
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musb_platform_save_context(&musb_context);
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}
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void musb_restore_context(struct musb *musb)
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{
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int i;
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void __iomem *musb_base = musb->mregs;
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void __iomem *ep_target_regs;
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musb_platform_restore_context(&musb_context);
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if (is_host_enabled(musb)) {
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musb_writew(musb_base, MUSB_FRAME, musb_context.frame);
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musb_writeb(musb_base, MUSB_TESTMODE, musb_context.testmode);
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}
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musb_writeb(musb_base, MUSB_POWER, musb_context.power);
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musb_writew(musb_base, MUSB_INTRTXE, musb_context.intrtxe);
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musb_writew(musb_base, MUSB_INTRRXE, musb_context.intrrxe);
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musb_writeb(musb_base, MUSB_INTRUSBE, musb_context.intrusbe);
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musb_writeb(musb_base, MUSB_DEVCTL, musb_context.devctl);
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for (i = 0; i < MUSB_C_NUM_EPS; ++i) {
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musb_writeb(musb_base, MUSB_INDEX, i);
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musb_writew(musb_base, 0x10 + MUSB_TXMAXP,
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musb_context.index_regs[i].txmaxp);
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musb_writew(musb_base, 0x10 + MUSB_TXCSR,
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musb_context.index_regs[i].txcsr);
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musb_writew(musb_base, 0x10 + MUSB_RXMAXP,
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musb_context.index_regs[i].rxmaxp);
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musb_writew(musb_base, 0x10 + MUSB_RXCSR,
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musb_context.index_regs[i].rxcsr);
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if (musb->dyn_fifo) {
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musb_write_txfifosz(musb_base,
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musb_context.index_regs[i].txfifosz);
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musb_write_rxfifosz(musb_base,
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musb_context.index_regs[i].rxfifosz);
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musb_write_txfifoadd(musb_base,
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musb_context.index_regs[i].txfifoadd);
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musb_write_rxfifoadd(musb_base,
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musb_context.index_regs[i].rxfifoadd);
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}
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if (is_host_enabled(musb)) {
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musb_writeb(musb_base, 0x10 + MUSB_TXTYPE,
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musb_context.index_regs[i].txtype);
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musb_writeb(musb_base, 0x10 + MUSB_TXINTERVAL,
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musb_context.index_regs[i].txinterval);
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musb_writeb(musb_base, 0x10 + MUSB_RXTYPE,
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musb_context.index_regs[i].rxtype);
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musb_writeb(musb_base, 0x10 + MUSB_RXINTERVAL,
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musb_context.index_regs[i].rxinterval);
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musb_write_txfunaddr(musb_base, i,
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musb_context.index_regs[i].txfunaddr);
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musb_write_txhubaddr(musb_base, i,
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musb_context.index_regs[i].txhubaddr);
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musb_write_txhubport(musb_base, i,
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musb_context.index_regs[i].txhubport);
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ep_target_regs =
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musb_read_target_reg_base(i, musb_base);
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musb_write_rxfunaddr(ep_target_regs,
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musb_context.index_regs[i].rxfunaddr);
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musb_write_rxhubaddr(ep_target_regs,
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musb_context.index_regs[i].rxhubaddr);
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musb_write_rxhubport(ep_target_regs,
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musb_context.index_regs[i].rxhubport);
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}
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}
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musb_writeb(musb_base, MUSB_INDEX, musb_context.index);
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}
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static int musb_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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@ -2188,6 +2330,8 @@ static int musb_suspend(struct device *dev)
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*/
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}
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musb_save_context(musb);
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if (musb->set_clock)
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musb->set_clock(musb->clock, 0);
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else
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@ -2209,6 +2353,8 @@ static int musb_resume_noirq(struct device *dev)
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else
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clk_enable(musb->clock);
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musb_restore_context(musb);
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/* for static cmos like DaVinci, register values were preserved
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* unless for some reason the whole soc powered down or the USB
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* module got reset through the PSC (vs just being disabled).
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@ -454,6 +454,45 @@ struct musb {
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#endif
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};
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#ifdef CONFIG_PM
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struct musb_csr_regs {
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/* FIFO registers */
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u16 txmaxp, txcsr, rxmaxp, rxcsr;
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u16 rxfifoadd, txfifoadd;
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u8 txtype, txinterval, rxtype, rxinterval;
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u8 rxfifosz, txfifosz;
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u8 txfunaddr, txhubaddr, txhubport;
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u8 rxfunaddr, rxhubaddr, rxhubport;
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};
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struct musb_context_registers {
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#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP2430)
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u32 otg_sysconfig, otg_forcestandby;
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#endif
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u8 power;
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u16 intrtxe, intrrxe;
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u8 intrusbe;
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u16 frame;
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u8 index, testmode;
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u8 devctl, misc;
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struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
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};
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#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP2430)
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extern void musb_platform_save_context(struct musb_context_registers
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*musb_context);
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extern void musb_platform_restore_context(struct musb_context_registers
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*musb_context);
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#else
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#define musb_platform_save_context(x) do {} while (0)
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#define musb_platform_restore_context(x) do {} while (0)
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#endif
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#endif
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static inline void musb_set_vbus(struct musb *musb, int is_on)
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{
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musb->board_set_vbus(musb, is_on);
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@ -326,6 +326,26 @@ static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
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musb_writew(mbase, MUSB_RXFIFOADD, c_off);
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}
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static inline u8 musb_read_txfifosz(void __iomem *mbase)
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{
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return musb_readb(mbase, MUSB_TXFIFOSZ);
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}
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static inline u16 musb_read_txfifoadd(void __iomem *mbase)
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{
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return musb_readw(mbase, MUSB_TXFIFOADD);
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}
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static inline u8 musb_read_rxfifosz(void __iomem *mbase)
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{
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return musb_readb(mbase, MUSB_RXFIFOSZ);
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}
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static inline u16 musb_read_rxfifoadd(void __iomem *mbase)
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{
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return musb_readw(mbase, MUSB_RXFIFOADD);
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}
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static inline u8 musb_read_configdata(void __iomem *mbase)
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{
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musb_writeb(mbase, MUSB_INDEX, 0);
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@ -381,6 +401,36 @@ static inline void musb_write_txhubport(void __iomem *mbase, u8 epnum,
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qh_h_port_reg);
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}
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static inline u8 musb_read_rxfunaddr(void __iomem *mbase, u8 epnum)
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{
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return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXFUNCADDR));
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}
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static inline u8 musb_read_rxhubaddr(void __iomem *mbase, u8 epnum)
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{
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return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXHUBADDR));
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}
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static inline u8 musb_read_rxhubport(void __iomem *mbase, u8 epnum)
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{
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return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXHUBPORT));
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}
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static inline u8 musb_read_txfunaddr(void __iomem *mbase, u8 epnum)
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{
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return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXFUNCADDR));
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}
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static inline u8 musb_read_txhubaddr(void __iomem *mbase, u8 epnum)
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{
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return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBADDR));
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}
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static inline u8 musb_read_txhubport(void __iomem *mbase, u8 epnum)
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{
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return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBPORT));
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}
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#else /* CONFIG_BLACKFIN */
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#define USB_BASE USB_FADDR
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@ -460,6 +510,22 @@ static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
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{
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}
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static inline u8 musb_read_txfifosz(void __iomem *mbase)
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{
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}
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static inline u16 musb_read_txfifoadd(void __iomem *mbase)
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{
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}
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static inline u8 musb_read_rxfifosz(void __iomem *mbase)
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{
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}
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static inline u16 musb_read_rxfifoadd(void __iomem *mbase)
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{
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}
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static inline u8 musb_read_configdata(void __iomem *mbase)
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{
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return 0;
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@ -505,6 +571,30 @@ static inline void musb_write_txhubport(void __iomem *mbase, u8 epnum,
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{
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}
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static inline u8 musb_read_rxfunaddr(void __iomem *mbase, u8 epnum)
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{
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}
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static inline u8 musb_read_rxhubaddr(void __iomem *mbase, u8 epnum)
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{
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}
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static inline u8 musb_read_rxhubport(void __iomem *mbase, u8 epnum)
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{
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}
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static inline u8 musb_read_txfunaddr(void __iomem *mbase, u8 epnum)
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{
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}
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static inline u8 musb_read_txhubaddr(void __iomem *mbase, u8 epnum)
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{
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}
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static inline void musb_read_txhubport(void __iomem *mbase, u8 epnum)
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{
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}
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#endif /* CONFIG_BLACKFIN */
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#endif /* __MUSB_REGS_H__ */
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@ -255,6 +255,22 @@ int __init musb_platform_init(struct musb *musb)
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return 0;
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}
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#ifdef CONFIG_PM
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void musb_platform_save_context(struct musb_context_registers
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*musb_context)
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{
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musb_context->otg_sysconfig = omap_readl(OTG_SYSCONFIG);
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musb_context->otg_forcestandby = omap_readl(OTG_FORCESTDBY);
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}
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void musb_platform_restore_context(struct musb_context_registers
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*musb_context)
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{
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omap_writel(musb_context->otg_sysconfig, OTG_SYSCONFIG);
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omap_writel(musb_context->otg_forcestandby, OTG_FORCESTDBY);
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}
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#endif
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int musb_platform_suspend(struct musb *musb)
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{
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u32 l;
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