drm/i915/lvds: Unlock the PP register when panel-fitting
As we do not wait for the panel to turn off when we need to adjust the panel-fitting registers we also need to unlock the PLLs as with the non-pfit update path. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -97,6 +97,7 @@ static void intel_lvds_set_power(struct intel_lvds *intel_lvds, bool on)
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DRM_ERROR("timed out waiting for panel to power off\n");
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DRM_ERROR("timed out waiting for panel to power off\n");
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I915_WRITE(PFIT_CONTROL, 0);
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I915_WRITE(PFIT_CONTROL, 0);
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intel_lvds->pfit_control = 0;
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intel_lvds->pfit_control = 0;
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intel_lvds->pfit_dirty = false;
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}
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}
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I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
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I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
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@ -377,8 +378,8 @@ static void intel_lvds_prepare(struct drm_encoder *encoder)
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I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
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I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
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} else if (intel_lvds->pfit_dirty) {
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} else if (intel_lvds->pfit_dirty) {
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I915_WRITE(PP_CONTROL,
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I915_WRITE(PP_CONTROL,
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I915_READ(PP_CONTROL) & ~POWER_TARGET_ON);
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(I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS)
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I915_WRITE(LVDS, I915_READ(LVDS) & ~LVDS_PORT_EN);
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& ~POWER_TARGET_ON);
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} else {
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} else {
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I915_WRITE(PP_CONTROL,
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I915_WRITE(PP_CONTROL,
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I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
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I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
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@ -438,6 +439,9 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder,
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* screen. Should be enabled before the pipe is enabled, according to
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* screen. Should be enabled before the pipe is enabled, according to
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* register description and PRM.
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* register description and PRM.
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*/
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*/
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DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
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intel_lvds->pfit_control,
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intel_lvds->pfit_pgm_ratios);
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if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
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if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
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DRM_ERROR("timed out waiting for panel to power off\n");
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DRM_ERROR("timed out waiting for panel to power off\n");
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