[PATCH] dvb: frontend: mt352: fix signal strength reading
Fix two problems with the signal strength value in the mt352.c frontend: 1. the 4 most significant bits are zeroed - shift and mask wrong way round 2. need to align the 12 bits from the registers at the top of the 16 bit returned value - otherwise the range is not 0 to 0xffff its 0xf000 to 0xffff Signed-off-by: Barry Scott <barry.scott@onelan.co.uk> Signed-off-by: Johannes Stezenbach <js@linuxtv.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -462,9 +462,11 @@ static int mt352_read_signal_strength(struct dvb_frontend* fe, u16* strength)
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{
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struct mt352_state* state = fe->demodulator_priv;
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u16 signal = ((mt352_read_register(state, AGC_GAIN_1) << 8) & 0x0f) |
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(mt352_read_register(state, AGC_GAIN_0));
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/* align the 12 bit AGC gain with the most significant bits */
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u16 signal = ((mt352_read_register(state, AGC_GAIN_1) & 0x0f) << 12) |
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(mt352_read_register(state, AGC_GAIN_0) << 4);
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/* inverse of gain is signal strength */
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*strength = ~signal;
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return 0;
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}
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