[PATCH] skge: phy lock deadlock
Cleanup the phy_lock deadlock because of relocking in the nway_reset path. Reported by Francois Romieu. Also, don't need to do irqsave/restore for blink, just excluding bh is good enough. Signed-off-by: Stephen Hemminger <shemminger@osdl.org> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
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@ -668,14 +668,13 @@ static void skge_blink_timer(unsigned long data)
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{
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{
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struct skge_port *skge = (struct skge_port *) data;
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struct skge_port *skge = (struct skge_port *) data;
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struct skge_hw *hw = skge->hw;
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struct skge_hw *hw = skge->hw;
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unsigned long flags;
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spin_lock_irqsave(&hw->phy_lock, flags);
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spin_lock_bh(&hw->phy_lock);
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if (skge->blink_on)
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if (skge->blink_on)
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skge_led_on(hw, skge->port);
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skge_led_on(hw, skge->port);
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else
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else
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skge_led_off(hw, skge->port);
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skge_led_off(hw, skge->port);
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spin_unlock_irqrestore(&hw->phy_lock, flags);
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spin_unlock_bh(&hw->phy_lock);
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skge->blink_on = !skge->blink_on;
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skge->blink_on = !skge->blink_on;
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mod_timer(&skge->led_blink, jiffies + BLINK_HZ);
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mod_timer(&skge->led_blink, jiffies + BLINK_HZ);
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@ -1208,7 +1207,6 @@ static void genesis_mac_init(struct skge_hw *hw, int port)
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* namely for the 1000baseTX cards that use the XMAC's
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* namely for the 1000baseTX cards that use the XMAC's
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* GMII mode.
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* GMII mode.
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*/
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*/
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spin_lock_bh(&hw->phy_lock);
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/* Take external Phy out of reset */
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/* Take external Phy out of reset */
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r = skge_read32(hw, B2_GP_IO);
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r = skge_read32(hw, B2_GP_IO);
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if (port == 0)
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if (port == 0)
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@ -1218,7 +1216,6 @@ static void genesis_mac_init(struct skge_hw *hw, int port)
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skge_write32(hw, B2_GP_IO, r);
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skge_write32(hw, B2_GP_IO, r);
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skge_read32(hw, B2_GP_IO);
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skge_read32(hw, B2_GP_IO);
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spin_unlock_bh(&hw->phy_lock);
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/* Enable GMII interfac */
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/* Enable GMII interfac */
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xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD);
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xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD);
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@ -1744,9 +1741,7 @@ static void yukon_mac_init(struct skge_hw *hw, int port)
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gma_write16(hw, port, GM_GP_CTRL, reg);
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gma_write16(hw, port, GM_GP_CTRL, reg);
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skge_read16(hw, GMAC_IRQ_SRC);
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skge_read16(hw, GMAC_IRQ_SRC);
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spin_lock_bh(&hw->phy_lock);
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yukon_init(hw, port);
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yukon_init(hw, port);
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spin_unlock_bh(&hw->phy_lock);
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/* MIB clear */
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/* MIB clear */
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reg = gma_read16(hw, port, GM_PHY_ADDR);
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reg = gma_read16(hw, port, GM_PHY_ADDR);
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@ -2096,10 +2091,12 @@ static int skge_up(struct net_device *dev)
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skge_write32(hw, B0_IMSK, hw->intr_mask);
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skge_write32(hw, B0_IMSK, hw->intr_mask);
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/* Initialze MAC */
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/* Initialze MAC */
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spin_lock_bh(&hw->phy_lock);
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if (hw->chip_id == CHIP_ID_GENESIS)
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if (hw->chip_id == CHIP_ID_GENESIS)
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genesis_mac_init(hw, port);
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genesis_mac_init(hw, port);
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else
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else
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yukon_mac_init(hw, port);
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yukon_mac_init(hw, port);
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spin_unlock_bh(&hw->phy_lock);
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/* Configure RAMbuffers */
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/* Configure RAMbuffers */
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chunk = hw->ram_size / ((hw->ports + 1)*2);
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chunk = hw->ram_size / ((hw->ports + 1)*2);
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