MIPS: Optimize spinlocks.
The current locking mechanism uses a ll/sc sequence to release a spinlock. This is slower than a wmb() followed by a store to unlock. The branching forward to .subsection 2 on sc failure slows down the contended case. So we get rid of that part too. Since we are now working on naturally aligned u16 values, we can get rid of a masking operation as the LHU already does the right thing. The ANDI are reversed for better scheduling on multi-issue CPUs On a 12 CPU 750MHz Octeon cn5750 this patch improves ipv4 UDP packet forwarding rates from 3.58*10^6 PPS to 3.99*10^6 PPS, or about 11%. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/937/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>hifive-unleashed-5.1
David Daney
Ralf Baechle
parent
e275ed5ee9
commit
500c2e1fdb
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@ -168,8 +168,14 @@
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#ifdef CONFIG_CPU_CAVIUM_OCTEON
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#define smp_mb__before_llsc() smp_wmb()
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/* Cause previous writes to become visible on all CPUs as soon as possible */
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#define nudge_writes() __asm__ __volatile__(".set push\n\t" \
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".set arch=octeon\n\t" \
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"syncw\n\t" \
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".set pop" : : : "memory")
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#else
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#define smp_mb__before_llsc() smp_llsc_mb()
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#define nudge_writes() mb()
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#endif
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#endif /* __ASM_BARRIER_H */
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@ -36,9 +36,9 @@
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static inline int arch_spin_is_locked(arch_spinlock_t *lock)
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{
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unsigned int counters = ACCESS_ONCE(lock->lock);
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u32 counters = ACCESS_ONCE(lock->lock);
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return ((counters >> 14) ^ counters) & 0x1fff;
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return ((counters >> 16) ^ counters) & 0xffff;
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}
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#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
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@ -47,9 +47,9 @@ static inline int arch_spin_is_locked(arch_spinlock_t *lock)
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static inline int arch_spin_is_contended(arch_spinlock_t *lock)
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{
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unsigned int counters = ACCESS_ONCE(lock->lock);
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u32 counters = ACCESS_ONCE(lock->lock);
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return (((counters >> 14) - counters) & 0x1fff) > 1;
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return (((counters >> 16) - counters) & 0xffff) > 1;
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}
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#define arch_spin_is_contended arch_spin_is_contended
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@ -57,6 +57,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
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{
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int my_ticket;
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int tmp;
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int inc = 0x10000;
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if (R10000_LLSC_WAR) {
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__asm__ __volatile__ (
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@ -64,25 +65,24 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
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" .set noreorder \n"
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" \n"
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"1: ll %[ticket], %[ticket_ptr] \n"
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" addiu %[my_ticket], %[ticket], 0x4000 \n"
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" addu %[my_ticket], %[ticket], %[inc] \n"
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" sc %[my_ticket], %[ticket_ptr] \n"
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" beqzl %[my_ticket], 1b \n"
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" nop \n"
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" srl %[my_ticket], %[ticket], 14 \n"
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" andi %[my_ticket], %[my_ticket], 0x1fff \n"
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" andi %[ticket], %[ticket], 0x1fff \n"
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" srl %[my_ticket], %[ticket], 16 \n"
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" andi %[ticket], %[ticket], 0xffff \n"
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" andi %[my_ticket], %[my_ticket], 0xffff \n"
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" bne %[ticket], %[my_ticket], 4f \n"
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" subu %[ticket], %[my_ticket], %[ticket] \n"
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"2: \n"
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" .subsection 2 \n"
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"4: andi %[ticket], %[ticket], 0x1fff \n"
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"4: andi %[ticket], %[ticket], 0xffff \n"
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" sll %[ticket], 5 \n"
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" \n"
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"6: bnez %[ticket], 6b \n"
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" subu %[ticket], 1 \n"
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" \n"
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" lw %[ticket], %[ticket_ptr] \n"
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" andi %[ticket], %[ticket], 0x1fff \n"
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" lhu %[ticket], %[serving_now_ptr] \n"
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" beq %[ticket], %[my_ticket], 2b \n"
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" subu %[ticket], %[my_ticket], %[ticket] \n"
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" b 4b \n"
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@ -90,36 +90,33 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
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" .previous \n"
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" .set pop \n"
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: [ticket_ptr] "+m" (lock->lock),
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[serving_now_ptr] "+m" (lock->h.serving_now),
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[ticket] "=&r" (tmp),
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[my_ticket] "=&r" (my_ticket));
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[my_ticket] "=&r" (my_ticket)
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: [inc] "r" (inc));
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} else {
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__asm__ __volatile__ (
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" .set push # arch_spin_lock \n"
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" .set noreorder \n"
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" \n"
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" ll %[ticket], %[ticket_ptr] \n"
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"1: addiu %[my_ticket], %[ticket], 0x4000 \n"
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"1: ll %[ticket], %[ticket_ptr] \n"
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" addu %[my_ticket], %[ticket], %[inc] \n"
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" sc %[my_ticket], %[ticket_ptr] \n"
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" beqz %[my_ticket], 3f \n"
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" nop \n"
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" srl %[my_ticket], %[ticket], 14 \n"
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" andi %[my_ticket], %[my_ticket], 0x1fff \n"
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" andi %[ticket], %[ticket], 0x1fff \n"
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" beqz %[my_ticket], 1b \n"
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" srl %[my_ticket], %[ticket], 16 \n"
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" andi %[ticket], %[ticket], 0xffff \n"
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" andi %[my_ticket], %[my_ticket], 0xffff \n"
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" bne %[ticket], %[my_ticket], 4f \n"
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" subu %[ticket], %[my_ticket], %[ticket] \n"
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"2: \n"
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" .subsection 2 \n"
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"3: b 1b \n"
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" ll %[ticket], %[ticket_ptr] \n"
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" \n"
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"4: andi %[ticket], %[ticket], 0x1fff \n"
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" sll %[ticket], 5 \n"
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" \n"
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"6: bnez %[ticket], 6b \n"
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" subu %[ticket], 1 \n"
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" \n"
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" lw %[ticket], %[ticket_ptr] \n"
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" andi %[ticket], %[ticket], 0x1fff \n"
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" lhu %[ticket], %[serving_now_ptr] \n"
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" beq %[ticket], %[my_ticket], 2b \n"
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" subu %[ticket], %[my_ticket], %[ticket] \n"
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" b 4b \n"
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@ -127,8 +124,10 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
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" .previous \n"
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" .set pop \n"
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: [ticket_ptr] "+m" (lock->lock),
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[serving_now_ptr] "+m" (lock->h.serving_now),
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[ticket] "=&r" (tmp),
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[my_ticket] "=&r" (my_ticket));
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[my_ticket] "=&r" (my_ticket)
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: [inc] "r" (inc));
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}
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smp_llsc_mb();
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@ -136,47 +135,16 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
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static inline void arch_spin_unlock(arch_spinlock_t *lock)
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{
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int tmp;
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smp_mb__before_llsc();
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if (R10000_LLSC_WAR) {
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__asm__ __volatile__ (
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" # arch_spin_unlock \n"
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"1: ll %[ticket], %[ticket_ptr] \n"
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" addiu %[ticket], %[ticket], 1 \n"
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" ori %[ticket], %[ticket], 0x2000 \n"
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" xori %[ticket], %[ticket], 0x2000 \n"
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" sc %[ticket], %[ticket_ptr] \n"
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" beqzl %[ticket], 1b \n"
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: [ticket_ptr] "+m" (lock->lock),
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[ticket] "=&r" (tmp));
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} else {
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__asm__ __volatile__ (
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" .set push # arch_spin_unlock \n"
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" .set noreorder \n"
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" \n"
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" ll %[ticket], %[ticket_ptr] \n"
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"1: addiu %[ticket], %[ticket], 1 \n"
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" ori %[ticket], %[ticket], 0x2000 \n"
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" xori %[ticket], %[ticket], 0x2000 \n"
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" sc %[ticket], %[ticket_ptr] \n"
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" beqz %[ticket], 2f \n"
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" nop \n"
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" \n"
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" .subsection 2 \n"
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"2: b 1b \n"
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" ll %[ticket], %[ticket_ptr] \n"
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" .previous \n"
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" .set pop \n"
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: [ticket_ptr] "+m" (lock->lock),
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[ticket] "=&r" (tmp));
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}
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unsigned int serving_now = lock->h.serving_now + 1;
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wmb();
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lock->h.serving_now = (u16)serving_now;
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nudge_writes();
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}
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static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock)
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{
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int tmp, tmp2, tmp3;
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int inc = 0x10000;
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if (R10000_LLSC_WAR) {
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__asm__ __volatile__ (
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@ -184,11 +152,11 @@ static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock)
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" .set noreorder \n"
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" \n"
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"1: ll %[ticket], %[ticket_ptr] \n"
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" srl %[my_ticket], %[ticket], 14 \n"
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" andi %[my_ticket], %[my_ticket], 0x1fff \n"
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" andi %[now_serving], %[ticket], 0x1fff \n"
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" srl %[my_ticket], %[ticket], 16 \n"
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" andi %[my_ticket], %[my_ticket], 0xffff \n"
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" andi %[now_serving], %[ticket], 0xffff \n"
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" bne %[my_ticket], %[now_serving], 3f \n"
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" addiu %[ticket], %[ticket], 0x4000 \n"
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" addu %[ticket], %[ticket], %[inc] \n"
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" sc %[ticket], %[ticket_ptr] \n"
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" beqzl %[ticket], 1b \n"
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" li %[ticket], 1 \n"
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@ -201,33 +169,33 @@ static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock)
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: [ticket_ptr] "+m" (lock->lock),
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[ticket] "=&r" (tmp),
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[my_ticket] "=&r" (tmp2),
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[now_serving] "=&r" (tmp3));
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[now_serving] "=&r" (tmp3)
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: [inc] "r" (inc));
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} else {
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__asm__ __volatile__ (
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" .set push # arch_spin_trylock \n"
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" .set noreorder \n"
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" \n"
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" ll %[ticket], %[ticket_ptr] \n"
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"1: srl %[my_ticket], %[ticket], 14 \n"
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" andi %[my_ticket], %[my_ticket], 0x1fff \n"
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" andi %[now_serving], %[ticket], 0x1fff \n"
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"1: ll %[ticket], %[ticket_ptr] \n"
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" srl %[my_ticket], %[ticket], 16 \n"
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" andi %[my_ticket], %[my_ticket], 0xffff \n"
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" andi %[now_serving], %[ticket], 0xffff \n"
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" bne %[my_ticket], %[now_serving], 3f \n"
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" addiu %[ticket], %[ticket], 0x4000 \n"
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" addu %[ticket], %[ticket], %[inc] \n"
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" sc %[ticket], %[ticket_ptr] \n"
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" beqz %[ticket], 4f \n"
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" beqz %[ticket], 1b \n"
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" li %[ticket], 1 \n"
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"2: \n"
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" .subsection 2 \n"
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"3: b 2b \n"
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" li %[ticket], 0 \n"
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"4: b 1b \n"
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" ll %[ticket], %[ticket_ptr] \n"
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" .previous \n"
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" .set pop \n"
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: [ticket_ptr] "+m" (lock->lock),
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[ticket] "=&r" (tmp),
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[my_ticket] "=&r" (tmp2),
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[now_serving] "=&r" (tmp3));
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[now_serving] "=&r" (tmp3)
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: [inc] "r" (inc));
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}
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smp_llsc_mb();
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@ -5,16 +5,28 @@
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# error "please don't include this file directly"
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#endif
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typedef struct {
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#include <linux/types.h>
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#include <asm/byteorder.h>
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typedef union {
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/*
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* bits 0..13: serving_now
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* bits 14 : junk data
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* bits 15..28: ticket
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* bits 0..15 : serving_now
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* bits 16..31 : ticket
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*/
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unsigned int lock;
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u32 lock;
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struct {
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#ifdef __BIG_ENDIAN
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u16 ticket;
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u16 serving_now;
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#else
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u16 serving_now;
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u16 ticket;
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#endif
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} h;
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} arch_spinlock_t;
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#define __ARCH_SPIN_LOCK_UNLOCKED { 0 }
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#define __ARCH_SPIN_LOCK_UNLOCKED { .lock = 0 }
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typedef struct {
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volatile unsigned int lock;
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