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staging: brcm80211: remove dma_addrwidth() function

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The function dma_addrwidth() always returns the same value so
it is redundant. As such it has been removed.

Reviewed-by: Henry Ptasinski <henryp@broadcom.com>
Reviewed-by: Roland Vossen <rvossen@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Arend van Spriel 2011-08-08 15:58:45 +02:00 committed by Greg Kroah-Hartman
parent 76890e69ba
commit 50206949c3
3 changed files with 0 additions and 36 deletions
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23
drivers/staging/brcm80211/brcmsmac/dma.c
View file

@ -159,15 +159,9 @@
#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 /* no. of descriptors used - 1 */
#define D64_RX_FRM_STS_DATATYPE 0xf0000000 /* core-dependent data type */
#define DMADDRWIDTH_30 30 /* 30-bit addressing capability */
#define DMADDRWIDTH_32 32 /* 32-bit addressing capability */
#define DMADDRWIDTH_63 63 /* 64-bit addressing capability */
#define DMADDRWIDTH_64 64 /* 64-bit addressing capability */
#define DMA64_DD_PARITY(dd) \
parity32((dd)->addrlow ^ (dd)->addrhigh ^ (dd)->ctrl1 ^ (dd)->ctrl2)
/*
* packet headroom necessary to accommodate the largest header
* in the system, (i.e TXOFF). By doing, we avoid the need to
@ -1936,23 +1930,6 @@ static void dma64_txrotate(struct dma_info *di)
di->xmtptrbase + I2B(di->txout, struct dma64desc));
}
uint dma_addrwidth(struct si_pub *sih, void *dmaregs)
{
/* Perform 64-bit checks only if we want to advertise 64-bit (> 32bit) capability) */
/* DMA engine is 64-bit capable */
if ((ai_core_sflags(sih, 0, 0) & SISF_DMA64) == SISF_DMA64) {
/* backplane are 64-bit capable */
if (ai_backplane64(sih))
/* If bus is System Backplane or PCIE then we can access 64-bits */
if ((sih->bustype == SI_BUS) ||
((sih->bustype == PCI_BUS) &&
(sih->buscoretype == PCIE_CORE_ID)))
return DMADDRWIDTH_64;
}
/* DMA hardware not supported by this driver */
return DMADDRWIDTH_64;
}
/*
* Mac80211 initiated actions sometimes require packets in the DMA queue to be
* modified. The modified portion of the packet is not under control of the DMA

6
drivers/staging/brcm80211/brcmsmac/dma.h
View file

@ -178,12 +178,6 @@ extern const struct di_fcn_s dma64proc;
#define dma_txcommitted(di) (dma64proc.txcommitted(di))
/* return addresswidth allowed
* This needs to be done after SB attach but before dma attach.
* SB attach provides ability to probe backplane and dma core capabilities
* This info is needed by DMA_ALLOC_CONSISTENT in dma attach
*/
extern uint dma_addrwidth(struct si_pub *sih, void *dmaregs);
void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc)
(void *pkt, void *arg_a), void *arg_a);

7
drivers/staging/brcm80211/brcmsmac/main.c
View file

@ -861,14 +861,7 @@ static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
snprintf(name, sizeof(name), "wl%d", unit);
if (wlc_hw->di[0] == 0) { /* Init FIFOs */
uint addrwidth;
int dma_attach_err = 0;
/* Find out the DMA addressing capability and let OS know
* All the channels within one DMA core have 'common-minimum' same
* capability
*/
addrwidth =
dma_addrwidth(wlc_hw->sih, DMAREG(wlc_hw, DMA_TX, 0));
/*
* FIFO 0