1
0
Fork 0

drm/amdgpu: various cleanups for uvd/vce.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
hifive-unleashed-5.1
Rex Zhu 2017-03-30 15:45:52 +08:00 committed by Alex Deucher
parent e6707218f7
commit 502372878a
7 changed files with 22 additions and 103 deletions

View File

@ -135,12 +135,9 @@ static int uvd_v4_2_sw_fini(void *handle)
if (r)
return r;
r = amdgpu_uvd_sw_fini(adev);
if (r)
return r;
return r;
return amdgpu_uvd_sw_fini(adev);
}
static void uvd_v4_2_enable_mgcg(struct amdgpu_device *adev,
bool enable);
/**
@ -230,11 +227,7 @@ static int uvd_v4_2_suspend(void *handle)
if (r)
return r;
r = amdgpu_uvd_suspend(adev);
if (r)
return r;
return r;
return amdgpu_uvd_suspend(adev);
}
static int uvd_v4_2_resume(void *handle)
@ -246,11 +239,7 @@ static int uvd_v4_2_resume(void *handle)
if (r)
return r;
r = uvd_v4_2_hw_init(adev);
if (r)
return r;
return r;
return uvd_v4_2_hw_init(adev);
}
/**

View File

@ -131,11 +131,7 @@ static int uvd_v5_0_sw_fini(void *handle)
if (r)
return r;
r = amdgpu_uvd_sw_fini(adev);
if (r)
return r;
return r;
return amdgpu_uvd_sw_fini(adev);
}
/**
@ -228,11 +224,7 @@ static int uvd_v5_0_suspend(void *handle)
return r;
uvd_v5_0_set_clockgating_state(adev, AMD_CG_STATE_GATE);
r = amdgpu_uvd_suspend(adev);
if (r)
return r;
return r;
return amdgpu_uvd_suspend(adev);
}
static int uvd_v5_0_resume(void *handle)
@ -244,11 +236,7 @@ static int uvd_v5_0_resume(void *handle)
if (r)
return r;
r = uvd_v5_0_hw_init(adev);
if (r)
return r;
return r;
return uvd_v5_0_hw_init(adev);
}
/**

View File

@ -134,11 +134,7 @@ static int uvd_v6_0_sw_fini(void *handle)
if (r)
return r;
r = amdgpu_uvd_sw_fini(adev);
if (r)
return r;
return r;
return amdgpu_uvd_sw_fini(adev);
}
/**
@ -230,11 +226,8 @@ static int uvd_v6_0_suspend(void *handle)
return r;
/* Skip this for APU for now */
if (!(adev->flags & AMD_IS_APU)) {
if (!(adev->flags & AMD_IS_APU))
r = amdgpu_uvd_suspend(adev);
if (r)
return r;
}
return r;
}
@ -250,11 +243,7 @@ static int uvd_v6_0_resume(void *handle)
if (r)
return r;
}
r = uvd_v6_0_hw_init(adev);
if (r)
return r;
return r;
return uvd_v6_0_hw_init(adev);
}
/**

View File

@ -438,11 +438,7 @@ static int uvd_v7_0_sw_fini(void *handle)
for (i = 0; i < adev->uvd.num_enc_rings; ++i)
amdgpu_ring_fini(&adev->uvd.ring_enc[i]);
r = amdgpu_uvd_sw_fini(adev);
if (r)
return r;
return r;
return amdgpu_uvd_sw_fini(adev);
}
/**
@ -547,11 +543,8 @@ static int uvd_v7_0_suspend(void *handle)
return r;
/* Skip this for APU for now */
if (!(adev->flags & AMD_IS_APU)) {
if (!(adev->flags & AMD_IS_APU))
r = amdgpu_uvd_suspend(adev);
if (r)
return r;
}
return r;
}
@ -567,11 +560,7 @@ static int uvd_v7_0_resume(void *handle)
if (r)
return r;
}
r = uvd_v7_0_hw_init(adev);
if (r)
return r;
return r;
return uvd_v7_0_hw_init(adev);
}
/**

View File

@ -451,11 +451,7 @@ static int vce_v2_0_sw_fini(void *handle)
if (r)
return r;
r = amdgpu_vce_sw_fini(adev);
if (r)
return r;
return r;
return amdgpu_vce_sw_fini(adev);
}
static int vce_v2_0_hw_init(void *handle)
@ -495,11 +491,7 @@ static int vce_v2_0_suspend(void *handle)
if (r)
return r;
r = amdgpu_vce_suspend(adev);
if (r)
return r;
return r;
return amdgpu_vce_suspend(adev);
}
static int vce_v2_0_resume(void *handle)
@ -511,11 +503,7 @@ static int vce_v2_0_resume(void *handle)
if (r)
return r;
r = vce_v2_0_hw_init(adev);
if (r)
return r;
return r;
return vce_v2_0_hw_init(adev);
}
static int vce_v2_0_soft_reset(void *handle)

View File

@ -417,11 +417,7 @@ static int vce_v3_0_sw_fini(void *handle)
if (r)
return r;
r = amdgpu_vce_sw_fini(adev);
if (r)
return r;
return r;
return amdgpu_vce_sw_fini(adev);
}
static int vce_v3_0_hw_init(void *handle)
@ -471,11 +467,7 @@ static int vce_v3_0_suspend(void *handle)
if (r)
return r;
r = amdgpu_vce_suspend(adev);
if (r)
return r;
return r;
return amdgpu_vce_suspend(adev);
}
static int vce_v3_0_resume(void *handle)
@ -487,11 +479,7 @@ static int vce_v3_0_resume(void *handle)
if (r)
return r;
r = vce_v3_0_hw_init(adev);
if (r)
return r;
return r;
return vce_v3_0_hw_init(adev);
}
static void vce_v3_0_mc_resume(struct amdgpu_device *adev, int idx)

View File

@ -527,11 +527,7 @@ static int vce_v4_0_sw_fini(void *handle)
if (r)
return r;
r = amdgpu_vce_sw_fini(adev);
if (r)
return r;
return r;
return amdgpu_vce_sw_fini(adev);
}
static int vce_v4_0_hw_init(void *handle)
@ -584,11 +580,7 @@ static int vce_v4_0_suspend(void *handle)
if (r)
return r;
r = amdgpu_vce_suspend(adev);
if (r)
return r;
return r;
return amdgpu_vce_suspend(adev);
}
static int vce_v4_0_resume(void *handle)
@ -600,11 +592,7 @@ static int vce_v4_0_resume(void *handle)
if (r)
return r;
r = vce_v4_0_hw_init(adev);
if (r)
return r;
return r;
return vce_v4_0_hw_init(adev);
}
static void vce_v4_0_mc_resume(struct amdgpu_device *adev)