iio: adc: add ADC12130/ADC12132/ADC12138 ADC driver
This adds Texas Instruments' ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver. I have tested with the ADC12138. The ADC12130 and ADC12132 are not tested but these are similar to ADC12138 except that the mode programming instruction is a bit different. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Hartmut Knaack <knaack.h@gmx.de> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Jonathan Cameron <jic23@kernel.org>hifive-unleashed-5.1
Akinobu Mita
Jonathan Cameron
parent
2d6d840a5a
commit
50a6edb1b6
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@ -0,0 +1,37 @@
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* Texas Instruments' ADC12130/ADC12132/ADC12138
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Required properties:
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- compatible: Should be one of
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* "ti,adc12130"
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* "ti,adc12132"
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* "ti,adc12138"
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- reg: SPI chip select number for the device
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- interrupts: Should contain interrupt for EOC (end of conversion)
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- clocks: phandle to conversion clock input
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- spi-max-frequency: Definision as per
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Documentation/devicetree/bindings/spi/spi-bus.txt
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- vref-p-supply: The regulator supply for positive analog voltage reference
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Optional properties:
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- vref-n-supply: The regulator supply for negative analog voltage reference
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(Note that this must not go below GND or exceed vref-p)
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If not specified, this is assumed to be analog ground.
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- ti,acquisition-time: The number of conversion clock periods for the S/H's
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acquisition time. Should be one of 6, 10, 18, 34. If not specified,
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default value of 10 is used.
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For high source impedances, this value can be increased to 18 or 34.
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For less ADC accuracy and/or slower CCLK frequencies this value may be
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decreased to 6. See section 6.0 INPUT SOURCE RESISTANCE in the
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datasheet for details.
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Example:
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adc@0 {
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compatible = "ti,adc12138";
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reg = <0>;
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interrupts = <28 IRQ_TYPE_EDGE_RISING>;
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interrupt-parent = <&gpio1>;
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clocks = <&cclk>;
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vref-p-supply = <&ldo4_reg>;
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spi-max-frequency = <5000000>;
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ti,acquisition-time = <6>;
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};
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@ -438,6 +438,18 @@ config TI_ADC0832
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This driver can also be built as a module. If so, the module will be
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called ti-adc0832.
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config TI_ADC12138
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tristate "Texas Instruments ADC12130/ADC12132/ADC12138"
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depends on SPI
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select IIO_BUFFER
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select IIO_TRIGGERED_BUFFER
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help
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If you say yes here you get support for Texas Instruments ADC12130,
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ADC12132 and ADC12138 chips.
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This driver can also be built as a module. If so, the module will be
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called ti-adc12138.
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config TI_ADC128S052
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tristate "Texas Instruments ADC128S052/ADC122S021/ADC124S021"
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depends on SPI
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@ -42,6 +42,7 @@ obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
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obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
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obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
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obj-$(CONFIG_TI_ADC0832) += ti-adc0832.o
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obj-$(CONFIG_TI_ADC12138) += ti-adc12138.o
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obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
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obj-$(CONFIG_TI_ADC161S626) += ti-adc161s626.o
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obj-$(CONFIG_TI_ADS1015) += ti-ads1015.o
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@ -0,0 +1,552 @@
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/*
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* ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver
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*
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* Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com>
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*
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* This file is subject to the terms and conditions of version 2 of
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* the GNU General Public License. See the file COPYING in the main
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* directory of this archive for more details.
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*
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* Datasheet: http://www.ti.com/lit/ds/symlink/adc12138.pdf
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*/
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/completion.h>
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#include <linux/clk.h>
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#include <linux/spi/spi.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/trigger.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/regulator/consumer.h>
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#define ADC12138_MODE_AUTO_CAL 0x08
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#define ADC12138_MODE_READ_STATUS 0x0c
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#define ADC12138_MODE_ACQUISITION_TIME_6 0x0e
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#define ADC12138_MODE_ACQUISITION_TIME_10 0x4e
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#define ADC12138_MODE_ACQUISITION_TIME_18 0x8e
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#define ADC12138_MODE_ACQUISITION_TIME_34 0xce
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#define ADC12138_STATUS_CAL BIT(6)
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enum {
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adc12130,
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adc12132,
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adc12138,
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};
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struct adc12138 {
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struct spi_device *spi;
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unsigned int id;
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/* conversion clock */
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struct clk *cclk;
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/* positive analog voltage reference */
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struct regulator *vref_p;
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/* negative analog voltage reference */
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struct regulator *vref_n;
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struct mutex lock;
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struct completion complete;
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/* The number of cclk periods for the S/H's acquisition time */
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unsigned int acquisition_time;
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u8 tx_buf[2] ____cacheline_aligned;
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u8 rx_buf[2];
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};
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#define ADC12138_VOLTAGE_CHANNEL(chan) \
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{ \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = chan, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
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| BIT(IIO_CHAN_INFO_OFFSET), \
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.scan_index = chan, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 13, \
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.storagebits = 16, \
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.shift = 3, \
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.endianness = IIO_BE, \
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}, \
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}
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#define ADC12138_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si) \
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{ \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = (chan1), \
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.channel2 = (chan2), \
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.differential = 1, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
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| BIT(IIO_CHAN_INFO_OFFSET), \
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.scan_index = si, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 13, \
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.storagebits = 16, \
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.shift = 3, \
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.endianness = IIO_BE, \
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}, \
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}
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static const struct iio_chan_spec adc12132_channels[] = {
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ADC12138_VOLTAGE_CHANNEL(0),
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ADC12138_VOLTAGE_CHANNEL(1),
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ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 2),
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ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 3),
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IIO_CHAN_SOFT_TIMESTAMP(4),
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};
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static const struct iio_chan_spec adc12138_channels[] = {
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ADC12138_VOLTAGE_CHANNEL(0),
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ADC12138_VOLTAGE_CHANNEL(1),
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ADC12138_VOLTAGE_CHANNEL(2),
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ADC12138_VOLTAGE_CHANNEL(3),
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ADC12138_VOLTAGE_CHANNEL(4),
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ADC12138_VOLTAGE_CHANNEL(5),
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ADC12138_VOLTAGE_CHANNEL(6),
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ADC12138_VOLTAGE_CHANNEL(7),
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ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
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ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 9),
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ADC12138_VOLTAGE_CHANNEL_DIFF(2, 3, 10),
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ADC12138_VOLTAGE_CHANNEL_DIFF(3, 2, 11),
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ADC12138_VOLTAGE_CHANNEL_DIFF(4, 5, 12),
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ADC12138_VOLTAGE_CHANNEL_DIFF(5, 4, 13),
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ADC12138_VOLTAGE_CHANNEL_DIFF(6, 7, 14),
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ADC12138_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
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IIO_CHAN_SOFT_TIMESTAMP(16),
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};
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static int adc12138_mode_programming(struct adc12138 *adc, u8 mode,
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void *rx_buf, int len)
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{
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struct spi_transfer xfer = {
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.tx_buf = adc->tx_buf,
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.rx_buf = adc->rx_buf,
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.len = len,
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};
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int ret;
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/* Skip unused bits for ADC12130 and ADC12132 */
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if (adc->id != adc12138)
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mode = (mode & 0xc0) | ((mode & 0x0f) << 2);
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adc->tx_buf[0] = mode;
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ret = spi_sync_transfer(adc->spi, &xfer, 1);
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if (ret)
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return ret;
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memcpy(rx_buf, adc->rx_buf, len);
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return 0;
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}
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static int adc12138_read_status(struct adc12138 *adc)
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{
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u8 rx_buf[2];
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int ret;
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ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
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rx_buf, 2);
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if (ret)
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return ret;
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return (rx_buf[0] << 1) | (rx_buf[1] >> 7);
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}
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static int __adc12138_start_conv(struct adc12138 *adc,
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struct iio_chan_spec const *channel,
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void *data, int len)
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{
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const u8 ch_to_mux[] = { 0, 4, 1, 5, 2, 6, 3, 7 };
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u8 mode = (ch_to_mux[channel->channel] << 4) |
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(channel->differential ? 0 : 0x80);
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return adc12138_mode_programming(adc, mode, data, len);
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}
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static int adc12138_start_conv(struct adc12138 *adc,
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struct iio_chan_spec const *channel)
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{
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u8 trash;
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return __adc12138_start_conv(adc, channel, &trash, 1);
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}
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static int adc12138_start_and_read_conv(struct adc12138 *adc,
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struct iio_chan_spec const *channel,
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__be16 *data)
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{
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return __adc12138_start_conv(adc, channel, data, 2);
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}
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static int adc12138_read_conv_data(struct adc12138 *adc, __be16 *value)
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{
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/* Issue a read status instruction and read previous conversion data */
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return adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
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value, sizeof(*value));
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}
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static int adc12138_wait_eoc(struct adc12138 *adc, unsigned long timeout)
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{
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if (!wait_for_completion_timeout(&adc->complete, timeout))
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return -ETIMEDOUT;
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return 0;
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}
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static int adc12138_adc_conversion(struct adc12138 *adc,
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struct iio_chan_spec const *channel,
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__be16 *value)
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{
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int ret;
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reinit_completion(&adc->complete);
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ret = adc12138_start_conv(adc, channel);
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if (ret)
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return ret;
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ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
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if (ret)
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return ret;
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return adc12138_read_conv_data(adc, value);
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}
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static int adc12138_read_raw(struct iio_dev *iio,
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struct iio_chan_spec const *channel, int *value,
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int *shift, long mask)
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{
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struct adc12138 *adc = iio_priv(iio);
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int ret;
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__be16 data;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&adc->lock);
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ret = adc12138_adc_conversion(adc, channel, &data);
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mutex_unlock(&adc->lock);
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if (ret)
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return ret;
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*value = sign_extend32(be16_to_cpu(data) >> 3, 12);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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ret = regulator_get_voltage(adc->vref_p);
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if (ret < 0)
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return ret;
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*value = ret;
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if (!IS_ERR(adc->vref_n)) {
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ret = regulator_get_voltage(adc->vref_n);
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if (ret < 0)
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return ret;
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*value -= ret;
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}
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/* convert regulator output voltage to mV */
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*value /= 1000;
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*shift = channel->scan_type.realbits - 1;
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return IIO_VAL_FRACTIONAL_LOG2;
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case IIO_CHAN_INFO_OFFSET:
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if (!IS_ERR(adc->vref_n)) {
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*value = regulator_get_voltage(adc->vref_n);
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if (*value < 0)
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return *value;
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} else {
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*value = 0;
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}
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/* convert regulator output voltage to mV */
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*value /= 1000;
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return IIO_VAL_INT;
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}
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return -EINVAL;
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}
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static const struct iio_info adc12138_info = {
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.read_raw = adc12138_read_raw,
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.driver_module = THIS_MODULE,
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};
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static int adc12138_init(struct adc12138 *adc)
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{
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int ret;
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int status;
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u8 mode;
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u8 trash;
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reinit_completion(&adc->complete);
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ret = adc12138_mode_programming(adc, ADC12138_MODE_AUTO_CAL, &trash, 1);
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if (ret)
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return ret;
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/* data output at this time has no significance */
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status = adc12138_read_status(adc);
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if (status < 0)
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return status;
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adc12138_wait_eoc(adc, msecs_to_jiffies(100));
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status = adc12138_read_status(adc);
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if (status & ADC12138_STATUS_CAL) {
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dev_warn(&adc->spi->dev,
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"Auto Cal sequence is still in progress: %#x\n",
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status);
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return -EIO;
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}
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switch (adc->acquisition_time) {
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case 6:
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mode = ADC12138_MODE_ACQUISITION_TIME_6;
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break;
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case 10:
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mode = ADC12138_MODE_ACQUISITION_TIME_10;
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break;
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case 18:
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mode = ADC12138_MODE_ACQUISITION_TIME_18;
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break;
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case 34:
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mode = ADC12138_MODE_ACQUISITION_TIME_34;
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break;
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default:
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return -EINVAL;
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}
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return adc12138_mode_programming(adc, mode, &trash, 1);
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}
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static irqreturn_t adc12138_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct adc12138 *adc = iio_priv(indio_dev);
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__be16 data[20] = { }; /* 16x 2 bytes ADC data + 8 bytes timestamp */
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__be16 trash;
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int ret;
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int scan_index;
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int i = 0;
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mutex_lock(&adc->lock);
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for_each_set_bit(scan_index, indio_dev->active_scan_mask,
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indio_dev->masklength) {
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const struct iio_chan_spec *scan_chan =
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&indio_dev->channels[scan_index];
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reinit_completion(&adc->complete);
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ret = adc12138_start_and_read_conv(adc, scan_chan,
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i ? &data[i - 1] : &trash);
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if (ret) {
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dev_warn(&adc->spi->dev,
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"failed to start conversion\n");
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goto out;
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}
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ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
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if (ret) {
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dev_warn(&adc->spi->dev, "wait eoc timeout\n");
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goto out;
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}
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i++;
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}
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if (i) {
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ret = adc12138_read_conv_data(adc, &data[i - 1]);
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if (ret) {
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dev_warn(&adc->spi->dev,
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"failed to get conversion data\n");
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goto out;
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}
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}
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iio_push_to_buffers_with_timestamp(indio_dev, data,
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iio_get_time_ns(indio_dev));
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out:
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mutex_unlock(&adc->lock);
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static irqreturn_t adc12138_eoc_handler(int irq, void *p)
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{
|
||||
struct iio_dev *indio_dev = p;
|
||||
struct adc12138 *adc = iio_priv(indio_dev);
|
||||
|
||||
complete(&adc->complete);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int adc12138_probe(struct spi_device *spi)
|
||||
{
|
||||
struct iio_dev *indio_dev;
|
||||
struct adc12138 *adc;
|
||||
int ret;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
adc = iio_priv(indio_dev);
|
||||
adc->spi = spi;
|
||||
adc->id = spi_get_device_id(spi)->driver_data;
|
||||
mutex_init(&adc->lock);
|
||||
init_completion(&adc->complete);
|
||||
|
||||
indio_dev->name = spi_get_device_id(spi)->name;
|
||||
indio_dev->dev.parent = &spi->dev;
|
||||
indio_dev->info = &adc12138_info;
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
|
||||
switch (adc->id) {
|
||||
case adc12130:
|
||||
case adc12132:
|
||||
indio_dev->channels = adc12132_channels;
|
||||
indio_dev->num_channels = ARRAY_SIZE(adc12132_channels);
|
||||
break;
|
||||
case adc12138:
|
||||
indio_dev->channels = adc12138_channels;
|
||||
indio_dev->num_channels = ARRAY_SIZE(adc12138_channels);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = of_property_read_u32(spi->dev.of_node, "ti,acquisition-time",
|
||||
&adc->acquisition_time);
|
||||
if (ret)
|
||||
adc->acquisition_time = 10;
|
||||
|
||||
adc->cclk = devm_clk_get(&spi->dev, NULL);
|
||||
if (IS_ERR(adc->cclk))
|
||||
return PTR_ERR(adc->cclk);
|
||||
|
||||
adc->vref_p = devm_regulator_get(&spi->dev, "vref-p");
|
||||
if (IS_ERR(adc->vref_p))
|
||||
return PTR_ERR(adc->vref_p);
|
||||
|
||||
adc->vref_n = devm_regulator_get_optional(&spi->dev, "vref-n");
|
||||
if (IS_ERR(adc->vref_n)) {
|
||||
/*
|
||||
* Assume vref_n is 0V if an optional regulator is not
|
||||
* specified, otherwise return the error code.
|
||||
*/
|
||||
ret = PTR_ERR(adc->vref_n);
|
||||
if (ret != -ENODEV)
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = devm_request_irq(&spi->dev, spi->irq, adc12138_eoc_handler,
|
||||
IRQF_TRIGGER_RISING, indio_dev->name, indio_dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = clk_prepare_enable(adc->cclk);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = regulator_enable(adc->vref_p);
|
||||
if (ret)
|
||||
goto err_clk_disable;
|
||||
|
||||
if (!IS_ERR(adc->vref_n)) {
|
||||
ret = regulator_enable(adc->vref_n);
|
||||
if (ret)
|
||||
goto err_vref_p_disable;
|
||||
}
|
||||
|
||||
ret = adc12138_init(adc);
|
||||
if (ret)
|
||||
goto err_vref_n_disable;
|
||||
|
||||
spi_set_drvdata(spi, indio_dev);
|
||||
|
||||
ret = iio_triggered_buffer_setup(indio_dev, NULL,
|
||||
adc12138_trigger_handler, NULL);
|
||||
if (ret)
|
||||
goto err_vref_n_disable;
|
||||
|
||||
ret = iio_device_register(indio_dev);
|
||||
if (ret)
|
||||
goto err_buffer_cleanup;
|
||||
|
||||
return 0;
|
||||
err_buffer_cleanup:
|
||||
iio_triggered_buffer_cleanup(indio_dev);
|
||||
err_vref_n_disable:
|
||||
if (!IS_ERR(adc->vref_n))
|
||||
regulator_disable(adc->vref_n);
|
||||
err_vref_p_disable:
|
||||
regulator_disable(adc->vref_p);
|
||||
err_clk_disable:
|
||||
clk_disable_unprepare(adc->cclk);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int adc12138_remove(struct spi_device *spi)
|
||||
{
|
||||
struct iio_dev *indio_dev = spi_get_drvdata(spi);
|
||||
struct adc12138 *adc = iio_priv(indio_dev);
|
||||
|
||||
iio_device_unregister(indio_dev);
|
||||
iio_triggered_buffer_cleanup(indio_dev);
|
||||
if (!IS_ERR(adc->vref_n))
|
||||
regulator_disable(adc->vref_n);
|
||||
regulator_disable(adc->vref_p);
|
||||
clk_disable_unprepare(adc->cclk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
|
||||
static const struct of_device_id adc12138_dt_ids[] = {
|
||||
{ .compatible = "ti,adc12130", },
|
||||
{ .compatible = "ti,adc12132", },
|
||||
{ .compatible = "ti,adc12138", },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, adc12138_dt_ids);
|
||||
|
||||
#endif
|
||||
|
||||
static const struct spi_device_id adc12138_id[] = {
|
||||
{ "adc12130", adc12130 },
|
||||
{ "adc12132", adc12132 },
|
||||
{ "adc12138", adc12138 },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(spi, adc12138_id);
|
||||
|
||||
static struct spi_driver adc12138_driver = {
|
||||
.driver = {
|
||||
.name = "adc12138",
|
||||
.of_match_table = of_match_ptr(adc12138_dt_ids),
|
||||
},
|
||||
.probe = adc12138_probe,
|
||||
.remove = adc12138_remove,
|
||||
.id_table = adc12138_id,
|
||||
};
|
||||
module_spi_driver(adc12138_driver);
|
||||
|
||||
MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
|
||||
MODULE_DESCRIPTION("ADC12130/ADC12132/ADC12138 driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue