MLK-10913-1: mxc: sim: Add the SIM driver support for i.MX6UL-EVK platform.
Modify the driver to support the SIM on i.MX6UL-EVK platform. The main modification is: 1. Add port index to support different port on platform. 2. Add POS-CARD support. The POS card has external IC to assert when SVEN to low. Add support. 3. Using a function to calculate the strict timing delay. Signed-off-by: Luwei Zhou <b45643@freescale.com> (cherry picked from 17d1315b0704e2db63ee6bd7aaefa0c796f53104)5.4-rM2-2.2.x-imx-squashed
Luwei Zhou
Dong Aisheng
parent
3867b4bd9f
commit
50b2602a93
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@ -114,6 +114,10 @@
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#define RCV_FIFO_WPTR (0x74)
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#define RCV_FIFO_RPTR (0x78)
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/* SIM SETUP register bits */
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#define SIM_SETUP_SPS_PORT0 (0 << 1)
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#define SIM_SETUP_SPS_PORT1 (1 << 1)
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/* SIM port[0|1]_cntl register bits */
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#define SIM_PORT_CNTL_SFPD (1 << 7)
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#define SIM_PORT_CNTL_3VOLT (1 << 6)
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@ -131,6 +135,8 @@
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/* SIM enable register bits */
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#define SIM_ENABLE_XMTEN (1 << 1)
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#define SIM_ENABLE_RCVEN (1 << 0)
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#define SIM_ESTOP_EN (1 << 5)
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#define SIM_ESTOP_EXE (1 << 6)
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/* SIM int_mask register bits */
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#define SIM_INT_MASK_RFEM (1 << 13)
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@ -227,13 +233,14 @@
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#define ATR_THRESHOLD_MAX (100)
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#define ATR_MAX_CWT (10080)
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#define ATR_MAX_DURATION (20160)
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#define FCLK_FREQ (5000000)
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#define SIM_BLOCK_CLK_FREQ (60000000)
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#define FCLK_FREQ (4000000)
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#define ATR_TIMEOUT (5)
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#define TX_TIMEOUT (10)
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#define RX_TIMEOUT (100)
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#define RESET_RETRY_TIMES (5)
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#define SIM_QUIRK_TKT259347 (1 << 0)
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#define EMV_RESET_LOW_CYCLES 42000
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/* Main SIM driver structure */
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struct sim_t{
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@ -274,7 +281,12 @@ struct sim_t{
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bool last_is_tx;
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u16 rcv_head;
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spinlock_t lock;
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bool sven_low_active;
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u32 port_index;
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u32 port_detect_reg;
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u32 port_ctrl_reg;
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u32 clk_rate;
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u32 quirks;
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};
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static struct miscdevice sim_dev;
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@ -328,9 +340,11 @@ static void sim_set_tx(struct sim_t *sim, u8 enable)
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u32 reg_data;
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reg_data = __raw_readl(sim->ioaddr + ENABLE);
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if (enable)
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reg_data |= SIM_ENABLE_XMTEN;
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else
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if (enable) {
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reg_data |= SIM_ENABLE_XMTEN | SIM_ENABLE_RCVEN;
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if (sim->quirks & SIM_QUIRK_TKT259347)
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reg_data &= ~(SIM_ESTOP_EN | SIM_ESTOP_EXE);
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} else
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reg_data &= ~SIM_ENABLE_XMTEN;
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__raw_writel(reg_data, sim->ioaddr + ENABLE);
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@ -340,10 +354,16 @@ static void sim_set_rx(struct sim_t *sim, u8 enable)
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{
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u32 reg_data;
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reg_data = __raw_readl(sim->ioaddr + ENABLE);
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if (enable)
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if (enable) {
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reg_data |= SIM_ENABLE_RCVEN;
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else
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reg_data &= ~SIM_ENABLE_XMTEN;
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if (sim->quirks & SIM_QUIRK_TKT259347)
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reg_data |= (SIM_ESTOP_EN | SIM_ESTOP_EXE);
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} else {
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reg_data &= ~SIM_ENABLE_RCVEN;
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if (sim->quirks & SIM_QUIRK_TKT259347)
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reg_data &= ~(SIM_ESTOP_EN | SIM_ESTOP_EXE);
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}
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__raw_writel(reg_data, sim->ioaddr + ENABLE);
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}
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@ -387,7 +407,7 @@ static void sim_receive_atr_set(struct sim_t *sim)
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u32 reg_data;
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/*Enable RX*/
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__raw_writel(SIM_ENABLE_RCVEN, sim->ioaddr + ENABLE);
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sim_set_rx(sim, 1);
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/*Receive fifo threshold = 1 to trigger GPC timer in irq handler*/
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reg_data = SIM_RCV_THRESHOLD_RTH(0) | SIM_RCV_THRESHOLD_RDT(1);
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@ -746,45 +766,54 @@ static void sim_start(struct sim_t *sim)
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u32 reg_data, clk_rate, clk_div = 0;
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pr_debug("%s entering.\n", __func__);
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__raw_writel(0, sim->ioaddr + SETUP);
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if (sim->port_index == 1)
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__raw_writel(SIM_SETUP_SPS_PORT1, sim->ioaddr + SETUP);
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else
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__raw_writel(SIM_SETUP_SPS_PORT0, sim->ioaddr + SETUP);
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/* ~ 5 MHz */
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/*1 ~ 5 MHz */
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clk_rate = clk_get_rate(sim->clk);
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clk_div = (clk_rate + sim->clk_rate - 1) / sim->clk_rate;
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__raw_writel(clk_div, sim->ioaddr + CLK_PRESCALER);
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/*Set the port pin to be open drained*/
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reg_data = __raw_readl(sim->ioaddr + OD_CONFIG);
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reg_data |= SIM_OD_CONFIG_OD_P0;
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if (sim->port_index == 1)
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reg_data |= SIM_OD_CONFIG_OD_P1;
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else
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reg_data |= SIM_OD_CONFIG_OD_P0;
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__raw_writel(reg_data, sim->ioaddr + OD_CONFIG);
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reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL);
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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/*One pin mode*/
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reg_data |= SIM_PORT_CNTL_3VOLT | SIM_PORT_CNTL_STEN;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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__raw_writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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/* presense detect */
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pr_debug("%s p0_det is 0x%x \n", __func__,
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__raw_readl(sim->ioaddr + PORT0_DETECT));
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if (__raw_readl(sim->ioaddr + PORT0_DETECT) & SIM_PORT_DETECT_SPDP) {
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reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT);
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__raw_readl(sim->ioaddr + sim->port_detect_reg));
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if (__raw_readl(sim->ioaddr + sim->port_detect_reg)
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& SIM_PORT_DETECT_SPDP) {
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reg_data = __raw_readl(sim->ioaddr + sim->port_detect_reg);
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reg_data &= ~SIM_PORT_DETECT_SPDS;
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__raw_writel(reg_data, sim->ioaddr + PORT0_DETECT);
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__raw_writel(reg_data, sim->ioaddr + sim->port_detect_reg);
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sim->present = SIM_PRESENT_REMOVED;
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sim->state = SIM_STATE_REMOVED;
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} else {
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reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT);
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reg_data = __raw_readl(sim->ioaddr + sim->port_detect_reg);
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reg_data |= SIM_PORT_DETECT_SPDS;
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__raw_writel(reg_data, sim->ioaddr + PORT0_DETECT);
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__raw_writel(reg_data, sim->ioaddr + sim->port_detect_reg);
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sim->present = SIM_PRESENT_DETECTED;
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sim->state = SIM_STATE_DETECTED;
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};
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/*enable card interrupt. clear interrupt status*/
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reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT);
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reg_data = __raw_readl(sim->ioaddr + sim->port_detect_reg);
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reg_data |= SIM_PORT_DETECT_SDI;
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reg_data |= SIM_PORT_DETECT_SDIM;
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__raw_writel(reg_data, sim->ioaddr + PORT0_DETECT);
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__raw_writel(reg_data, sim->ioaddr + sim->port_detect_reg);
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};
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static void sim_activate(struct sim_t *sim)
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@ -794,48 +823,72 @@ static void sim_activate(struct sim_t *sim)
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/* activate on sequence */
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if (sim->present != SIM_PRESENT_REMOVED) {
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/*Disable Reset pin*/
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reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL);
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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reg_data &= ~SIM_PORT_CNTL_SRST;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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/*If sven is low active, we need to set sevn to be high*/
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if (sim->sven_low_active)
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reg_data |= SIM_PORT_CNTL_SVEN;
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__raw_writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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/*Enable VCC pin*/
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reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL);
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reg_data |= SIM_PORT_CNTL_SVEN;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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if (sim->sven_low_active)
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reg_data &= ~SIM_PORT_CNTL_SVEN;
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else
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reg_data |= SIM_PORT_CNTL_SVEN;
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__raw_writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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msleep(10);
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/*Enable clock pin*/
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reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL);
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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reg_data |= SIM_PORT_CNTL_SCEN;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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__raw_writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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msleep(10);
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} else {
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pr_err("No card%s\n", __func__);
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}
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}
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static void sim_reset_low_delay(struct sim_t *sim)
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{
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u32 fclk_in_khz;
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u32 delay_in_us;
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fclk_in_khz = sim->clk_rate / MSEC_PER_SEC;
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delay_in_us = EMV_RESET_LOW_CYCLES * USEC_PER_MSEC / fclk_in_khz;
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mdelay(delay_in_us / USEC_PER_MSEC);
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udelay(delay_in_us % USEC_PER_MSEC);
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}
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static void sim_cold_reset_sequency(struct sim_t *sim)
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{
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u32 reg_data;
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reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL);
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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reg_data &= ~SIM_PORT_CNTL_SRST;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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__raw_writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL);
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reg_data |= SIM_PORT_CNTL_SVEN;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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if (sim->sven_low_active)
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reg_data &= ~SIM_PORT_CNTL_SVEN;
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else
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reg_data |= SIM_PORT_CNTL_SVEN;
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__raw_writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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mdelay(9);
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reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL);
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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reg_data |= SIM_PORT_CNTL_SCEN;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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__raw_writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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mdelay(8);
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udelay(600);
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sim_reset_low_delay(sim);
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reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL);
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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reg_data |= SIM_PORT_CNTL_SRST;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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__raw_writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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};
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static void sim_deactivate(struct sim_t *sim)
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@ -845,16 +898,34 @@ static void sim_deactivate(struct sim_t *sim)
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pr_debug("%s entering.\n", __func__);
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/* Auto powdown to implement the deactivate sequence */
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if (sim->present != SIM_PRESENT_REMOVED) {
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reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL);
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reg_data |= SIM_PORT_CNTL_SAPD;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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reg_data |= SIM_PORT_CNTL_SFPD;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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} else {
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pr_err("No card%s\n", __func__);
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}
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sim->present = SIM_PRESENT_REMOVED;
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if (sim->sven_low_active) {
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/*Set the RESET to be low*/
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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reg_data &= ~SIM_PORT_CNTL_SRST;
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writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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usleep_range(2, 5);
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/*Set the clock to be low*/
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reg_data &= ~SIM_PORT_CNTL_SCEN;
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writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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usleep_range(2, 5);
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/*Set the sven to be high*/
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reg_data |= SIM_PORT_CNTL_SVEN;
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writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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} else {
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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reg_data |= SIM_PORT_CNTL_SAPD;
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__raw_writel(reg_data,
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sim->ioaddr + sim->port_ctrl_reg);
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reg_data |= SIM_PORT_CNTL_SFPD;
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__raw_writel(reg_data,
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sim->ioaddr + sim->port_ctrl_reg);
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}
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} else
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pr_err(">>>No card%s\n", __func__);
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};
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static void sim_cold_reset(struct sim_t *sim)
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@ -873,20 +944,25 @@ static void sim_warm_reset_sequency(struct sim_t *sim)
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{
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u32 reg_data;
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reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL);
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reg_data |= (SIM_PORT_CNTL_SRST | SIM_PORT_CNTL_SVEN | SIM_PORT_CNTL_SCEN);
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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reg_data |= (SIM_PORT_CNTL_SRST | SIM_PORT_CNTL_SCEN);
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if (sim->sven_low_active)
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reg_data &= ~SIM_PORT_CNTL_SVEN;
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else
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reg_data |= SIM_PORT_CNTL_SVEN;
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__raw_writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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udelay(20);
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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reg_data &= ~SIM_PORT_CNTL_SRST;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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__raw_writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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mdelay(8);
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udelay(600);
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sim_reset_low_delay(sim);
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reg_data = __raw_readl(sim->ioaddr + sim->port_ctrl_reg);
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reg_data |= SIM_PORT_CNTL_SRST;
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__raw_writel(reg_data, sim->ioaddr + PORT0_CNTL);
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__raw_writel(reg_data, sim->ioaddr + sim->port_ctrl_reg);
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}
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static void sim_warm_reset(struct sim_t *sim)
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@ -1492,9 +1568,9 @@ static int sim_release(struct inode *inode, struct file *file)
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struct sim_t *sim = (struct sim_t *) file->private_data;
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/* disable presense detection */
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reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT);
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reg_data = __raw_readl(sim->ioaddr + sim->port_detect_reg);
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__raw_writel(reg_data | SIM_PORT_DETECT_SDIM,
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sim->ioaddr + PORT0_DETECT);
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sim->ioaddr + sim->port_detect_reg);
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if (sim->present != SIM_PRESENT_REMOVED)
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sim_deactivate(sim);
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@ -1527,14 +1603,24 @@ static struct platform_device_id imx_sim_devtype[] = {
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{
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.name = "imx7d-sim",
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.driver_data = 0,
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}, {
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.name = "imx6ul-sim",
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.driver_data = SIM_QUIRK_TKT259347,
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}, {
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/* sentinel */
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}
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};
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enum imx_sim_type {
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IMX7D_SIM = 0,
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IMX6UL_SIM,
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};
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static const struct of_device_id sim_imx_dt_ids[] = {
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{ .compatible = "fsl,imx7d-sim",
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.data = &imx_sim_devtype[0], },
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.data = &imx_sim_devtype[IMX7D_SIM], },
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{ .compatible = "fsl,imx6ul-sim",
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.data = &imx_sim_devtype[IMX6UL_SIM], },
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{ /* sentinel */ }
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};
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@ -1545,6 +1631,7 @@ static int sim_probe(struct platform_device *pdev)
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int ret = 0;
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const struct of_device_id *of_id;
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struct sim_t *sim = NULL;
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struct device_node *of_node = pdev->dev.of_node;
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sim = devm_kzalloc(&pdev->dev, sizeof(struct sim_t),
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GFP_KERNEL);
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@ -1597,6 +1684,18 @@ static int sim_probe(struct platform_device *pdev)
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return -ENOENT;
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}
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sim->sven_low_active = of_property_read_bool(of_node,
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"sven_low_active");
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ret = of_property_read_u32(of_node, "port", &sim->port_index);
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||||
if (ret)
|
||||
sim->port_index = 0;
|
||||
sim->port_ctrl_reg = (sim->port_index == 0) ?
|
||||
PORT0_CNTL : PORT1_CNTL;
|
||||
sim->port_detect_reg = (sim->port_index == 0) ?
|
||||
PORT0_DETECT : PORT1_DETECT;
|
||||
sim->quirks = pdev->id_entry->driver_data;
|
||||
|
||||
platform_set_drvdata(pdev, sim);
|
||||
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in New Issue