arm64: dts: imx8qm: add smmu
Add smmu node, enable smmu for usdhc/fec/usb/sata Signed-off-by: Peng Fan <peng.fan@nxp.com>5.4-rM2-2.2.x-imx-squashed
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805cf7d9ed
commit
510ef26e4e
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@ -6,16 +6,29 @@
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&fec1 {
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compatible = "fsl,imx8qm-fec", "fsl,imx6sx-fec";
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iommus = <&smmu 0x12 0x7f80>;
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};
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&fec2 {
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compatible = "fsl,imx8qm-fec", "fsl,imx6sx-fec";
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iommus = <&smmu 0x12 0x7f80>;
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};
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&usdhc1 {
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compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc";
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iommus = <&smmu 0x11 0x7f80>;
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};
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&usdhc2 {
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compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc";
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iommus = <&smmu 0x11 0x7f80>;
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};
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&usdhc3 {
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compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc";
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iommus = <&smmu 0x11 0x7f80>;
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};
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&usbotg3 {
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iommus = <&smmu 0x4 0x7f80>;
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};
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@ -161,6 +161,7 @@
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<&pd IMX_SC_R_SERDES_0>,
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<&pd IMX_SC_R_SERDES_1>,
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<&pd IMX_SC_R_HSIO_GPIO>;
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iommus = <&smmu 0x13 0x7f80>;
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status = "disabled";
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};
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};
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@ -231,6 +231,23 @@
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clock-output-names = "xtal_24MHz";
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};
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smmu: iommu@51400000 {
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compatible = "arm,mmu-500";
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interrupt-parent = <&gic>;
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reg = <0 0x51400000 0 0x40000>;
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#global-interrupts = <1>;
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#iommu-cells = <2>;
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interrupts = <0 32 4>,
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<0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
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<0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
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<0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
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<0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
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<0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
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<0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
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<0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
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<0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>;
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};
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scu {
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compatible = "fsl,imx-scu";
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mbox-names = "tx0", "tx1", "tx2", "tx3",
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