intelfb: some cleanups for intelfbhw
Signed-off-by: Dave Airlie <airlied@linux.ie>
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3587c50991
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51d797474f
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@ -41,14 +41,10 @@
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#include "intelfbhw.h"
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struct pll_min_max {
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int min_m, max_m;
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int min_m1, max_m1;
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int min_m2, max_m2;
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int min_n, max_n;
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int min_p, max_p;
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int min_p1, max_p1;
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int min_vco, max_vco;
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int p_transition_clk, ref_clk;
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int min_m, max_m, min_m1, max_m1;
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int min_m2, max_m2, min_n, max_n;
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int min_p, max_p, min_p1, max_p1;
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int min_vco, max_vco, p_transition_clk, ref_clk;
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int p_inc_lo, p_inc_hi;
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};
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@ -57,8 +53,17 @@ struct pll_min_max {
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#define PLLS_MAX 2
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static struct pll_min_max plls[PLLS_MAX] = {
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{ 108, 140, 18, 26, 6, 16, 3, 16, 4, 128, 0, 31, 930000, 1400000, 165000, 48000, 4, 22 }, //I8xx
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{ 75, 120, 10, 20, 5, 9, 4, 7, 5, 80, 1, 8, 930000, 2800000, 200000, 96000, 10, 5 } //I9xx
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{ 108, 140, 18, 26,
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6, 16, 3, 16,
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4, 128, 0, 31,
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930000, 1400000, 165000, 48000,
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4, 2 }, //I8xx
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{ 75, 120, 10, 20,
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5, 9, 4, 7,
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5, 80, 1, 8,
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1400000, 2800000, 200000, 96000,
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10, 5 } //I9xx
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};
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int
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@ -698,8 +703,7 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw)
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tmpp1 = p1;
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switch (tmpp1)
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{
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switch (tmpp1) {
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case 0x1: p1 = 1; break;
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case 0x2: p1 = 2; break;
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case 0x4: p1 = 3; break;
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@ -710,7 +714,7 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw)
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case 0x80: p1 = 8; break;
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default: break;
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}
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p2 = (hw->dpll_a >> DPLL_I9XX_P2_SHIFT) & DPLL_P2_MASK;
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} else {
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@ -849,8 +853,7 @@ splitp(int index, unsigned int p, unsigned int *retp1, unsigned int *retp2)
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int p1, p2;
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if (index == PLLS_I9xx) {
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p2 = 0; // for now
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p2 = (p % 10) ? 1 : 0;
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p1 = p / (p2 ? 5 : 10);
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@ -890,7 +893,8 @@ calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, u32 *retn, u32 *re
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u32 f_vco, p, p_best = 0, m, f_out = 0;
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u32 err_max, err_target, err_best = 10000000;
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u32 n_best = 0, m_best = 0, f_best, f_err;
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u32 p_min, p_max, p_inc, div_min, div_max;
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u32 p_min, p_max, p_inc, div_max;
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struct pll_min_max *pll = &plls[index];
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/* Accept 0.5% difference, but aim for 0.1% */
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err_max = 5 * clock / 1000;
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@ -898,22 +902,15 @@ calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, u32 *retn, u32 *re
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DBG_MSG("Clock is %d\n", clock);
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div_max = plls[index].max_vco / clock;
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if (index == PLLS_I9xx)
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div_min = 5;
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else
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div_min = ROUND_UP_TO(plls[index].min_vco, clock) / clock;
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div_max = pll->max_vco / clock;
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if (clock <= plls[index].p_transition_clk)
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p_inc = plls[index].p_inc_lo;
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else
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p_inc = plls[index].p_inc_hi;
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p_min = ROUND_UP_TO(div_min, p_inc);
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p_inc = (clock <= pll->p_transition_clk) ? pll->p_inc_lo : pll->p_inc_hi;
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p_min = p_inc;
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p_max = ROUND_DOWN_TO(div_max, p_inc);
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if (p_min < plls[index].min_p)
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p_min = plls[index].min_p;
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if (p_max > plls[index].max_p)
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p_max = plls[index].max_p;
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if (p_min < pll->min_p)
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p_min = pll->min_p;
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if (p_max > pll->max_p)
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p_max = pll->max_p;
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DBG_MSG("p range is %d-%d (%d)\n", p_min, p_max, p_inc);
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@ -924,15 +921,15 @@ calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, u32 *retn, u32 *re
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p += p_inc;
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continue;
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}
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n = plls[index].min_n;
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n = pll->min_n;
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f_vco = clock * p;
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do {
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m = ROUND_UP_TO(f_vco * n, plls[index].ref_clk) / plls[index].ref_clk;
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if (m < plls[index].min_m)
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m = plls[index].min_m + 1;
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if (m > plls[index].max_m)
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m = plls[index].max_m - 1;
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m = ROUND_UP_TO(f_vco * n, pll->ref_clk) / pll->ref_clk;
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if (m < pll->min_m)
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m = pll->min_m + 1;
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if (m > pll->max_m)
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m = pll->max_m - 1;
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for (testm = m - 1; testm <= m; testm++) {
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f_out = calc_vclock3(index, m, n, p);
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if (splitm(index, m, &m1, &m2)) {
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@ -954,7 +951,7 @@ calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, u32 *retn, u32 *re
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}
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}
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n++;
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} while ((n <= plls[index].max_n) && (f_out >= clock));
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} while ((n <= pll->max_n) && (f_out >= clock));
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p += p_inc;
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} while ((p <= p_max));
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