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[POWERPC] Fix kmalloc alignment on non-coherent DMA platforms 

On platforms doing non-coherent DMA (4xx, 8xx, ...), it's important
that the kmalloc minimum alignment is set to the cache line size, to
avoid sharing cache lines between different objects, so that DMA to
one of the objects doesn't corrupt the other.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
hifive-unleashed-5.1
Benjamin Herrenschmidt 2007-11-19 19:25:06 +11:00 committed by Paul Mackerras
parent f9b6c1de69
commit 52142e756e
1 changed files with 4 additions and 0 deletions
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4
include/asm-powerpc/page_32.h
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@ -6,6 +6,10 @@
#define PPC_MEMSTART 0
#ifdef CONFIG_NOT_COHERENT_CACHE
#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
#endif
#ifndef __ASSEMBLY__
/*
* The basic type of a PTE - 64 bits for those CPUs with > 32 bit