Staging: heci: fix typos and add wait after disconnect
- Fix typo for enum HECI_WRITE. - Fix timeout issue. If the time period is greater or equal 15s, it's timeout. - Add 10ms wait time after disconnect, to ensure that hardware is ready. Otherwise in the next time connection, hardware resource may be busy. Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -1012,6 +1012,7 @@ int heci_disconnect_host_client(struct iamt_heci_device *dev,
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if (dev->host_buffer_is_empty) {
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dev->host_buffer_is_empty = 0;
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if (heci_disconnect(dev, file_ext)) {
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mdelay(10); /* Wait for hardware disconnection ready */
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list_add_tail(&priv_cb->cb_list,
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&dev->ctrl_rd_list.heci_cb.cb_list);
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} else {
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@ -1088,7 +1088,7 @@ static ssize_t heci_write(struct file *file, const char __user *ubuf,
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if (file_ext == &dev->iamthif_file_ext) {
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priv_write_cb = find_pthi_read_list_entry(dev, file);
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if ((priv_write_cb != NULL) &&
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(((currtime - priv_write_cb->read_time) >
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(((currtime - priv_write_cb->read_time) >=
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IAMTHIF_READ_TIMER) ||
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(file_ext->reading_state == HECI_READ_COMPLETE))) {
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(*offset) = 0;
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@ -1054,7 +1054,7 @@ static int heci_bh_write_handler(struct io_heci_list *cmpl_list,
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list_del(&priv_cb_pos->cb_list);
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if ((HECI_WRITING == file_ext->writing_state) &&
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(priv_cb_pos->major_file_operations ==
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HECI_WRITING) &&
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HECI_WRITE) &&
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(file_ext != &dev->iamthif_file_ext)) {
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DBG("HECI WRITE COMPLETE\n");
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file_ext->writing_state =
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