drm/radeon/kms: use power states for dynamic reclocking
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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516d0e46c8
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530079a8f3
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@ -666,10 +666,6 @@ struct radeon_pm {
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bool vblank_callback;
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int active_crtcs;
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int req_vblank;
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uint32_t min_gpu_engine_clock;
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uint32_t min_gpu_memory_clock;
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uint32_t min_mode_engine_clock;
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uint32_t min_mode_memory_clock;
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fixed20_12 max_bandwidth;
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fixed20_12 igp_sideport_mclk;
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fixed20_12 igp_system_mclk;
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@ -26,7 +26,6 @@
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#define RADEON_IDLE_LOOP_MS 100
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#define RADEON_RECLOCK_DELAY_MS 200
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static void radeon_pm_check_limits(struct radeon_device *rdev);
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static void radeon_pm_set_clocks_locked(struct radeon_device *rdev);
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static void radeon_pm_set_clocks(struct radeon_device *rdev);
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static void radeon_pm_reclock_work_handler(struct work_struct *work);
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@ -186,12 +185,21 @@ static void radeon_get_power_state(struct radeon_device *rdev,
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radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_HIGH);
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break;
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}
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DRM_INFO("Requested: e: %d m: %d p: %d\n",
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rdev->pm.requested_power_state->requested_clock_mode->sclk,
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rdev->pm.requested_power_state->requested_clock_mode->mclk,
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rdev->pm.requested_power_state->non_clock_info.pcie_lanes);
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}
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static void radeon_set_power_state(struct radeon_device *rdev)
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{
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if (rdev->pm.requested_power_state == rdev->pm.current_power_state)
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return;
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DRM_INFO("Setting: e: %d m: %d p: %d\n",
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rdev->pm.requested_power_state->requested_clock_mode->sclk,
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rdev->pm.requested_power_state->requested_clock_mode->mclk,
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rdev->pm.requested_power_state->non_clock_info.pcie_lanes);
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/* set pcie lanes */
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/* set voltage */
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/* set engine clock */
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@ -216,8 +224,6 @@ int radeon_pm_init(struct radeon_device *rdev)
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radeon_print_power_mode_info(rdev);
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}
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radeon_pm_check_limits(rdev);
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if (radeon_debugfs_pm_init(rdev)) {
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DRM_ERROR("Failed to register debugfs file for PM!\n");
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}
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@ -235,12 +241,6 @@ int radeon_pm_init(struct radeon_device *rdev)
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return 0;
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}
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static void radeon_pm_check_limits(struct radeon_device *rdev)
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{
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rdev->pm.min_gpu_engine_clock = rdev->clock.default_sclk - 5000;
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rdev->pm.min_gpu_memory_clock = rdev->clock.default_mclk - 5000;
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}
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void radeon_pm_compute_clocks(struct radeon_device *rdev)
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{
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struct drm_device *ddev = rdev->ddev;
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@ -287,8 +287,6 @@ void radeon_pm_compute_clocks(struct radeon_device *rdev)
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mutex_unlock(&rdev->pm.mutex);
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}
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} else if (count == 1) {
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rdev->pm.min_mode_engine_clock = rdev->pm.min_gpu_engine_clock;
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rdev->pm.min_mode_memory_clock = rdev->pm.min_gpu_memory_clock;
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/* TODO: Increase clocks if needed for current mode */
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if (rdev->pm.state == PM_STATE_MINIMUM) {
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@ -326,23 +324,22 @@ static void radeon_pm_set_clocks_locked(struct radeon_device *rdev)
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/*radeon_fence_wait_last(rdev);*/
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switch (rdev->pm.planned_action) {
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case PM_ACTION_UPCLOCK:
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radeon_set_engine_clock(rdev, rdev->clock.default_sclk);
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radeon_get_power_state(rdev, PM_ACTION_UPCLOCK);
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rdev->pm.downclocked = false;
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break;
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case PM_ACTION_DOWNCLOCK:
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radeon_set_engine_clock(rdev,
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rdev->pm.min_mode_engine_clock);
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radeon_get_power_state(rdev, PM_ACTION_DOWNCLOCK);
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rdev->pm.downclocked = true;
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break;
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case PM_ACTION_MINIMUM:
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radeon_set_engine_clock(rdev,
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rdev->pm.min_gpu_engine_clock);
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radeon_get_power_state(rdev, PM_ACTION_MINIMUM);
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break;
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case PM_ACTION_NONE:
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radeon_get_power_state(rdev, PM_ACTION_NONE);
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DRM_ERROR("%s: PM_ACTION_NONE\n", __func__);
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break;
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}
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radeon_set_power_state(rdev);
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rdev->pm.planned_action = PM_ACTION_NONE;
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}
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