arm64 fixes:
- __cpu_suspend mm switching fix after warm boot - arch_setup_dma_ops implementation - pgd_page compilation error fix - defconfig updates -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUmaTZAAoJEGvWsS0AyF7xbLsP/1/9LyqT1nrOMYJ5ZlQ/8dx7 hrF4el2YcgGh4+3o67UhQnPYErmEPgrIa6jRPoqDMJ8W33YEXIKyFEz7qsTQuXfp Rv246xP26gBKR43vBs8gcBeIHuIYidPQeHmZsaNO6fdp4k8v8rfZG7jL+IOHWxEn bRTK6jAu7f6OspCrtRFOwiuxEH3GCM636ck548skU7Wx8h6cVGYrZGDGCgmpEPk8 uojCAL/JTzAxb7Qx6iwqTNzG+Z24wJ1Tdad3uJHuuLX0s5Jy/6Ymy1e61i0S+nYr rQX8/qLvQi66zKQnZbgKjrfftA3RfBPKw/fP/NKTFmz+P8EiNFafTQrgINv15wlh vAhl3uQH38qbPcpl6OjJF8XaVeNjJYVwN6egbQwQwumvSUenFQ3T1o+U/tUzKIq5 wjEs0Mhw9KbPeP4yqJ2WddqJ5M2Y9gpIvmJG5VYAS2krnIy5jou00+APY0Nt40r+ 4hTX8oqnZ+6FfRQDTyEKjXezT5QlUIeZ5vvnx2xvKTnVgRUTC7+3Tp7nYYPtpPR+ 5arSwzrj4YxsTE263VSeKBJAVJEoA2kcQV2Yg8hCiuH2TMtgzuusOGjer0LlMVqU g7OCVB6bcl5alsR+aL2kJAetmcQRMDTiDL5EOU+6PJ/G4TzGET70H1BZmfBHHQDp R1aLi3YyOhzHjjjqAEMk =GFQP -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: - __cpu_suspend mm switching fix after warm boot - arch_setup_dma_ops implementation - pgd_page compilation error fix - defconfig updates * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: mm: Add pgd_page to support RCU fast_gup arm64: defconfig: defconfig update for 3.19 arm64: kernel: fix __cpu_suspend mm switch on warm-boot arm64: Replace set_arch_dma_coherent_ops with arch_setup_dma_ops
This commit is contained in:
commit
53262d12d1
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@ -1,6 +1,7 @@
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# CONFIG_LOCALVERSION_AUTO is not set
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# CONFIG_LOCALVERSION_AUTO is not set
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CONFIG_SYSVIPC=y
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CONFIG_SYSVIPC=y
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CONFIG_POSIX_MQUEUE=y
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CONFIG_POSIX_MQUEUE=y
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CONFIG_FHANDLE=y
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CONFIG_AUDIT=y
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CONFIG_AUDIT=y
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CONFIG_NO_HZ_IDLE=y
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CONFIG_NO_HZ_IDLE=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_HIGH_RES_TIMERS=y
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@ -13,14 +14,12 @@ CONFIG_TASK_IO_ACCOUNTING=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_RESOURCE_COUNTERS=y
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CONFIG_MEMCG=y
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CONFIG_MEMCG=y
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CONFIG_MEMCG_SWAP=y
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CONFIG_MEMCG_SWAP=y
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CONFIG_MEMCG_KMEM=y
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CONFIG_MEMCG_KMEM=y
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CONFIG_CGROUP_HUGETLB=y
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CONFIG_CGROUP_HUGETLB=y
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# CONFIG_UTS_NS is not set
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# CONFIG_UTS_NS is not set
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# CONFIG_IPC_NS is not set
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# CONFIG_IPC_NS is not set
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# CONFIG_PID_NS is not set
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# CONFIG_NET_NS is not set
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# CONFIG_NET_NS is not set
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CONFIG_SCHED_AUTOGROUP=y
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CONFIG_SCHED_AUTOGROUP=y
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_BLK_DEV_INITRD=y
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@ -92,7 +91,6 @@ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
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CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_VIRTIO_CONSOLE=y
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CONFIG_VIRTIO_CONSOLE=y
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# CONFIG_HW_RANDOM is not set
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# CONFIG_HW_RANDOM is not set
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# CONFIG_HMC_DRV is not set
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CONFIG_SPI=y
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CONFIG_SPI=y
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CONFIG_SPI_PL022=y
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CONFIG_SPI_PL022=y
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CONFIG_GPIO_PL061=y
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CONFIG_GPIO_PL061=y
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@ -133,6 +131,8 @@ CONFIG_EXT3_FS=y
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CONFIG_EXT4_FS=y
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CONFIG_EXT4_FS=y
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CONFIG_FANOTIFY=y
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CONFIG_FANOTIFY=y
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CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
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CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
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CONFIG_QUOTA=y
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CONFIG_AUTOFS4_FS=y
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CONFIG_FUSE_FS=y
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CONFIG_FUSE_FS=y
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CONFIG_CUSE=y
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CONFIG_CUSE=y
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CONFIG_VFAT_FS=y
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CONFIG_VFAT_FS=y
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@ -152,14 +152,15 @@ CONFIG_MAGIC_SYSRQ=y
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CONFIG_DEBUG_KERNEL=y
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CONFIG_DEBUG_KERNEL=y
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CONFIG_LOCKUP_DETECTOR=y
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CONFIG_LOCKUP_DETECTOR=y
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# CONFIG_SCHED_DEBUG is not set
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# CONFIG_SCHED_DEBUG is not set
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# CONFIG_DEBUG_PREEMPT is not set
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# CONFIG_FTRACE is not set
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# CONFIG_FTRACE is not set
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CONFIG_KEYS=y
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CONFIG_SECURITY=y
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CONFIG_SECURITY=y
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CONFIG_CRYPTO_ANSI_CPRNG=y
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CONFIG_CRYPTO_ANSI_CPRNG=y
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CONFIG_ARM64_CRYPTO=y
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CONFIG_ARM64_CRYPTO=y
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CONFIG_CRYPTO_SHA1_ARM64_CE=y
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CONFIG_CRYPTO_SHA1_ARM64_CE=y
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CONFIG_CRYPTO_SHA2_ARM64_CE=y
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CONFIG_CRYPTO_SHA2_ARM64_CE=y
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CONFIG_CRYPTO_GHASH_ARM64_CE=y
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CONFIG_CRYPTO_GHASH_ARM64_CE=y
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CONFIG_CRYPTO_AES_ARM64_CE=y
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CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
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CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
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CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
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CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
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CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
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CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
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@ -52,13 +52,14 @@ static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
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dev->archdata.dma_ops = ops;
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dev->archdata.dma_ops = ops;
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}
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}
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static inline int set_arch_dma_coherent_ops(struct device *dev)
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static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
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struct iommu_ops *iommu, bool coherent)
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{
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{
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dev->archdata.dma_coherent = true;
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dev->archdata.dma_coherent = coherent;
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if (coherent)
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set_dma_ops(dev, &coherent_swiotlb_dma_ops);
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set_dma_ops(dev, &coherent_swiotlb_dma_ops);
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return 0;
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}
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}
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#define set_arch_dma_coherent_ops set_arch_dma_coherent_ops
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#define arch_setup_dma_ops arch_setup_dma_ops
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/* do not use this function in a driver */
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/* do not use this function in a driver */
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static inline bool is_device_dma_coherent(struct device *dev)
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static inline bool is_device_dma_coherent(struct device *dev)
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@ -298,7 +298,6 @@ void pmdp_splitting_flush(struct vm_area_struct *vma, unsigned long address,
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#define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
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#define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
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#define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot)
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#define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot)
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#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
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#define pud_write(pud) pte_write(pud_pte(pud))
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#define pud_write(pud) pte_write(pud_pte(pud))
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#define pud_pfn(pud) (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
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#define pud_pfn(pud) (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
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return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
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return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
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}
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}
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#define pud_page(pud) pmd_page(pud_pmd(pud))
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#define pud_page(pud) pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK))
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#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 2 */
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#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 2 */
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return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(addr);
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return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(addr);
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}
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}
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#define pgd_page(pgd) pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK))
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#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 3 */
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#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 3 */
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#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
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#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
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@ -5,6 +5,7 @@
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#include <asm/debug-monitors.h>
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#include <asm/debug-monitors.h>
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#include <asm/pgtable.h>
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#include <asm/pgtable.h>
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#include <asm/memory.h>
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#include <asm/memory.h>
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#include <asm/mmu_context.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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#include <asm/suspend.h>
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#include <asm/tlbflush.h>
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#include <asm/tlbflush.h>
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*/
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*/
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ret = __cpu_suspend_enter(arg, fn);
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ret = __cpu_suspend_enter(arg, fn);
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if (ret == 0) {
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if (ret == 0) {
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/*
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* We are resuming from reset with TTBR0_EL1 set to the
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* idmap to enable the MMU; restore the active_mm mappings in
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* TTBR0_EL1 unless the active_mm == &init_mm, in which case
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* the thread entered __cpu_suspend with TTBR0_EL1 set to
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* reserved TTBR0 page tables and should be restored as such.
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*/
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if (mm == &init_mm)
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cpu_set_reserved_ttbr0();
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else
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cpu_switch_mm(mm->pgd, mm);
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cpu_switch_mm(mm->pgd, mm);
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flush_tlb_all();
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flush_tlb_all();
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/*
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/*
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