Qualcomm ARM64 Updates for v4.16
* Assorted cleanups for msm8916 * Fix IPC references for smsm -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaSdLNAAoJEFKiBbHx2RXVKMkQAMqXZYfcE2ymmo9n4Lk1SjfQ gu4OJ3d9O0PfzKrvF5j1a73FBfxjNQd6qL7fiQGPAw2T3mWCFWRfD61jksHY/zHi zYXHSdgo7q2fQfB5RMuIA8hTQUZd6KsBhAL9G6c74gbl+VistCW9bqN1wnPqasEW VAAfeALFKpHcbcGi79g8giQqO5Z2FT4W2FArcsLRP45kP5vhQqQOlKVva7/SiApB 6uQNrMmC+ayxd7ICkba2ggO+pN3MwyDY7iMnmU7o1RU0AYsEp2tSh2CIowy6yoc2 a8ivfBt+tAEx5XvxNwetkOK6h1YkZaqWyXvQjva09Cdp9l2aJAQsA1tupT06h/I1 oW0fZbfTNc4Tx3047TcCz3ooMTJx+qtFtjxdoMVJ9160WL+VYogAJQOnS+IbXNzf lqQBCt+URrZXOrJhBP3azMNkBpETqse2hranGdIxfQo4fxZ9sC/p7tTpk+9PvZSX 1lFv382aift2jtMbWjRrJFqcBSDWK4p5wJ+P0d09cV6L9LUyhIm+gIRVrDXljrDl OBTJ9vFeqIrVkKT2P6P11jJUtlUODbUMEwgNzHRTjdJr5jRj5vLPkiLxxCPUI9hy /M6BBmYqfadtbqiy7iLP8SxGR2EzlF9BmrmUtxFBGoJZ0jTiuHF4lexBhU6c9IkK trlXObBORoUzUSyMxfcK =mfBq -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt Pull "Qualcomm ARM64 Updates for v4.16" from Andy Gross: * Assorted cleanups for msm8916 * Fix IPC references for smsm * tag 'qcom-arm64-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: qcom: msm8916-pins: keep cdc_dmic pins in suspend mode arm64: dts: qcom: msm8916-pins: move sdhc2 cd node with its siblings arm64: dts: qcom: msm8916: normalize I2C and SPI nodes arm64: dts: qcom: msm8916: drop unused board-specific nodes arm64: dts: qcom: msm8916-pins: remove assignments to bias-disable arm64: dts: qcom: pm8916: fix wcd_codec indentation arm64: dts: msm8916: Correct ipc references for smsm arm64: dts: msm8916: Add missing #phy-cells
This commit is contained in:
Arnd Bergmann
commit
5375ef7d1c
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@ -278,7 +278,7 @@
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pinconf {
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pins = "gpio6", "gpio7";
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drive-strength = <16>;
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bias-disable = <0>;
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bias-disable;
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};
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};
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@ -290,7 +290,7 @@
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pinconf {
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pins = "gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable = <0>;
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bias-disable;
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};
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};
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@ -302,7 +302,7 @@
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pinconf {
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pins = "gpio14", "gpio15";
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drive-strength = <16>;
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bias-disable = <0>;
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bias-disable;
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};
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};
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@ -314,7 +314,7 @@
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pinconf {
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pins = "gpio14", "gpio15";
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drive-strength = <2>;
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bias-disable = <0>;
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bias-disable;
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};
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};
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@ -326,7 +326,7 @@
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pinconf {
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pins = "gpio22", "gpio23";
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drive-strength = <16>;
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bias-disable = <0>;
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bias-disable;
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};
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};
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@ -338,32 +338,7 @@
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pinconf {
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pins = "gpio22", "gpio23";
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drive-strength = <2>;
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bias-disable = <0>;
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};
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};
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sdhc2_cd_pin {
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sdc2_cd_on: cd_on {
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pinmux {
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function = "gpio";
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pins = "gpio38";
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};
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pinconf {
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pins = "gpio38";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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sdc2_cd_off: cd_off {
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pinmux {
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function = "gpio";
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pins = "gpio38";
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};
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pinconf {
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pins = "gpio38";
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drive-strength = <2>;
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bias-disable;
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};
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bias-disable;
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};
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};
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@ -505,26 +480,25 @@
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};
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};
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ext-codec-lines {
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ext_codec_lines_act: lines_on {
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pmx_sdc2_cd_pin {
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sdc2_cd_on: cd_on {
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pinmux {
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function = "gpio";
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pins = "gpio67";
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pins = "gpio38";
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};
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pinconf {
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pins = "gpio67";
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drive-strength = <8>;
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bias-disable;
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output-high;
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pins = "gpio38";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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ext_codec_lines_sus: lines_off {
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sdc2_cd_off: cd_off {
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pinmux {
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function = "gpio";
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pins = "gpio67";
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pins = "gpio38";
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};
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pinconf {
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pins = "gpio67";
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pins = "gpio38";
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drive-strength = <2>;
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bias-disable;
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};
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@ -687,6 +661,14 @@
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};
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};
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cdc_dmic_lines_sus: dmic_lines_off {
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pinmux_dmic0_clk {
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function = "dmic0_clk";
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pins = "gpio0";
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};
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pinmux_dmic0_data {
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function = "dmic0_data";
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pins = "gpio1";
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};
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pinconf {
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pins = "gpio0", "gpio1";
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drive-strength = <2>;
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@ -695,32 +677,6 @@
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};
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};
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cross-conn-det {
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cross_conn_det_act: lines_on {
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pinmux {
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function = "gpio";
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pins = "gpio120";
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};
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pinconf {
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pins = "gpio120";
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drive-strength = <8>;
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output-low;
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bias-pull-down;
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};
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};
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cross_conn_det_sus: lines_off {
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pinmux {
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function = "gpio";
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pins = "gpio120";
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};
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pinconf {
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pins = "gpio120";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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wcnss_pin_a: wcnss-active {
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pinmux {
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pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
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@ -355,7 +355,7 @@
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blsp_spi1: spi@78b5000 {
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compatible = "qcom,spi-qup-v2.2.1";
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reg = <0x078b5000 0x600>;
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reg = <0x078b5000 0x500>;
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interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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@ -372,7 +372,7 @@
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blsp_spi2: spi@78b6000 {
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compatible = "qcom,spi-qup-v2.2.1";
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reg = <0x078b6000 0x600>;
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reg = <0x078b6000 0x500>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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@ -389,7 +389,7 @@
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blsp_spi3: spi@78b7000 {
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compatible = "qcom,spi-qup-v2.2.1";
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reg = <0x078b7000 0x600>;
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reg = <0x078b7000 0x500>;
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interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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@ -406,7 +406,7 @@
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blsp_spi4: spi@78b8000 {
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compatible = "qcom,spi-qup-v2.2.1";
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reg = <0x078b8000 0x600>;
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reg = <0x078b8000 0x500>;
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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@ -423,7 +423,7 @@
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blsp_spi5: spi@78b9000 {
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compatible = "qcom,spi-qup-v2.2.1";
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reg = <0x078b9000 0x600>;
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reg = <0x078b9000 0x500>;
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interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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@ -440,7 +440,7 @@
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blsp_spi6: spi@78ba000 {
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compatible = "qcom,spi-qup-v2.2.1";
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reg = <0x078ba000 0x600>;
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reg = <0x078ba000 0x500>;
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interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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@ -457,10 +457,10 @@
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blsp_i2c2: i2c@78b6000 {
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compatible = "qcom,i2c-qup-v2.2.1";
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reg = <0x78b6000 0x1000>;
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reg = <0x078b6000 0x500>;
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interrupts = <GIC_SPI 96 0>;
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clocks = <&gcc GCC_BLSP1_AHB_CLK>,
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<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
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<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
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clock-names = "iface", "core";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&i2c2_default>;
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@ -472,10 +472,10 @@
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blsp_i2c4: i2c@78b8000 {
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compatible = "qcom,i2c-qup-v2.2.1";
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reg = <0x78b8000 0x1000>;
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reg = <0x078b8000 0x500>;
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interrupts = <GIC_SPI 98 0>;
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clocks = <&gcc GCC_BLSP1_AHB_CLK>,
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<&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
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<&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
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clock-names = "iface", "core";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&i2c4_default>;
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@ -487,10 +487,10 @@
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blsp_i2c6: i2c@78ba000 {
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compatible = "qcom,i2c-qup-v2.2.1";
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reg = <0x78ba000 0x1000>;
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reg = <0x078ba000 0x500>;
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interrupts = <GIC_SPI 100 0>;
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clocks = <&gcc GCC_BLSP1_AHB_CLK>,
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<&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
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<&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
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clock-names = "iface", "core";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&i2c6_default>;
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@ -906,6 +906,7 @@
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"dsi_phy_regulator";
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#clock-cells = <1>;
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#phy-cells = <0>;
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clocks = <&gcc GCC_MDSS_AHB_CLK>;
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clock-names = "iface_clk";
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@ -1435,8 +1436,8 @@
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,ipc-1 = <&apcs 0 13>;
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qcom,ipc-6 = <&apcs 0 19>;
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qcom,ipc-1 = <&apcs 8 13>;
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qcom,ipc-3 = <&apcs 8 19>;
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apps_smsm: apps@0 {
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reg = <0>;
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@ -97,47 +97,45 @@
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#address-cells = <1>;
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#size-cells = <0>;
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wcd_codec: codec@f000 {
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compatible = "qcom,pm8916-wcd-analog-codec";
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reg = <0xf000 0x200>;
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reg-names = "pmic-codec-core";
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clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
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clock-names = "mclk";
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interrupt-parent = <&spmi_bus>;
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interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x1 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x2 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x3 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x4 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x5 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x6 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x7 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x0 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x1 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x2 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x3 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x4 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x5 IRQ_TYPE_NONE>;
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interrupt-names = "cdc_spk_cnp_int",
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"cdc_spk_clip_int",
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"cdc_spk_ocp_int",
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"mbhc_ins_rem_det1",
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"mbhc_but_rel_det",
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"mbhc_but_press_det",
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"mbhc_ins_rem_det",
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"mbhc_switch_int",
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"cdc_ear_ocp_int",
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"cdc_hphr_ocp_int",
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"cdc_hphl_ocp_det",
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"cdc_ear_cnp_int",
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"cdc_hphr_cnp_int",
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"cdc_hphl_cnp_int";
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vdd-cdc-io-supply = <&pm8916_l5>;
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vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>;
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vdd-micbias-supply = <&pm8916_l13>;
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#sound-dai-cells = <1>;
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};
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wcd_codec: codec@f000 {
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compatible = "qcom,pm8916-wcd-analog-codec";
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reg = <0xf000 0x200>;
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reg-names = "pmic-codec-core";
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clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
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clock-names = "mclk";
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interrupt-parent = <&spmi_bus>;
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interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x1 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x2 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x3 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x4 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x5 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x6 IRQ_TYPE_NONE>,
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<0x1 0xf0 0x7 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x0 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x1 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x2 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x3 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x4 IRQ_TYPE_NONE>,
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<0x1 0xf1 0x5 IRQ_TYPE_NONE>;
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interrupt-names = "cdc_spk_cnp_int",
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"cdc_spk_clip_int",
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"cdc_spk_ocp_int",
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"mbhc_ins_rem_det1",
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"mbhc_but_rel_det",
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"mbhc_but_press_det",
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"mbhc_ins_rem_det",
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"mbhc_switch_int",
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"cdc_ear_ocp_int",
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"cdc_hphr_ocp_int",
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"cdc_hphl_ocp_det",
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"cdc_ear_cnp_int",
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"cdc_hphr_cnp_int",
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"cdc_hphl_cnp_int";
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vdd-cdc-io-supply = <&pm8916_l5>;
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vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>;
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vdd-micbias-supply = <&pm8916_l13>;
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#sound-dai-cells = <1>;
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};
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};
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||||
};
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|
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Loading…
Reference in a new issue