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[PATCH] sisfb update

This lifts sisfb from version 1.7.17 to version 1.8.9. Changes include:

- Added support for XGI V3XT, V5, V8, Z7 chipsets, including POSTing of
  all of these chipsets.

- Added support for latest SiS chipsets (761).

- Added support for SiS76x memory "hybrid" mode.

- Added support for new LCD resolutions (eg 1280x854, 856x480).

- Fixed support for 320x240 STN panels (for embedded devices).

- Fixed many HDTV modes (525p, 750p, 1080i).

- Fixed PCI config register reading/writing to use proper kernel
  functions for this purpose.

- Fixed PCI ROM handling to use the kernel's proper functions.

- Removed lots of "typedef"s.

- Removed lots of code which was for X.org/XFree86 only.

- Fixed coding style in many places.

- Removed lots of 2.4 cruft.

- Reduced stack size by unifying two previously separate structs into
  one.

- Added new hooks for memory allocation (for DRM).  Now the driver can
  truly handle multiple cards, including memory management.

- Fixed numerous minor bugs.

Signed-off-by: Thomas Winischhofer <thomas@winischhofer.net>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
hifive-unleashed-5.1
Thomas Winischhofer 2005-09-09 13:04:45 -07:00 committed by Linus Torvalds
parent 5c06e2aa63
commit 544393fe58
22 changed files with 14351 additions and 18470 deletions

View File

@ -1079,15 +1079,16 @@ config FB_SAVAGE_ACCEL
choose N here.
config FB_SIS
tristate "SiS acceleration"
tristate "SiS/XGI display support"
depends on FB && PCI
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
select FB_SOFT_CURSOR
help
This is the frame buffer device driver for the SiS 300, 315 and
330 series VGA chipsets. Specs available at <http://www.sis.com>
This is the frame buffer device driver for the SiS 300, 315, 330
and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
Specs available at <http://www.sis.com> and <http://www.xgitech.com>.
To compile this driver as a module, choose M here; the module
will be called sisfb.
@ -1099,11 +1100,12 @@ config FB_SIS_300
Say Y here to support use of the SiS 300/305, 540, 630 and 730.
config FB_SIS_315
bool "SiS 315/330 series support"
bool "SiS 315/330/340 series and XGI support"
depends on FB_SIS
help
Say Y here to support use of the SiS 315 and 330 series
(315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760).
Say Y here to support use of the SiS 315, 330 and 340 series
(315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760, 761) as well
as XGI V3XT, V5, V8 and Z7.
config FB_NEOMAGIC
tristate "NeoMagic display support"

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -4,4 +4,4 @@
obj-$(CONFIG_FB_SIS) += sisfb.o
sisfb-objs := sis_main.o sis_accel.o init.o init301.o
sisfb-objs := sis_main.o sis_accel.o init.o init301.o initextlfb.o

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -3,7 +3,7 @@
/*
* Data and prototypes for init301.c
*
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
@ -50,18 +50,18 @@
*
*/
#ifndef _INIT301_
#define _INIT301_
#ifndef _INIT301_H_
#define _INIT301_H_
#include "osdef.h"
#include "initdef.h"
#ifdef LINUX_XF86
#ifdef SIS_XORG_XF86
#include "sis.h"
#include "sis_regs.h"
#endif
#ifdef LINUX_KERNEL
#ifdef SIS_LINUX_KERNEL
#include "vgatypes.h"
#include "vstruct.h"
#ifdef SIS_CP
@ -69,8 +69,13 @@
#endif
#include <linux/config.h>
#include <linux/version.h>
#include <asm/io.h>
#include <linux/types.h>
#include <asm/io.h>
#include <linux/fb.h>
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
#include <video/fbcon.h>
#endif
#include "sis.h"
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
#include <linux/sisfb.h>
#else
@ -78,7 +83,7 @@
#endif
#endif
static const UCHAR SiS_YPbPrTable[3][64] = {
static const unsigned char SiS_YPbPrTable[3][64] = {
{
0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
@ -90,17 +95,17 @@ static const UCHAR SiS_YPbPrTable[3][64] = {
0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00
},
{
0x1d,0x11,0x06,0x09,0x0b,0x0c,0x0c,0x0c,
0x33,0x06,0x06,0x09,0x0b,0x0c,0x0c,0x0c,
0x98,0x0a,0x01,0x0d,0x06,0x0d,0x04,0x0a,
0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
0x0c,0x50,0xb2,0x9f,0x16,0x59,0x4c /*0x4f*/,0x13,
0x0c,0x50,0xb2,0x9f,0x16,0x59,0x4f,0x13,
0xad,0x11,0xad,0x1d,0x40,0x8a,0x3d,0xb8,
0x51,0x5e,0x60,0x57 /*0x49*/,0x7b /*0x7d*/,0x92,0x0f,0x40,
0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x4b,
0x51,0x5e,0x60,0x49,0x7d,0x92,0x0f,0x40,
0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x4e,
0x43,0x41,0x11,0x00,0xfc,0xff,0x32,0x00
},
{
#if 1
#if 0 /* OK, but sticks to left edge */
0x13,0x1d,0xe8,0x09,0x09,0xed,0x0c,0x0c,
0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a,
0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
@ -110,20 +115,42 @@ static const UCHAR SiS_YPbPrTable[3][64] = {
0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x27,
0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00
#endif
#if 0
0x2a,0x14,0xe8,0x09,0x09,0xed,0x0c,0x0c, /* TEST (0.93) - BAD */
#if 1 /* Perfect */
0x23,0x2d,0xe8,0x09,0x09,0xed,0x0c,0x0c,
0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a,
0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
0xed,0x50,0x70,0x9e,0x16,0x57,0x6c,0x13,
0x27,0x0b,0x27,0xfb,0x30,0x27,0x15,0xb0,
0x3b,0xdb,0x61,0x24,0x78,0x92,0x0f,0xff,
0xff,0xff,0xff,0xff,0xff,0xff,0x14,0x6f,
0x00,0x52,0xbb,0x00,0xd5,0xf7,0xa2,0x00
0xed,0x50,0x70,0x9f,0x16,0x59,0x60,0x13,
0x27,0x0b,0x27,0xfc,0x30,0x27,0x1c,0xb0,
0x4b,0x4b,0x6f,0x2f,0x63,0x92,0x0f,0x40,
0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x73,
0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00
#endif
}
};
static const UCHAR SiS_HiTVGroup3_1[] = {
static const unsigned char SiS_TVPhase[] =
{
0x21,0xED,0xBA,0x08, /* 0x00 SiS_NTSCPhase */
0x2A,0x05,0xE3,0x00, /* 0x01 SiS_PALPhase */
0x21,0xE4,0x2E,0x9B, /* 0x02 SiS_PALMPhase */
0x21,0xF4,0x3E,0xBA, /* 0x03 SiS_PALNPhase */
0x1E,0x8B,0xA2,0xA7,
0x1E,0x83,0x0A,0xE0, /* 0x05 SiS_SpecialPhaseM */
0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,
0x21,0xF0,0x7B,0xD6, /* 0x08 SiS_NTSCPhase2 */
0x2A,0x09,0x86,0xE9, /* 0x09 SiS_PALPhase2 */
0x21,0xE6,0xEF,0xA4, /* 0x0a SiS_PALMPhase2 */
0x21,0xF6,0x94,0x46, /* 0x0b SiS_PALNPhase2 */
0x1E,0x8B,0xA2,0xA7,
0x1E,0x83,0x0A,0xE0, /* 0x0d SiS_SpecialPhaseM */
0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,
0x1e,0x8c,0x5c,0x7a, /* 0x10 SiS_SpecialPhase */
0x25,0xd4,0xfd,0x5e /* 0x11 SiS_SpecialPhaseJ */
};
static const unsigned char SiS_HiTVGroup3_1[] = {
0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x13,
0xb1, 0x41, 0x62, 0x62, 0xff, 0xf4, 0x45, 0xa6,
0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20,
@ -134,7 +161,7 @@ static const UCHAR SiS_HiTVGroup3_1[] = {
0x1a, 0x1f, 0x25, 0x2a, 0x4c, 0xaa, 0x01
};
static const UCHAR SiS_HiTVGroup3_2[] = {
static const unsigned char SiS_HiTVGroup3_2[] = {
0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x7a,
0x54, 0x41, 0xe7, 0xe7, 0xff, 0xf4, 0x45, 0xa6,
0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20,
@ -147,7 +174,7 @@ static const UCHAR SiS_HiTVGroup3_2[] = {
/* 301C / 302ELV extended Part2 TV registers (4 tap scaler) */
static const UCHAR SiS_Part2CLVX_1[] = {
static const unsigned char SiS_Part2CLVX_1[] = {
0x00,0x00,
0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
@ -155,7 +182,7 @@ static const UCHAR SiS_Part2CLVX_1[] = {
0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E
};
static const UCHAR SiS_Part2CLVX_2[] = {
static const unsigned char SiS_Part2CLVX_2[] = {
0x00,0x00,
0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
@ -163,7 +190,7 @@ static const UCHAR SiS_Part2CLVX_2[] = {
0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E
};
static const UCHAR SiS_Part2CLVX_3[] = { /* NTSC, 525i, 525p */
static const unsigned char SiS_Part2CLVX_3[] = { /* NTSC, 525i, 525p */
0xE0,0x01,
0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D,
0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C,
@ -182,7 +209,7 @@ static const UCHAR SiS_Part2CLVX_3[] = { /* NTSC, 525i, 525p */
0xFF,0xFF
};
static const UCHAR SiS_Part2CLVX_4[] = { /* PAL */
static const unsigned char SiS_Part2CLVX_4[] = { /* PAL */
0x58,0x02,
0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D,
0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
@ -201,7 +228,7 @@ static const UCHAR SiS_Part2CLVX_4[] = { /* PAL */
0xFF,0xFF
};
static const UCHAR SiS_Part2CLVX_5[] = { /* 750p */
static const unsigned char SiS_Part2CLVX_5[] = { /* 750p */
0x00,0x03,
0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D,
0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
@ -210,7 +237,7 @@ static const UCHAR SiS_Part2CLVX_5[] = { /* 750p */
0xFF,0xFF
};
static const UCHAR SiS_Part2CLVX_6[] = { /* 1080i */
static const unsigned char SiS_Part2CLVX_6[] = { /* 1080i */
0x00,0x04,
0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D,
0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C,
@ -221,7 +248,7 @@ static const UCHAR SiS_Part2CLVX_6[] = { /* 1080i */
#ifdef SIS315H
/* 661 et al LCD data structure (2.03.00) */
static const UCHAR SiS_LCDStruct661[] = {
static const unsigned char SiS_LCDStruct661[] = {
/* 1024x768 */
/* type|CR37| HDE | VDE | HT | VT | hss | hse */
0x02,0xC0,0x00,0x04,0x00,0x03,0x40,0x05,0x26,0x03,0x10,0x00,0x88,
@ -249,11 +276,20 @@ static const UCHAR SiS_LCDStruct661[] = {
/* 1680x1050 */
0x0D,0xE0,0x90,0x06,0x1A,0x04,0x6C,0x07,0x2A,0x04,0x1A,0x00,0x4C,
0x00,0x03,0x00,0x06,0x00,0x79,0xBE,0x44,0x00,0x00,0x00,0x00,0x06,
/* 1280x800_3 */
0x0C,0xE0,0x00,0x05,0x20,0x03,0xAA,0x05,0x2E,0x03,0x30,0x00,0x50,
0x00,0x04,0x00,0x03,0x00,0x47,0xA9,0x10,0x00,0x00,0x00,0x00,0x07,
/* 800x600 */
0x01,0xC0,0x20,0x03,0x58,0x02,0x20,0x04,0x74,0x02,0x2A,0x00,0x80,
0x00,0x06,0x00,0x04,0x00,0x28,0x63,0x4B,0x00,0x00,0x00,0x00,0x00,
/* 1280x854 */
0x08,0xE0,0x00,0x05,0x56,0x03,0x80,0x06,0x5d,0x03,0x10,0x00,0x70,
0x00,0x01,0x00,0x03,0x00,0x54,0x75,0x13,0x00,0x00,0x00,0x00,0x08
};
#endif
#ifdef SIS300
static UCHAR SiS300_TrumpionData[7][80] = {
static unsigned char SiS300_TrumpionData[14][80] = {
{ 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
0x20,0x03,0x0B,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x10,0x00,0x00,0x04,0x23,
0x00,0x00,0x03,0x28,0x03,0x10,0x05,0x08,0x40,0x10,0x00,0x10,0x04,0x23,0x00,0x23,
@ -288,119 +324,182 @@ static UCHAR SiS300_TrumpionData[7][80] = {
0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23,
0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23,
0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01,
0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 }
0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 },
/* variant 2 */
{ 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23,
0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23,
0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05,
0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
{ 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23,
0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23,
0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05,
0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
{ 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x8A,0x00,0xD8,0x02,
0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
{ 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x72,0x00,0xD8,0x02,
0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
{ 0x02,0x0A,0x02,0x00,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
0x20,0x03,0x16,0x00,0xE0,0x01,0x0D,0x02,0x60,0x0C,0x30,0x98,0x00,0x00,0x04,0x23,
0x00,0x01,0x03,0x45,0x03,0x48,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x23,0x00,0x23,
0x03,0x11,0x60,0xF4,0x01,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x05,0x01,0x00,0x05,0x05,
0x04,0x0C,0x08,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 },
{ 0x02,0x0A,0x02,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xBF,0x00,0x20,0x03,
0x20,0x04,0x0D,0x00,0x58,0x02,0x71,0x02,0x80,0x0C,0x30,0x9A,0x00,0xFA,0x03,0x1D,
0x00,0x01,0x03,0x22,0x03,0x28,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x1D,0x00,0x1D,
0x03,0x11,0x60,0x39,0x03,0x40,0x05,0xF4,0x18,0x07,0x02,0x06,0x04,0x01,0x06,0x0B,
0x02,0x0A,0x20,0x19,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 },
{ 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xEF,0x00,0x00,0x04,
0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23,
0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23,
0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01,
0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 }
};
#endif
void SiS_UnLockCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
void SiS_EnableCRT2(SiS_Private *SiS_Pr);
USHORT SiS_GetRatePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_INFO HwInfo);
void SiS_WaitRetrace1(SiS_Private *SiS_Pr);
BOOLEAN SiS_IsDualEdge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
BOOLEAN SiS_IsVAMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
void SiS_SetChrontelGPIO(SiS_Private *SiS_Pr, USHORT myvbinfo);
void SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT ModeNo,
USHORT ModeIdIndex, PSIS_HW_INFO HwInfo,
int checkcrt2mode);
void SiS_SetYPbPr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
void SiS_SetTVMode(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_INFO HwInfo);
void SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_INFO HwInfo);
USHORT SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo);
USHORT SiS_GetResInfo(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex);
void SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
BOOLEAN SiS_SetCRT2Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo);
void SiS_SiS30xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
void SiS_SiS30xBLOff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr);
#ifndef SIS_LINUX_KERNEL
void SiS_LockCRT2(struct SiS_Private *SiS_Pr);
#endif
void SiS_EnableCRT2(struct SiS_Private *SiS_Pr);
unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr);
BOOLEAN SiS_IsDualEdge(struct SiS_Private *SiS_Pr);
BOOLEAN SiS_IsVAMode(struct SiS_Private *SiS_Pr);
void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex, int checkcrt2mode);
void SiS_SetYPbPr(struct SiS_Private *SiS_Pr);
void SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
void SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
unsigned short RefreshRateTableIndex);
unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr,unsigned short ModeNo,unsigned short ModeIdIndex);
void SiS_DisableBridge(struct SiS_Private *SiS_Pr);
#ifndef SIS_LINUX_KERNEL
void SiS_EnableBridge(struct SiS_Private *SiS_Pr);
#endif
BOOLEAN SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr);
void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr);
void SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempax);
USHORT SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempax);
void SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempax);
USHORT SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempax);
void SiS_SetCH70xxANDOR(SiS_Private *SiS_Pr, USHORT tempax,USHORT tempbh);
void SiS_SetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax);
void SiS_SetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
unsigned short SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short tempax);
#ifndef SIS_LINUX_KERNEL
void SiS_SetCH70xx(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
unsigned short SiS_GetCH70xx(struct SiS_Private *SiS_Pr, unsigned short tempax);
#endif
void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg,
unsigned char orval,unsigned short andval);
#ifdef SIS315H
static void SiS_Chrontel701xOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
static void SiS_Chrontel701xOff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
static void SiS_ChrontelInitTVVSync(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
static void SiS_ChrontelDoSomething1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
void SiS_Chrontel701xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
void SiS_Chrontel701xBLOff(SiS_Private *SiS_Pr);
static void SiS_Chrontel701xOn(struct SiS_Private *SiS_Pr);
static void SiS_Chrontel701xOff(struct SiS_Private *SiS_Pr);
static void SiS_ChrontelInitTVVSync(struct SiS_Private *SiS_Pr);
static void SiS_ChrontelDoSomething1(struct SiS_Private *SiS_Pr);
void SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr);
void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr);
#endif /* 315 */
#ifdef SIS300
#if 0
static void SiS_SetTrumpReg(SiS_Private *SiS_Pr, USHORT tempbx);
static USHORT SiS_GetTrumpReg(SiS_Private *SiS_Pr, USHORT tempbx);
#endif
static BOOLEAN SiS_SetTrumpionBlock(SiS_Private *SiS_Pr, UCHAR *dataptr);
static BOOLEAN SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr);
void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo);
#endif
void SiS_DDC2Delay(SiS_Private *SiS_Pr, USHORT delaytime);
USHORT SiS_ReadDDC1Bit(SiS_Private *SiS_Pr);
USHORT SiS_HandleDDC(SiS_Private *SiS_Pr, ULONG VBFlags, int VGAEngine,
USHORT adaptnum, USHORT DDCdatatype, UCHAR *buffer);
#ifdef LINUX_XF86
USHORT SiS_SenseLCDDDC(SiS_Private *SiS_Pr, SISPtr pSiS);
USHORT SiS_SenseVGA2DDC(SiS_Private *SiS_Pr, SISPtr pSiS);
#endif
void SiS_DDC2Delay(struct SiS_Private *SiS_Pr, unsigned int delaytime);
unsigned short SiS_ReadDDC1Bit(struct SiS_Private *SiS_Pr);
unsigned short SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine,
unsigned short adaptnum, unsigned short DDCdatatype,
unsigned char *buffer, unsigned int VBFlags2);
static void SiS_SetSwitchDDC2(SiS_Private *SiS_Pr);
static USHORT SiS_SetStart(SiS_Private *SiS_Pr);
static USHORT SiS_SetStop(SiS_Private *SiS_Pr);
static USHORT SiS_SetSCLKLow(SiS_Private *SiS_Pr);
static USHORT SiS_SetSCLKHigh(SiS_Private *SiS_Pr);
static USHORT SiS_ReadDDC2Data(SiS_Private *SiS_Pr, USHORT tempax);
static USHORT SiS_WriteDDC2Data(SiS_Private *SiS_Pr, USHORT tempax);
static USHORT SiS_CheckACK(SiS_Private *SiS_Pr);
static USHORT SiS_InitDDCRegs(SiS_Private *SiS_Pr, ULONG VBFlags, int VGAEngine,
USHORT adaptnum, USHORT DDCdatatype, BOOLEAN checkcr32);
static USHORT SiS_WriteDABDDC(SiS_Private *SiS_Pr);
static USHORT SiS_PrepareReadDDC(SiS_Private *SiS_Pr);
static USHORT SiS_PrepareDDC(SiS_Private *SiS_Pr);
static void SiS_SendACK(SiS_Private *SiS_Pr, USHORT yesno);
static USHORT SiS_DoProbeDDC(SiS_Private *SiS_Pr);
static USHORT SiS_ProbeDDC(SiS_Private *SiS_Pr);
static USHORT SiS_ReadDDC(SiS_Private *SiS_Pr, USHORT DDCdatatype, UCHAR *buffer);
#ifdef SIS315H
static void SiS_OEM310Setting(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
USHORT ModeNo,USHORT ModeIdIndex, USHORT RRTI);
static void SiS_OEM661Setting(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
USHORT ModeNo,USHORT ModeIdIndex, USHORT RRTI);
static void SiS_FinalizeLCD(SiS_Private *, USHORT, USHORT, PSIS_HW_INFO);
#ifdef SIS_XORG_XF86
unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags,
int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype,
BOOLEAN checkcr32, unsigned int VBFlags2);
unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr);
unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype,
unsigned char *buffer);
#else
static unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags,
int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype,
BOOLEAN checkcr32, unsigned int VBFlags2);
static unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr);
static unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype,
unsigned char *buffer);
#endif
static void SiS_SetSwitchDDC2(struct SiS_Private *SiS_Pr);
static unsigned short SiS_SetStart(struct SiS_Private *SiS_Pr);
static unsigned short SiS_SetStop(struct SiS_Private *SiS_Pr);
static unsigned short SiS_SetSCLKLow(struct SiS_Private *SiS_Pr);
static unsigned short SiS_SetSCLKHigh(struct SiS_Private *SiS_Pr);
static unsigned short SiS_ReadDDC2Data(struct SiS_Private *SiS_Pr);
static unsigned short SiS_WriteDDC2Data(struct SiS_Private *SiS_Pr, unsigned short tempax);
static unsigned short SiS_CheckACK(struct SiS_Private *SiS_Pr);
static unsigned short SiS_WriteDABDDC(struct SiS_Private *SiS_Pr);
static unsigned short SiS_PrepareReadDDC(struct SiS_Private *SiS_Pr);
static unsigned short SiS_PrepareDDC(struct SiS_Private *SiS_Pr);
static void SiS_SendACK(struct SiS_Private *SiS_Pr, unsigned short yesno);
static unsigned short SiS_DoProbeDDC(struct SiS_Private *SiS_Pr);
#ifdef SIS300
static void SiS_OEM300Setting(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
USHORT ModeNo, USHORT ModeIdIndex, USHORT RefTabindex);
static void SetOEMLCDData2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
USHORT ModeNo, USHORT ModeIdIndex,USHORT RefTableIndex);
static void SiS_OEM300Setting(struct SiS_Private *SiS_Pr,
unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RefTabindex);
static void SetOEMLCDData2(struct SiS_Private *SiS_Pr,
unsigned short ModeNo, unsigned short ModeIdIndex,unsigned short RefTableIndex);
#endif
#ifdef SIS315H
static void SiS_OEM310Setting(struct SiS_Private *SiS_Pr,
unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI);
static void SiS_OEM661Setting(struct SiS_Private *SiS_Pr,
unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI);
static void SiS_FinalizeLCD(struct SiS_Private *, unsigned short, unsigned short);
#endif
extern void SiS_SetReg(SISIOADDRESS, USHORT, USHORT);
extern void SiS_SetRegByte(SISIOADDRESS, USHORT);
extern void SiS_SetRegShort(SISIOADDRESS, USHORT);
extern void SiS_SetRegLong(SISIOADDRESS, ULONG);
extern UCHAR SiS_GetReg(SISIOADDRESS, USHORT);
extern UCHAR SiS_GetRegByte(SISIOADDRESS);
extern USHORT SiS_GetRegShort(SISIOADDRESS);
extern ULONG SiS_GetRegLong(SISIOADDRESS);
extern void SiS_SetRegANDOR(SISIOADDRESS, USHORT, USHORT, USHORT);
extern void SiS_SetRegOR(SISIOADDRESS, USHORT, USHORT);
extern void SiS_SetRegAND(SISIOADDRESS, USHORT, USHORT);
extern void SiS_DisplayOff(SiS_Private *SiS_Pr);
extern void SiS_DisplayOn(SiS_Private *SiS_Pr);
extern BOOLEAN SiS_SearchModeID(SiS_Private *, USHORT *, USHORT *);
extern UCHAR SiS_GetModePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex);
extern USHORT SiS_GetColorDepth(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex);
extern USHORT SiS_GetOffset(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo);
extern void SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_INFO, USHORT ModeNo,
USHORT ModeIdIndex);
extern void SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex);
#ifdef LINUX_XF86
extern void SiS_MakeClockRegs(ScrnInfoPtr pScrn, int clock, UCHAR *p2b, UCHAR *p2c);
extern int SiS_FindPanelFromDB(SISPtr pSiS, USHORT panelvendor, USHORT panelproduct,
int *maxx, int *maxy, int *prefx, int *prefy);
extern void SiS_SetReg(SISIOADDRESS, unsigned short, unsigned short);
extern void SiS_SetRegByte(SISIOADDRESS, unsigned short);
extern void SiS_SetRegShort(SISIOADDRESS, unsigned short);
extern void SiS_SetRegLong(SISIOADDRESS, unsigned int);
extern unsigned char SiS_GetReg(SISIOADDRESS, unsigned short);
extern unsigned char SiS_GetRegByte(SISIOADDRESS);
extern unsigned short SiS_GetRegShort(SISIOADDRESS);
extern unsigned int SiS_GetRegLong(SISIOADDRESS);
extern void SiS_SetRegANDOR(SISIOADDRESS, unsigned short, unsigned short, unsigned short);
extern void SiS_SetRegOR(SISIOADDRESS, unsigned short, unsigned short);
extern void SiS_SetRegAND(SISIOADDRESS, unsigned short, unsigned short);
extern void SiS_DisplayOff(struct SiS_Private *SiS_Pr);
extern void SiS_DisplayOn(struct SiS_Private *SiS_Pr);
extern BOOLEAN SiS_SearchModeID(struct SiS_Private *, unsigned short *, unsigned short *);
extern unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
extern unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
extern unsigned short SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
extern unsigned short SiS_GetOffset(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
unsigned short RefreshRateTableIndex);
extern void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
extern void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
extern void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth);
extern unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
extern unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
#ifdef SIS300
extern void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *tempbx,
unsigned short *tempcl);
extern unsigned short SiS_GetFIFOThresholdB300(unsigned short tempbx, unsigned short tempcl);
extern unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index);
#ifdef SIS_LINUX_KERNEL
extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
extern unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg);
#endif
#endif
#endif

View File

@ -3,7 +3,7 @@
/*
* Global definitions for init.c and init301.c
*
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
@ -53,19 +53,20 @@
#ifndef _INITDEF_
#define _INITDEF_
#define IS_SIS330 (HwInfo->jChipType == SIS_330)
#define IS_SIS550 (HwInfo->jChipType == SIS_550)
#define IS_SIS650 (HwInfo->jChipType == SIS_650) /* All versions, incl 651, M65x */
#define IS_SIS740 (HwInfo->jChipType == SIS_740)
#define IS_SIS330 (SiS_Pr->ChipType == SIS_330)
#define IS_SIS550 (SiS_Pr->ChipType == SIS_550)
#define IS_SIS650 (SiS_Pr->ChipType == SIS_650) /* All versions, incl 651, M65x */
#define IS_SIS740 (SiS_Pr->ChipType == SIS_740)
#define IS_SIS651 (SiS_Pr->SiS_SysFlags & (SF_Is651 | SF_Is652))
#define IS_SISM650 (SiS_Pr->SiS_SysFlags & (SF_IsM650 | SF_IsM652 | SF_IsM653))
#define IS_SIS65x (IS_SIS651 || IS_SISM650) /* Only special versions of 65x */
#define IS_SIS661 (HwInfo->jChipType == SIS_661)
#define IS_SIS741 (HwInfo->jChipType == SIS_741)
#define IS_SIS660 (HwInfo->jChipType == SIS_660)
#define IS_SIS760 (HwInfo->jChipType == SIS_760)
#define IS_SIS661741660760 (IS_SIS661 || IS_SIS741 || IS_SIS660 || IS_SIS760)
#define IS_SIS650740 ((HwInfo->jChipType >= SIS_650) && (HwInfo->jChipType < SIS_330))
#define IS_SIS661 (SiS_Pr->ChipType == SIS_661)
#define IS_SIS741 (SiS_Pr->ChipType == SIS_741)
#define IS_SIS660 (SiS_Pr->ChipType == SIS_660)
#define IS_SIS760 (SiS_Pr->ChipType == SIS_760)
#define IS_SIS761 (SiS_Pr->ChipType == SIS_761)
#define IS_SIS661741660760 (IS_SIS661 || IS_SIS741 || IS_SIS660 || IS_SIS760 || IS_SIS761)
#define IS_SIS650740 ((SiS_Pr->ChipType >= SIS_650) && (SiS_Pr->ChipType < SIS_330))
#define IS_SIS550650740 (IS_SIS550 || IS_SIS650740)
#define IS_SIS650740660 (IS_SIS650 || IS_SIS740 || IS_SIS661741660760)
#define IS_SIS550650740660 (IS_SIS550 || IS_SIS650740660)
@ -73,24 +74,37 @@
#define SISGETROMW(x) (ROMAddr[(x)] | (ROMAddr[(x)+1] << 8))
/* SiS_VBType */
#define VB_SIS301 0x0001
#define VB_SIS301B 0x0002
#define VB_SIS302B 0x0004
#define VB_SIS301LV 0x0008
#define VB_SIS302LV 0x0010
#define VB_SIS301 0x0001
#define VB_SIS301B 0x0002
#define VB_SIS302B 0x0004
#define VB_SIS301LV 0x0008
#define VB_SIS302LV 0x0010
#define VB_SIS302ELV 0x0020
#define VB_SIS301C 0x0040
#define VB_SIS301C 0x0040
#define VB_SIS307T 0x0080
#define VB_SIS307LV 0x0100
#define VB_UMC 0x4000
#define VB_NoLCD 0x8000
#define VB_SIS301BLV302BLV (VB_SIS301B|VB_SIS301C|VB_SIS302B|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
#define VB_SIS301B302B (VB_SIS301B|VB_SIS301C|VB_SIS302B)
#define VB_SIS301LV302LV (VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
#define VB_SISVB (VB_SIS301 | VB_SIS301BLV302BLV)
#define VB_SISTMDS (VB_SIS301 | VB_SIS301B302B)
#define VB_SISLVDS VB_SIS301LV302LV
#define VB_SISLCDA (VB_SIS302B|VB_SIS301C|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
#define VB_SISYPBPR (VB_SIS301C|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
#define VB_SISHIVISION (VB_SIS301|VB_SIS301B|VB_SIS302B)
#define VB_SIS30xB (VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
#define VB_SIS30xC (VB_SIS301C | VB_SIS307T)
#define VB_SISTMDS (VB_SIS301 | VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
#define VB_SISLVDS (VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SIS30xBLV (VB_SIS30xB | VB_SISLVDS)
#define VB_SIS30xCLV (VB_SIS30xC | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISVB (VB_SIS301 | VB_SIS30xBLV)
#define VB_SISLCDA (VB_SIS302B | VB_SIS301C | VB_SIS307T | VB_SISLVDS)
#define VB_SISTMDSLCDA (VB_SIS301C | VB_SIS307T)
#define VB_SISPART4SCALER (VB_SIS301C | VB_SIS307T | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISHIVISION (VB_SIS301 | VB_SIS301B | VB_SIS302B)
#define VB_SISYPBPR (VB_SIS301C | VB_SIS307T | VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISTAP4SCALER (VB_SIS301C | VB_SIS307T | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISPART4OVERFLOW (VB_SIS301C | VB_SIS307T | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISPWD (VB_SIS301C | VB_SIS307T | VB_SISLVDS)
#define VB_SISEMI (VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISPOWER (VB_SIS301C | VB_SIS307T | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISDUALLINK (VB_SIS302LV | VB_SIS302ELV | VB_SIS307T | VB_SIS307LV)
#define VB_SISVGA2 VB_SISTMDS
#define VB_SISRAMDAC202 (VB_SIS301C | VB_SIS307T)
/* VBInfo */
#define SetSimuScanMode 0x0001 /* CR 30 */
@ -160,6 +174,7 @@
#define SupportRAMDAC2_202 0x0400 /* C (<= 202Mhz) */
#define InterlaceMode 0x0080
#define SyncPP 0x0000
#define HaveWideTiming 0x2000 /* Have specific wide- and non-wide timing */
#define SyncPN 0x4000
#define SyncNP 0x8000
#define SyncNN 0xc000
@ -188,6 +203,7 @@
#define TVSetTVSimuMode 0x0200 /* new 0x200, prev. 0x800 */
#define TVRPLLDIV2XO 0x0400 /* prev 0x1000 */
#define TVSetNTSC1024 0x0800 /* new 0x100, prev. 0x2000 */
#define TVSet525p1024 0x1000 /* TW */
#define TVAspect43 0x2000
#define TVAspect169 0x4000
#define TVAspect43LB 0x8000
@ -208,7 +224,8 @@
#define SF_IsM661 0x0020
#define SF_IsM741 0x0040
#define SF_IsM760 0x0080
#define SF_760LFB 0x8000 /* 760: We have LFB */
#define SF_760UMA 0x4000 /* 76x: We have UMA */
#define SF_760LFB 0x8000 /* 76x: We have LFB */
/* CR32 (Newer 630, and 315 series)
@ -228,25 +245,19 @@
#define TVOverScanShift 4
/* CR35 (661 series only)
[0] 1 = PAL, 0 = NTSC
[1] 1 = NTSC-J (if D0 = 0)
[2] 1 = PALM (if D0 = 1)
[3] 1 = PALN (if D0 = 1)
[4] 1 = Overscan (Chrontel only)
[7:5] (only if D2 in CR38 is set)
000 525i
001 525p
000 525i
001 525p
010 750p
011 1080i (or HiVision on 301, 301B)
These bits are being translated to TVMode flag.
*/
/*
CR37
/* CR37
[0] Set 24/18 bit (0/1) RGB to LVDS/TMDS transmitter (set by BIOS)
[3:1] External chip
300 series:
@ -260,7 +271,7 @@
010 LVDS
011 LVDS + Chrontel 7019
660 series [2:1] only:
reserved (now in CR38)
reserved (chip type now in CR38)
All other combinations reserved
[3] 661 only: Pass 1:1 data
[4] LVDS: 0: Panel Link expands / 1: Panel Link does not expand
@ -320,6 +331,7 @@
#define Enable302LV_DualLink 0x04 /* 302LV only; enable dual link */
/* CR39 (661 and later)
D[7] LVDS (SiS or third party)
D[1:0] YPbPr Aspect Ratio
00 4:3 letterbox
01 4:3
@ -341,7 +353,7 @@
0101 Set Contrast event
0110 Set Mute event
0111 Set Volume Up/Down event
[4] Enable Backlight Control by BIOS/driver
[4] Enable Backlight Control by BIOS/driver
(set by driver; set means that the BIOS should
not touch the backlight registers because eg.
the driver already switched off the backlight)
@ -350,6 +362,26 @@
[7] TV UnderScan/OverScan (set by BIOS)
*/
/* CR7C - 661 and later
[7] DualEdge enabled (or: to be enabled)
[6] CRT2 = TV/LCD/VGA enabled (or: to be enabled)
[5] Init done (set at end of SiS_Init)
{4] LVDS LCD capabilities
[3] LVDS LCD capabilities
[2] LVDS LCD capabilities (PWD)
[1] LVDS LCD capabilities (PWD)
[0] LVDS=1, TMDS=0 (SiS or third party)
*/
/* CR7E - 661 and later
VBType:
[7] LVDS (third party)
[3] 301C
[2] 302LV
[1] 301LV
[0] 301B
*/
/* LCDResInfo */
#define Panel300_800x600 0x01 /* CR36 */
#define Panel300_1024x768 0x02
@ -359,7 +391,6 @@
#define Panel300_1024x600 0x06
#define Panel300_1152x768 0x07
#define Panel300_1280x768 0x0a
#define Panel300_320x480 0x0e /* fstn - This is fake, can be any */
#define Panel300_Custom 0x0f
#define Panel300_Barco1366 0x10
@ -374,9 +405,9 @@
#define Panel310_1400x1050 0x09
#define Panel310_1280x768 0x0a
#define Panel310_1600x1200 0x0b
#define Panel310_640x480_2 0x0c
#define Panel310_640x480_3 0x0d
#define Panel310_320x480 0x0e /* fstn - TW: This is fake, can be any */
#define Panel310_320x240_2 0x0c /* xSTN */
#define Panel310_320x240_3 0x0d /* xSTN */
#define Panel310_320x240_1 0x0e /* xSTN - This is fake, can be any */
#define Panel310_Custom 0x0f
#define Panel661_800x600 0x01
@ -386,7 +417,7 @@
#define Panel661_1024x600 0x05
#define Panel661_1152x864 0x06
#define Panel661_1280x960 0x07
#define Panel661_1152x768 0x08
#define Panel661_1280x854 0x08
#define Panel661_1400x1050 0x09
#define Panel661_1280x768 0x0a
#define Panel661_1600x1200 0x0b
@ -410,14 +441,16 @@
#define Panel_1680x1050 0x0d /* 661etc */
#define Panel_1280x720 0x0e /* 661etc */
#define Panel_Custom 0x0f /* MUST BE 0x0f (for DVI DDC detection) */
#define Panel_320x480 0x10 /* SiS 550 fstn - TW: This is fake, can be any */
#define Panel_320x240_1 0x10 /* SiS 550 xSTN */
#define Panel_Barco1366 0x11
#define Panel_848x480 0x12
#define Panel_640x480_2 0x13 /* SiS 550 */
#define Panel_640x480_3 0x14 /* SiS 550 */
#define Panel_320x240_2 0x13 /* SiS 550 xSTN */
#define Panel_320x240_3 0x14 /* SiS 550 xSTN */
#define Panel_1280x768_2 0x15 /* 30xLV */
#define Panel_1280x768_3 0x16 /* (unused) */
#define Panel_1280x800_2 0x17 /* 30xLV */
#define Panel_856x480 0x18
#define Panel_1280x854 0x19 /* 661etc */
/* Index in ModeResInfo table */
#define SIS_RI_320x200 0
@ -454,6 +487,7 @@
#define SIS_RI_1920x1080 31
#define SIS_RI_960x540 32
#define SIS_RI_960x600 33
#define SIS_RI_1280x854 34
/* CR5F */
#define IsM650 0x80
@ -482,16 +516,18 @@
#define VCLK100_300 0x43 /* Index in VCLKData table (300) */
#define VCLK34_300 0x3d /* Index in VCLKData table (300) */
#define VCLK_CUSTOM_300 0x47
#define VCLK65_315 0x0b /* Index in (VB)VCLKData table (315) */
#define VCLK108_2_315 0x19 /* Index in (VB)VCLKData table (315) */
#define VCLK81_315 0x5b /* Index in (VB)VCLKData table (315) */
#define VCLK162_315 0x5e /* Index in (VB)VCLKData table (315) */
#define VCLK108_3_315 0x45 /* Index in VBVCLKData table (315) */
#define VCLK100_315 0x46 /* Index in VBVCLKData table (315) */
#define VCLK65_315 0x0b /* Indices in (VB)VCLKData table (315) */
#define VCLK108_2_315 0x19
#define VCLK81_315 0x5b
#define VCLK162_315 0x5e
#define VCLK108_3_315 0x45
#define VCLK100_315 0x46
#define VCLK34_315 0x55
#define VCLK68_315 0x0d
#define VCLK_1280x800_315_2 0x5c /* Index in VBVCLKData table (315) */
#define VCLK121_315 0x5d /* Index in VBVCLKData table (315) */
#define VCLK_1280x800_315_2 0x5c
#define VCLK121_315 0x5d
#define VCLK130_315 0x72
#define VCLK_1280x720 0x5f
#define VCLK_1280x768_2 0x60
#define VCLK_1280x768_3 0x61 /* (unused?) */
@ -507,6 +543,7 @@
#define VCLK_1152x864 0x64
#define VCLK_1360x768 0x58
#define VCLK_1280x800_315 0x6c
#define VCLK_1280x854 0x76
#define TVCLKBASE_300 0x21 /* Indices on TV clocks in VCLKData table (300) */
#define TVCLKBASE_315 0x3a /* Indices on TV clocks in (VB)VCLKData table (315) */

View File

@ -0,0 +1,238 @@
/*
* SiS 300/540/630[S]/730[S]
* SiS 315[E|PRO]/550/[M]65x/[M]66x[F|M|G]X/[M]74x[GX]/330/[M]76x[GX]
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
*
* Linux kernel specific extensions to init.c/init301.c
*
* Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the named License,
* or any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>
*/
#include "osdef.h"
#include "initdef.h"
#include "vgatypes.h"
#include "vstruct.h"
#include <linux/config.h>
#include <linux/version.h>
#include <linux/types.h>
#include <linux/fb.h>
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
unsigned char modeno, unsigned char rateindex);
int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
unsigned char rateindex, struct fb_var_screeninfo *var);
#endif
BOOLEAN sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
int *htotal, int *vtotal, unsigned char rateindex);
extern BOOLEAN SiSInitPtr(struct SiS_Private *SiS_Pr);
extern BOOLEAN SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
unsigned short *ModeIdIndex);
extern void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata,
int xres, int yres, struct fb_var_screeninfo *var, BOOLEAN writeres);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
int
sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, unsigned char modeno,
unsigned char rateindex)
{
unsigned short ModeNo = modeno;
unsigned short ModeIdIndex = 0, ClockIndex = 0;
unsigned short RRTI = 0;
int Clock;
if(!SiSInitPtr(SiS_Pr)) return 65000;
if(rateindex > 0) rateindex--;
#ifdef SIS315H
switch(ModeNo) {
case 0x5a: ModeNo = 0x50; break;
case 0x5b: ModeNo = 0x56;
}
#endif
if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) {;
printk(KERN_ERR "Could not find mode %x\n", ModeNo);
return 65000;
}
RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
if(SiS_Pr->SiS_UseWide == 1) {
/* Wide screen: Ignore rateindex */
ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK_WIDE;
} else {
RRTI += rateindex;
ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK_NORM;
}
} else {
RRTI += rateindex;
ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK;
}
Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000;
return Clock;
}
int
sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
unsigned char rateindex, struct fb_var_screeninfo *var)
{
unsigned short ModeNo = modeno;
unsigned short ModeIdIndex = 0, index = 0, RRTI = 0;
int j;
if(!SiSInitPtr(SiS_Pr)) return 0;
if(rateindex > 0) rateindex--;
#ifdef SIS315H
switch(ModeNo) {
case 0x5a: ModeNo = 0x50; break;
case 0x5b: ModeNo = 0x56;
}
#endif
if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return 0;
RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
if(SiS_Pr->SiS_UseWide == 1) {
/* Wide screen: Ignore rateindex */
index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_WIDE;
} else {
RRTI += rateindex;
index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_NORM;
}
} else {
RRTI += rateindex;
index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC;
}
SiS_Generic_ConvertCRData(SiS_Pr,
(unsigned char *)&SiS_Pr->SiS_CRT1Table[index].CR[0],
SiS_Pr->SiS_RefIndex[RRTI].XRes,
SiS_Pr->SiS_RefIndex[RRTI].YRes,
var, FALSE);
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x8000)
var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
else
var->sync |= FB_SYNC_VERT_HIGH_ACT;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x4000)
var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
else
var->sync |= FB_SYNC_HOR_HIGH_ACT;
var->vmode = FB_VMODE_NONINTERLACED;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x0080)
var->vmode = FB_VMODE_INTERLACED;
else {
j = 0;
while(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
SiS_Pr->SiS_RefIndex[RRTI].ModeID) {
if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
var->vmode = FB_VMODE_DOUBLE;
}
break;
}
j++;
}
}
if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
#if 0 /* Do this? */
var->upper_margin <<= 1;
var->lower_margin <<= 1;
var->vsync_len <<= 1;
#endif
} else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
var->upper_margin >>= 1;
var->lower_margin >>= 1;
var->vsync_len >>= 1;
}
return 1;
}
#endif /* Linux >= 2.5 */
BOOLEAN
sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *htotal,
int *vtotal, unsigned char rateindex)
{
unsigned short ModeNo = modeno;
unsigned short ModeIdIndex = 0, CRT1Index = 0;
unsigned short RRTI = 0;
unsigned char sr_data, cr_data, cr_data2;
if(!SiSInitPtr(SiS_Pr)) return FALSE;
if(rateindex > 0) rateindex--;
#ifdef SIS315H
switch(ModeNo) {
case 0x5a: ModeNo = 0x50; break;
case 0x5b: ModeNo = 0x56;
}
#endif
if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
if(SiS_Pr->SiS_UseWide == 1) {
/* Wide screen: Ignore rateindex */
CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_WIDE;
} else {
RRTI += rateindex;
CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_NORM;
}
} else {
RRTI += rateindex;
CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC;
}
sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
*htotal = (((cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8)) + 5) * 8;
sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
*vtotal = ((cr_data & 0xFF) |
((unsigned short)(cr_data2 & 0x01) << 8) |
((unsigned short)(cr_data2 & 0x20) << 4) |
((unsigned short)(sr_data & 0x01) << 10)) + 2;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & InterlaceMode)
*vtotal *= 2;
return TRUE;
}

View File

@ -3,7 +3,7 @@
/*
* OEM Data for 300 series
*
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
@ -50,7 +50,7 @@
*
*/
static const UCHAR SiS300_OEMTVDelay301[8][4] =
static const unsigned char SiS300_OEMTVDelay301[8][4] =
{
{0x08,0x08,0x08,0x08},
{0x08,0x08,0x08,0x08},
@ -62,7 +62,7 @@ static const UCHAR SiS300_OEMTVDelay301[8][4] =
{0x20,0x20,0x20,0x20}
};
static const UCHAR SiS300_OEMTVDelayLVDS[8][4] =
static const unsigned char SiS300_OEMTVDelayLVDS[8][4] =
{
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
@ -74,7 +74,7 @@ static const UCHAR SiS300_OEMTVDelayLVDS[8][4] =
{0x20,0x20,0x20,0x20}
};
static const UCHAR SiS300_OEMTVFlicker[8][4] =
static const unsigned char SiS300_OEMTVFlicker[8][4] =
{
{0x00,0x00,0x00,0x00},
{0x00,0x00,0x00,0x00},
@ -86,25 +86,7 @@ static const UCHAR SiS300_OEMTVFlicker[8][4] =
{0x00,0x00,0x00,0x00}
};
#if 0 /* TW: Not used */
static const UCHAR SiS300_OEMLCDDelay1[12][4]={
{0x2c,0x2c,0x2c,0x2c},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x2c,0x2c,0x2c,0x2c},
{0x2c,0x2c,0x2c,0x2c},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x24,0x24,0x24,0x24},
{0x24,0x24,0x24,0x24},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x24,0x24,0x24,0x24}
};
#endif
/* From 630/301B BIOS */
static const UCHAR SiS300_OEMLCDDelay2[64][4] = /* for 301/301b/302b/301LV/302LV */
static const unsigned char SiS300_OEMLCDDelay2[64][4] = /* for 301/301b/302b/301LV/302LV */
{
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
@ -172,8 +154,7 @@ static const UCHAR SiS300_OEMLCDDelay2[64][4] = /* for 301/301b/302b/301LV/302
{0x20,0x20,0x20,0x20}
};
/* From 300/301LV BIOS */
static const UCHAR SiS300_OEMLCDDelay4[12][4] =
static const unsigned char SiS300_OEMLCDDelay4[12][4] =
{
{0x2c,0x2c,0x2c,0x2c},
{0x20,0x20,0x20,0x20},
@ -189,8 +170,7 @@ static const UCHAR SiS300_OEMLCDDelay4[12][4] =
{0x24,0x24,0x24,0x24}
};
/* From 300/301LV BIOS */
static const UCHAR SiS300_OEMLCDDelay5[32][4] =
static const unsigned char SiS300_OEMLCDDelay5[32][4] =
{
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
@ -226,8 +206,8 @@ static const UCHAR SiS300_OEMLCDDelay5[32][4] =
{0x20,0x20,0x20,0x20},
};
/* Added for LVDS */
static const UCHAR SiS300_OEMLCDDelay3[64][4] = { /* For LVDS */
static const unsigned char SiS300_OEMLCDDelay3[64][4] = /* For LVDS */
{
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
@ -294,7 +274,7 @@ static const UCHAR SiS300_OEMLCDDelay3[64][4] = { /* For LVDS */
{0x20,0x20,0x20,0x20}
};
static const UCHAR SiS300_Phase1[8][5][4] =
static const unsigned char SiS300_Phase1[8][5][4] =
{
{
{0x21,0xed,0x00,0x08},
@ -354,11 +334,10 @@ static const UCHAR SiS300_Phase1[8][5][4] =
}
};
static const UCHAR SiS300_Phase2[8][5][4] =
static const unsigned char SiS300_Phase2[8][5][4] =
{
{
{0x21,0xed,0x00,0x08},
{0x21,0xed,0x00,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
@ -372,42 +351,42 @@ static const UCHAR SiS300_Phase2[8][5][4] =
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x21,0xed,0x00,0x08},
{0x21,0xed,0x00,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
@ -415,7 +394,7 @@ static const UCHAR SiS300_Phase2[8][5][4] =
}
};
static const UCHAR SiS300_Filter1[10][16][4] =
static const unsigned char SiS300_Filter1[10][16][4] =
{
{
{0x00,0xf4,0x10,0x38},
@ -599,7 +578,7 @@ static const UCHAR SiS300_Filter1[10][16][4] =
},
};
static const UCHAR SiS300_Filter2[10][9][7] =
static const unsigned char SiS300_Filter2[10][9][7] =
{
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
@ -714,142 +693,144 @@ static const UCHAR SiS300_Filter2[10][9][7] =
};
/* Custom data for Barco iQ Pro R300 */
static const UCHAR barco_p1[2][9][7][3] = {
{
{ { 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x1e, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x16, 0x00 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 },
{ 0, 0, 0 }
},
{
{ 0, 0, 0 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x1e, 0x00 },
{ 0, 0, 0 }
},
{
{ 0x16, 0xd1, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x11, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x26, 0x00 }
},
{
{ 0x16, 0xd1, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x30, 0x00 },
{ 0, 0, 0 }
},
{
{ 0x16, 0x00, 0x00 },
{ 0x17, 0xa0, 0x00 },
{ 0x1a, 0xa0, 0x00 },
{ 0x1b, 0x2a, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0, 0, 0 }
},
{
{ 0x16, 0x00, 0x00 },
{ 0x17, 0xaa, 0x00 },
{ 0x1a, 0xa0, 0x00 },
{ 0x1b, 0x2a, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0, 0, 0 }
}
},
{
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 }
},
{
{ 0, 0, 0 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 },
},
{
{ 0, 0, 0 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x1e, 0x00 }
},
{
{ 0x16, 0xd1, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe6, 0x00 },
{ 0x1b, 0x11, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x26, 0x00 }
},
{
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe0, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x30, 0x00 },
{ 0, 0, 0 }
},
{
{ 0, 0, 0 }
},
{
{ 0, 0, 0 }
}
}
static const unsigned char barco_p1[2][9][7][3] =
{
{
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x1e, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x16, 0x00 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 },
{ 0, 0, 0 }
},
{
{ 0, 0, 0 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x1e, 0x00 },
{ 0, 0, 0 }
},
{
{ 0x16, 0xd1, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x11, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x26, 0x00 }
},
{
{ 0x16, 0xd1, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x30, 0x00 },
{ 0, 0, 0 }
},
{
{ 0x16, 0x00, 0x00 },
{ 0x17, 0xa0, 0x00 },
{ 0x1a, 0xa0, 0x00 },
{ 0x1b, 0x2a, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0, 0, 0 }
},
{
{ 0x16, 0x00, 0x00 },
{ 0x17, 0xaa, 0x00 },
{ 0x1a, 0xa0, 0x00 },
{ 0x1b, 0x2a, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0, 0, 0 }
}
},
{
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 }
},
{
{ 0, 0, 0 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 },
},
{
{ 0, 0, 0 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x1e, 0x00 }
},
{
{ 0x16, 0xd1, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe6, 0x00 },
{ 0x1b, 0x11, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x26, 0x00 }
},
{
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe0, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x30, 0x00 },
{ 0, 0, 0 }
},
{
{ 0, 0, 0 }
},
{
{ 0, 0, 0 }
}
}
};

View File

@ -1,9 +1,9 @@
/* $XFree86$ */
/* $XdotOrg$ */
/*
* OEM Data for 315/330 series
* OEM Data for 315/330/340 series
*
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
@ -50,206 +50,206 @@
*
*/
static const UCHAR SiS310_LCDDelayCompensation_301[] = /* 301 */
static const unsigned char SiS310_LCDDelayCompensation_301[] = /* 301 */
{
0x00,0x00,0x00, /* 800x600 */
0x0b,0x0b,0x0b, /* 1024x768 */
0x08,0x08,0x08, /* 1280x1024 */
0x00,0x00,0x00, /* 640x480 (unknown) */
0x00,0x00,0x00, /* 1024x600 (unknown) */
0x00,0x00,0x00, /* 1152x864 (unknown) */
0x08,0x08,0x08, /* 1280x960 (guessed) */
0x00,0x00,0x00, /* 1152x768 (unknown) */
0x08,0x08,0x08, /* 1400x1050 */
0x08,0x08,0x08, /* 1280x768 (guessed) */
0x00,0x00,0x00, /* 1600x1200 */
0x00,0x00,0x00, /* 320x480 (unknown) */
0x00,0x00,0x00,
0x00,0x00,0x00,
0x00,0x00,0x00
0x00,0x00,0x00, /* 800x600 */
0x0b,0x0b,0x0b, /* 1024x768 */
0x08,0x08,0x08, /* 1280x1024 */
0x00,0x00,0x00, /* 640x480 (unknown) */
0x00,0x00,0x00, /* 1024x600 (unknown) */
0x00,0x00,0x00, /* 1152x864 (unknown) */
0x08,0x08,0x08, /* 1280x960 (guessed) */
0x00,0x00,0x00, /* 1152x768 (unknown) */
0x08,0x08,0x08, /* 1400x1050 */
0x08,0x08,0x08, /* 1280x768 (guessed) */
0x00,0x00,0x00, /* 1600x1200 */
0x00,0x00,0x00, /* 320x480 (unknown) */
0x00,0x00,0x00,
0x00,0x00,0x00,
0x00,0x00,0x00
};
/* This is contained in 650+301B BIOSes, but it is wrong - so we don't use it */
static const UCHAR SiS310_LCDDelayCompensation_650301LV[] = /* 650 + 30xLV */
static const unsigned char SiS310_LCDDelayCompensation_650301LV[] = /* 650 + 30xLV */
{
0x01,0x01,0x01, /* 800x600 */
0x01,0x01,0x01, /* 1024x768 */
0x01,0x01,0x01, /* 1280x1024 */
0x01,0x01,0x01, /* 640x480 (unknown) */
0x01,0x01,0x01, /* 1024x600 (unknown) */
0x01,0x01,0x01, /* 1152x864 (unknown) */
0x01,0x01,0x01, /* 1280x960 (guessed) */
0x01,0x01,0x01, /* 1152x768 (unknown) */
0x01,0x01,0x01, /* 1400x1050 */
0x01,0x01,0x01, /* 1280x768 (guessed) */
0x01,0x01,0x01, /* 1600x1200 */
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02
0x01,0x01,0x01, /* 800x600 */
0x01,0x01,0x01, /* 1024x768 */
0x01,0x01,0x01, /* 1280x1024 */
0x01,0x01,0x01, /* 640x480 (unknown) */
0x01,0x01,0x01, /* 1024x600 (unknown) */
0x01,0x01,0x01, /* 1152x864 (unknown) */
0x01,0x01,0x01, /* 1280x960 (guessed) */
0x01,0x01,0x01, /* 1152x768 (unknown) */
0x01,0x01,0x01, /* 1400x1050 */
0x01,0x01,0x01, /* 1280x768 (guessed) */
0x01,0x01,0x01, /* 1600x1200 */
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02
};
static const UCHAR SiS310_LCDDelayCompensation_651301LV[] = /* M650/651 301LV */
static const unsigned char SiS310_LCDDelayCompensation_651301LV[] = /* M650/651 301LV */
{
0x33,0x33,0x33, /* 800x600 (guessed) - new: PanelType, not PanelRes ! */
0x33,0x33,0x33, /* 1024x768 */
0x33,0x33,0x33, /* 1280x1024 */
0x33,0x33,0x33, /* 640x480 (unknown) */
0x33,0x33,0x33, /* 1024x600 (unknown) */
0x33,0x33,0x33, /* 1152x864 (unknown) */
0x33,0x33,0x33, /* 1280x960 (guessed) */
0x33,0x33,0x33, /* 1152x768 (unknown) */
0x33,0x33,0x33, /* 1400x1050 */
0x33,0x33,0x33, /* 1280x768 (guessed) */
0x33,0x33,0x33, /* 1600x1200 */
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33
0x33,0x33,0x33, /* 800x600 (guessed) - new: PanelType, not PanelRes ! */
0x33,0x33,0x33, /* 1024x768 */
0x33,0x33,0x33, /* 1280x1024 */
0x33,0x33,0x33, /* 640x480 (unknown) */
0x33,0x33,0x33, /* 1024x600 (unknown) */
0x33,0x33,0x33, /* 1152x864 (unknown) */
0x33,0x33,0x33, /* 1280x960 (guessed) */
0x33,0x33,0x33, /* 1152x768 (unknown) */
0x33,0x33,0x33, /* 1400x1050 */
0x33,0x33,0x33, /* 1280x768 (guessed) */
0x33,0x33,0x33, /* 1600x1200 */
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33
};
static const UCHAR SiS310_LCDDelayCompensation_651302LV[] = /* M650/651 302LV */
static const unsigned char SiS310_LCDDelayCompensation_651302LV[] = /* M650/651 302LV */
{
0x33,0x33,0x33, /* 800x600 (guessed) */
0x33,0x33,0x33, /* 1024x768 */
0x33,0x33,0x33, /* 1280x1024 */
0x33,0x33,0x33, /* 640x480 (unknown) */
0x33,0x33,0x33, /* 1024x600 (unknown) */
0x33,0x33,0x33, /* 1152x864 (unknown) */
0x33,0x33,0x33, /* 1280x960 (guessed) */
0x33,0x33,0x33, /* 1152x768 (unknown) */
0x33,0x33,0x33, /* 1400x1050 */
0x33,0x33,0x33, /* 1280x768 (guessed) */
0x33,0x33,0x33, /* 1600x1200 */
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33
0x33,0x33,0x33, /* 800x600 (guessed) */
0x33,0x33,0x33, /* 1024x768 */
0x33,0x33,0x33, /* 1280x1024 */
0x33,0x33,0x33, /* 640x480 (unknown) */
0x33,0x33,0x33, /* 1024x600 (unknown) */
0x33,0x33,0x33, /* 1152x864 (unknown) */
0x33,0x33,0x33, /* 1280x960 (guessed) */
0x33,0x33,0x33, /* 1152x768 (unknown) */
0x33,0x33,0x33, /* 1400x1050 */
0x33,0x33,0x33, /* 1280x768 (guessed) */
0x33,0x33,0x33, /* 1600x1200 */
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33
};
static const UCHAR SiS310_LCDDelayCompensation_3xx301B[] = /* 30xB */
static const unsigned char SiS310_LCDDelayCompensation_3xx301B[] = /* 30xB */
{
0x01,0x01,0x01, /* 800x600 */
0x0C,0x0C,0x0C, /* 1024x768 */
0x0C,0x0C,0x0C, /* 1280x1024 */
0x08,0x08,0x08, /* 640x480 */
0x0C,0x0C,0x0C, /* 1024x600 (guessed) */
0x0C,0x0C,0x0C, /* 1152x864 (guessed) */
0x0C,0x0C,0x0C, /* 1280x960 (guessed) */
0x0C,0x0C,0x0C, /* 1152x768 (guessed) */
0x0C,0x0C,0x0C, /* 1400x1050 (guessed) */
0x0C,0x0C,0x0C, /* 1280x768 (guessed) */
0x0C,0x0C,0x0C, /* 1600x1200 (guessed) */
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02
0x01,0x01,0x01, /* 800x600 */
0x0C,0x0C,0x0C, /* 1024x768 */
0x0C,0x0C,0x0C, /* 1280x1024 */
0x08,0x08,0x08, /* 640x480 */
0x0C,0x0C,0x0C, /* 1024x600 (guessed) */
0x0C,0x0C,0x0C, /* 1152x864 (guessed) */
0x0C,0x0C,0x0C, /* 1280x960 (guessed) */
0x0C,0x0C,0x0C, /* 1152x768 (guessed) */
0x0C,0x0C,0x0C, /* 1400x1050 (guessed) */
0x0C,0x0C,0x0C, /* 1280x768 (guessed) */
0x0C,0x0C,0x0C, /* 1600x1200 (guessed) */
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02
};
static const UCHAR SiS310_LCDDelayCompensation_3xx301LV[] = /* 315+30xLV */
static const unsigned char SiS310_LCDDelayCompensation_3xx301LV[] = /* 315+30xLV */
{
0x01,0x01,0x01, /* 800x600 */
0x04,0x04,0x04, /* 1024x768 (A531/BIOS 1.14.05f: 4 - works with 6 */
0x0C,0x0C,0x0C, /* 1280x1024 */
0x08,0x08,0x08, /* 640x480 */
0x0C,0x0C,0x0C, /* 1024x600 (guessed) */
0x0C,0x0C,0x0C, /* 1152x864 (guessed) */
0x0C,0x0C,0x0C, /* 1280x960 (guessed) */
0x0C,0x0C,0x0C, /* 1152x768 (guessed) */
0x0C,0x0C,0x0C, /* 1400x1050 (guessed) */
0x0C,0x0C,0x0C, /* 1280x768 (guessed) */
0x0C,0x0C,0x0C, /* 1600x1200 (guessed) */
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02
0x01,0x01,0x01, /* 800x600 */
0x04,0x04,0x04, /* 1024x768 (A531/BIOS 1.14.05f: 4 - works with 6 */
0x0C,0x0C,0x0C, /* 1280x1024 */
0x08,0x08,0x08, /* 640x480 */
0x0C,0x0C,0x0C, /* 1024x600 (guessed) */
0x0C,0x0C,0x0C, /* 1152x864 (guessed) */
0x0C,0x0C,0x0C, /* 1280x960 (guessed) */
0x0C,0x0C,0x0C, /* 1152x768 (guessed) */
0x0C,0x0C,0x0C, /* 1400x1050 (guessed) */
0x0C,0x0C,0x0C, /* 1280x768 (guessed) */
0x0C,0x0C,0x0C, /* 1600x1200 (guessed) */
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02
};
static const UCHAR SiS310_TVDelayCompensation_301[] = /* 301 */
static const unsigned char SiS310_TVDelayCompensation_301[] = /* 301 */
{
0x02,0x02, /* NTSC Enhanced, Standard */
0x02,0x02, /* PAL */
0x08,0x0b /* HiVision */
0x02,0x02, /* NTSC Enhanced, Standard */
0x02,0x02, /* PAL */
0x08,0x0b /* HiVision */
};
static const UCHAR SiS310_TVDelayCompensation_301B[] = /* 30xB, 30xLV */
static const unsigned char SiS310_TVDelayCompensation_301B[] = /* 30xB, 30xLV */
{
0x03,0x03,
0x03,0x03,
0x03,0x03
0x03,0x03,
0x03,0x03,
0x03,0x03
};
static const UCHAR SiS310_TVDelayCompensation_740301B[] = /* 740 + 30xB (30xLV?) */
static const unsigned char SiS310_TVDelayCompensation_740301B[] = /* 740 + 30xB (30xLV?) */
{
0x05,0x05,
0x05,0x05,
0x05,0x05
0x05,0x05,
0x05,0x05,
0x05,0x05
};
static const UCHAR SiS310_TVDelayCompensation_651301LV[] = /* M650, 651, 301LV */
static const unsigned char SiS310_TVDelayCompensation_651301LV[] = /* M650, 651, 301LV */
{
0x33,0x33,
0x33,0x33,
0x33,0x33
0x33,0x33,
0x33,0x33,
0x33,0x33
};
static const UCHAR SiS310_TVDelayCompensation_651302LV[] = /* M650, 651, 302LV */
static const unsigned char SiS310_TVDelayCompensation_651302LV[] = /* M650, 651, 302LV */
{
0x33,0x33,
0x33,0x33,
0x33,0x33
0x33,0x33,
0x33,0x33,
0x33,0x33
};
static const UCHAR SiS_TVDelay661_301[] = /* 661, 301 */
static const unsigned char SiS_TVDelay661_301[] = /* 661, 301 */
{
0x44,0x44,
0x44,0x44,
0x00,0x00,
0x44,0x44,
0x44,0x44,
0x44,0x44
0x44,0x44,
0x44,0x44,
0x00,0x00,
0x44,0x44,
0x44,0x44,
0x44,0x44
};
static const UCHAR SiS_TVDelay661_301B[] = /* 661, 301B et al */
static const unsigned char SiS_TVDelay661_301B[] = /* 661, 301B et al */
{
0x44,0x44,
0x44,0x44,
0x00,0x00,
0x44,0x44,
0x44,0x44,
0x44,0x44
0x44,0x44,
0x44,0x44,
0x00,0x00,
0x44,0x44,
0x44,0x44,
0x44,0x44
};
static const UCHAR SiS310_TVDelayCompensation_LVDS[] = /* LVDS */
static const unsigned char SiS310_TVDelayCompensation_LVDS[] = /* LVDS */
{
0x0a,0x0a,
0x0a,0x0a,
0x0a,0x0a
0x0a,0x0a,
0x0a,0x0a,
0x0a,0x0a
};
static const UCHAR SiS310_TVAntiFlick1[6][2] =
static const unsigned char SiS310_TVAntiFlick1[6][2] =
{
{0x4,0x0},
{0x4,0x8},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0}
{0x4,0x0},
{0x4,0x8},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0}
};
static const UCHAR SiS310_TVEdge1[6][2] =
static const unsigned char SiS310_TVEdge1[6][2] =
{
{0x0,0x4},
{0x0,0x4},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0}
{0x0,0x4},
{0x0,0x4},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0}
};
static const UCHAR SiS310_TVYFilter1[5][8][4] =
static const unsigned char SiS310_TVYFilter1[5][8][4] =
{
{
{
{0x00,0xf4,0x10,0x38}, /* NTSC */
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
@ -258,8 +258,8 @@ static const UCHAR SiS310_TVYFilter1[5][8][4] =
{0xeb,0x04,0x25,0x18},
{0xee,0x0c,0x22,0x08},
{0xeb,0x15,0x25,0xf6}
},
{
},
{
{0x00,0xf4,0x10,0x38}, /* PAL */
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x1f,0x32},
@ -268,8 +268,8 @@ static const UCHAR SiS310_TVYFilter1[5][8][4] =
{0xf1,0xf7,0x1f,0x32},
{0xf3,0x00,0x1d,0x20},
{0xfc,0xfb,0x14,0x2a}
},
{
},
{
{0x00,0x00,0x00,0x00}, /* HiVision */
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
@ -278,9 +278,9 @@ static const UCHAR SiS310_TVYFilter1[5][8][4] =
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
{0xee,0x0c,0x22,0x08}
},
{
{0x00,0xf4,0x10,0x38}, /* PAL-M */
},
{
{0x00,0xf4,0x10,0x38}, /* PAL-M */
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x10,0x18},
{0xf7,0x06,0x19,0x14},
@ -288,9 +288,9 @@ static const UCHAR SiS310_TVYFilter1[5][8][4] =
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x15,0x25,0xf6}
},
{
{0x00,0xf4,0x10,0x38}, /* PAL-N */
},
{
{0x00,0xf4,0x10,0x38}, /* PAL-N */
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x10,0x18},
{0xf7,0x06,0x19,0x14},
@ -298,12 +298,12 @@ static const UCHAR SiS310_TVYFilter1[5][8][4] =
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x15,0x25,0xf6}
}
}
};
static const UCHAR SiS310_TVYFilter2[5][9][7] =
static const unsigned char SiS310_TVYFilter2[5][9][7] =
{
{
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* NTSC */
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
@ -313,8 +313,8 @@ static const UCHAR SiS310_TVYFilter2[5][9][7] =
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL */
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
@ -324,8 +324,8 @@ static const UCHAR SiS310_TVYFilter2[5][9][7] =
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
},
{
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}, /* HiVision */
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
@ -335,9 +335,9 @@ static const UCHAR SiS310_TVYFilter2[5][9][7] =
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL-M */
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL-M */
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
@ -346,9 +346,9 @@ static const UCHAR SiS310_TVYFilter2[5][9][7] =
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL-N */
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL-N */
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
@ -357,58 +357,39 @@ static const UCHAR SiS310_TVYFilter2[5][9][7] =
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
}
}
};
static const UCHAR SiS310_TVPhaseIncr1[3][2][4] =
static const unsigned char SiS310_TVPhaseIncr1[3][2][4] =
{
{
{
{0x21,0xed,0xba,0x08},
{0x21,0xed,0xba,0x08}
},
{
},
{
{0x2a,0x05,0xe3,0x00},
{0x2a,0x05,0xe3,0x00}
},
{
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
}
}
};
static const UCHAR SiS310_TVPhaseIncr2[3][2][4] =
static const unsigned char SiS310_TVPhaseIncr2[3][2][4] =
{
{
{
{0x21,0xf0,0x7b,0xd6},
{0x21,0xf0,0x7b,0xd6}
},
{
},
{
{0x2a,0x0a,0x41,0xe9},
{0x2a,0x0a,0x41,0xe9}
},
{
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
}
};
static const UCHAR SiS661_TVPhase[] = {
0x21,0xED,0xBA,0x08,
0x2A,0x05,0xE3,0x00,
0x21,0xE4,0x2E,0x9B,
0x21,0xF4,0x3E,0xBA,
0x1E,0x8B,0xA2,0xA7,
0x1E,0x83,0x0A,0xE0,
0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,
0x21,0xF0,0x7B,0xD6,
0x2A,0x09,0x86,0xE9,
0x21,0xE6,0xEF,0xA4,
0x21,0xF6,0x94,0x46,
0x1E,0x8B,0xA2,0xA7,
0x1E,0x83,0x0A,0xE0,
0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00
}
};
/**************************************************************/
@ -417,7 +398,7 @@ static const UCHAR SiS661_TVPhase[] = {
/* Inventec / Compaq Presario 3045US, 3017 */
static const SiS_LCDDataStruct SiS310_ExtCompaq1280x1024Data[] =
static const struct SiS_LCDData SiS310_ExtCompaq1280x1024Data[] =
{
{ 211, 60,1024, 501,1688,1066},
{ 211, 60,1024, 508,1688,1066},
@ -431,17 +412,17 @@ static const SiS_LCDDataStruct SiS310_ExtCompaq1280x1024Data[] =
/* Asus A2xxxH _2 */
static const SiS_Part2PortTblStruct SiS310_CRT2Part2_Asus1024x768_3[] =
static const struct SiS_Part2PortTbl SiS310_CRT2Part2_Asus1024x768_3[] =
{
{{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x2c,0x13,0x9a,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{{0x38,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x38,0x13,0x16,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
{{0x36,0x13,0x13,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
{{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}
{{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x2c,0x13,0x9a,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{{0x38,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x38,0x13,0x16,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
{{0x36,0x13,0x13,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
{{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}
};

View File

@ -3,7 +3,7 @@
/*
* OS depending defines
*
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
@ -55,8 +55,11 @@
#define _SIS_OSDEF_H_
/* The choices are: */
#define LINUX_KERNEL /* Linux kernel framebuffer */
/* #define LINUX_XF86 */ /* XFree86/X.org */
#define SIS_LINUX_KERNEL /* Linux kernel framebuffer */
#undef SIS_XORG_XF86 /* XFree86/X.org */
#undef SIS_LINUX_KERNEL_24
#undef SIS_LINUX_KERNEL_26
#ifdef OutPortByte
#undef OutPortByte
@ -86,8 +89,9 @@
/* LINUX KERNEL */
/**********************************************************************/
#ifdef LINUX_KERNEL
#ifdef SIS_LINUX_KERNEL
#include <linux/config.h>
#include <linux/version.h>
#ifdef CONFIG_FB_SIS_300
#define SIS300
@ -97,6 +101,12 @@
#define SIS315H
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
#define SIS_LINUX_KERNEL_26
#else
#define SIS_LINUX_KERNEL_24
#endif
#if !defined(SIS300) && !defined(SIS315H)
#warning Neither CONFIG_FB_SIS_300 nor CONFIG_FB_SIS_315 is set
#warning sisfb will not work!
@ -109,13 +119,15 @@
#define InPortWord(p) inw((SISIOADDRESS)(p))
#define InPortLong(p) inl((SISIOADDRESS)(p))
#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset_io(MemoryAddress, value, MemorySize)
#endif
#endif /* LINUX_KERNEL */
/**********************************************************************/
/* XFree86/X.org */
/**********************************************************************/
#ifdef LINUX_XF86
#ifdef SIS_XORG_XF86
#define SIS300
#define SIS315H
@ -126,6 +138,7 @@
#define InPortWord(p) inSISREGW((IOADDRESS)(p))
#define InPortLong(p) inSISREGL((IOADDRESS)(p))
#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize)
#endif
#endif /* XF86 */
#endif /* _OSDEF_H_ */

View File

@ -1,8 +1,10 @@
/*
* SiS 300/630/730/540/315/550/[M]650/651/[M]661[FM]X/740/[M]741[GX]/330/[M]760[GX]
* SiS 300/540/630[S]/730[S],
* SiS 315[E|PRO]/550/[M]65x/[M]661[F|M]X/740/[M]741[GX]/330/[M]76x[GX],
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
*
* Copyright (C) 2001-2004 Thomas Winischhofer, Vienna, Austria.
* Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -19,8 +21,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
*/
#ifndef _SIS_H
#define _SIS_H
#ifndef _SIS_H_
#define _SIS_H_
#include <linux/config.h>
#include <linux/version.h>
@ -35,26 +37,37 @@
#include "vgatypes.h"
#include "vstruct.h"
#define VER_MAJOR 1
#define VER_MINOR 7
#define VER_LEVEL 17
#undef SIS_CONFIG_COMPAT
#define VER_MAJOR 1
#define VER_MINOR 8
#define VER_LEVEL 9
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
#include <linux/spinlock.h>
#define SIS_PCI_GET_CLASS(a, b) pci_get_class(a, b)
#define SIS_PCI_GET_DEVICE(a,b,c) pci_get_device(a,b,c)
#define SIS_PCI_GET_SLOT(a,b) pci_get_slot(a,b)
#define SIS_PCI_PUT_DEVICE(a) pci_dev_put(a)
#ifdef CONFIG_COMPAT
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10)
#include <linux/ioctl32.h>
#define SIS_CONFIG_COMPAT
#define SIS_OLD_CONFIG_COMPAT
#else
#include <linux/smp_lock.h>
#define SIS_NEW_CONFIG_COMPAT
#endif
#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,19)
#ifdef __x86_64__
/* Shouldn't we check for CONFIG_IA32_EMULATION here? */
#endif /* CONFIG_COMPAT */
#else /* 2.4 */
#define SIS_PCI_GET_CLASS(a, b) pci_find_class(a, b)
#define SIS_PCI_GET_DEVICE(a,b,c) pci_find_device(a,b,c)
#define SIS_PCI_GET_SLOT(a,b) pci_find_slot(a,b)
#define SIS_PCI_PUT_DEVICE(a)
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,19)
#ifdef __x86_64__ /* Shouldn't we check for CONFIG_IA32_EMULATION here? */
#include <asm/ioctl32.h>
#define SIS_CONFIG_COMPAT
#define SIS_OLD_CONFIG_COMPAT
#endif
#endif
#endif /* 2.4 */
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8)
#define SIS_IOTYPE1 void __iomem
#define SIS_IOTYPE2 __iomem
@ -79,228 +92,312 @@
/* To be included in pci_ids.h */
#ifndef PCI_DEVICE_ID_SI_650_VGA
#define PCI_DEVICE_ID_SI_650_VGA 0x6325
#define PCI_DEVICE_ID_SI_650_VGA 0x6325
#endif
#ifndef PCI_DEVICE_ID_SI_650
#define PCI_DEVICE_ID_SI_650 0x0650
#define PCI_DEVICE_ID_SI_650 0x0650
#endif
#ifndef PCI_DEVICE_ID_SI_651
#define PCI_DEVICE_ID_SI_651 0x0651
#define PCI_DEVICE_ID_SI_651 0x0651
#endif
#ifndef PCI_DEVICE_ID_SI_740
#define PCI_DEVICE_ID_SI_740 0x0740
#define PCI_DEVICE_ID_SI_740 0x0740
#endif
#ifndef PCI_DEVICE_ID_SI_330
#define PCI_DEVICE_ID_SI_330 0x0330
#define PCI_DEVICE_ID_SI_330 0x0330
#endif
#ifndef PCI_DEVICE_ID_SI_660_VGA
#define PCI_DEVICE_ID_SI_660_VGA 0x6330
#define PCI_DEVICE_ID_SI_660_VGA 0x6330
#endif
#ifndef PCI_DEVICE_ID_SI_661
#define PCI_DEVICE_ID_SI_661 0x0661
#define PCI_DEVICE_ID_SI_661 0x0661
#endif
#ifndef PCI_DEVICE_ID_SI_741
#define PCI_DEVICE_ID_SI_741 0x0741
#define PCI_DEVICE_ID_SI_741 0x0741
#endif
#ifndef PCI_DEVICE_ID_SI_660
#define PCI_DEVICE_ID_SI_660 0x0660
#define PCI_DEVICE_ID_SI_660 0x0660
#endif
#ifndef PCI_DEVICE_ID_SI_760
#define PCI_DEVICE_ID_SI_760 0x0760
#define PCI_DEVICE_ID_SI_760 0x0760
#endif
#ifndef PCI_DEVICE_ID_SI_761
#define PCI_DEVICE_ID_SI_761 0x0761
#endif
#ifndef PCI_VENDOR_ID_XGI
#define PCI_VENDOR_ID_XGI 0x18ca
#endif
#ifndef PCI_DEVICE_ID_XGI_20
#define PCI_DEVICE_ID_XGI_20 0x0020
#endif
#ifndef PCI_DEVICE_ID_XGI_40
#define PCI_DEVICE_ID_XGI_40 0x0040
#endif
/* To be included in fb.h */
#ifndef FB_ACCEL_SIS_GLAMOUR_2
#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 65x, 740, 661, 741 */
#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 65x, 740, 661, 741 */
#endif
#ifndef FB_ACCEL_SIS_XABRE
#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre"), 760 */
#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre"), 76x */
#endif
#ifndef FB_ACCEL_XGI_VOLARI_V
#define FB_ACCEL_XGI_VOLARI_V 47 /* XGI Volari Vx (V3XT, V5, V8) */
#endif
#ifndef FB_ACCEL_XGI_VOLARI_Z
#define FB_ACCEL_XGI_VOLARI_Z 48 /* XGI Volari Z7 */
#endif
#define MAX_ROM_SCAN 0x10000
/* ivideo->caps */
#define HW_CURSOR_CAP 0x80
#define TURBO_QUEUE_CAP 0x40
#define AGP_CMD_QUEUE_CAP 0x20
#define VM_CMD_QUEUE_CAP 0x10
#define MMIO_CMD_QUEUE_CAP 0x08
#define HW_CURSOR_CAP 0x80
#define TURBO_QUEUE_CAP 0x40
#define AGP_CMD_QUEUE_CAP 0x20
#define VM_CMD_QUEUE_CAP 0x10
#define MMIO_CMD_QUEUE_CAP 0x08
/* For 300 series */
#define TURBO_QUEUE_AREA_SIZE 0x80000 /* 512K */
#define HW_CURSOR_AREA_SIZE_300 0x1000 /* 4K */
#define TURBO_QUEUE_AREA_SIZE (512 * 1024) /* 512K */
#define HW_CURSOR_AREA_SIZE_300 4096 /* 4K */
/* For 315/Xabre series */
#define COMMAND_QUEUE_AREA_SIZE 0x80000 /* 512K */
#define COMMAND_QUEUE_THRESHOLD 0x1F
#define HW_CURSOR_AREA_SIZE_315 0x4000 /* 16K */
#define COMMAND_QUEUE_AREA_SIZE (512 * 1024) /* 512K */
#define COMMAND_QUEUE_AREA_SIZE_Z7 (128 * 1024) /* 128k for XGI Z7 */
#define HW_CURSOR_AREA_SIZE_315 16384 /* 16K */
#define COMMAND_QUEUE_THRESHOLD 0x1F
#define SIS_OH_ALLOC_SIZE 4000
#define SENTINEL 0x7fffffff
#define SIS_OH_ALLOC_SIZE 4000
#define SENTINEL 0x7fffffff
#define SEQ_ADR 0x14
#define SEQ_DATA 0x15
#define DAC_ADR 0x18
#define DAC_DATA 0x19
#define CRTC_ADR 0x24
#define CRTC_DATA 0x25
#define DAC2_ADR (0x16-0x30)
#define DAC2_DATA (0x17-0x30)
#define VB_PART1_ADR (0x04-0x30)
#define VB_PART1_DATA (0x05-0x30)
#define VB_PART2_ADR (0x10-0x30)
#define VB_PART2_DATA (0x11-0x30)
#define VB_PART3_ADR (0x12-0x30)
#define VB_PART3_DATA (0x13-0x30)
#define VB_PART4_ADR (0x14-0x30)
#define VB_PART4_DATA (0x15-0x30)
#define SEQ_ADR 0x14
#define SEQ_DATA 0x15
#define DAC_ADR 0x18
#define DAC_DATA 0x19
#define CRTC_ADR 0x24
#define CRTC_DATA 0x25
#define DAC2_ADR (0x16-0x30)
#define DAC2_DATA (0x17-0x30)
#define VB_PART1_ADR (0x04-0x30)
#define VB_PART1_DATA (0x05-0x30)
#define VB_PART2_ADR (0x10-0x30)
#define VB_PART2_DATA (0x11-0x30)
#define VB_PART3_ADR (0x12-0x30)
#define VB_PART3_DATA (0x13-0x30)
#define VB_PART4_ADR (0x14-0x30)
#define VB_PART4_DATA (0x15-0x30)
#define SISSR ivideo->SiS_Pr.SiS_P3c4
#define SISCR ivideo->SiS_Pr.SiS_P3d4
#define SISDACA ivideo->SiS_Pr.SiS_P3c8
#define SISDACD ivideo->SiS_Pr.SiS_P3c9
#define SISPART1 ivideo->SiS_Pr.SiS_Part1Port
#define SISPART2 ivideo->SiS_Pr.SiS_Part2Port
#define SISPART3 ivideo->SiS_Pr.SiS_Part3Port
#define SISPART4 ivideo->SiS_Pr.SiS_Part4Port
#define SISPART5 ivideo->SiS_Pr.SiS_Part5Port
#define SISDAC2A SISPART5
#define SISDAC2D (SISPART5 + 1)
#define SISMISCR (ivideo->SiS_Pr.RelIO + 0x1c)
#define SISMISCW ivideo->SiS_Pr.SiS_P3c2
#define SISINPSTAT (ivideo->SiS_Pr.RelIO + 0x2a)
#define SISPEL ivideo->SiS_Pr.SiS_P3c6
#define SISSR ivideo->SiS_Pr.SiS_P3c4
#define SISCR ivideo->SiS_Pr.SiS_P3d4
#define SISDACA ivideo->SiS_Pr.SiS_P3c8
#define SISDACD ivideo->SiS_Pr.SiS_P3c9
#define SISPART1 ivideo->SiS_Pr.SiS_Part1Port
#define SISPART2 ivideo->SiS_Pr.SiS_Part2Port
#define SISPART3 ivideo->SiS_Pr.SiS_Part3Port
#define SISPART4 ivideo->SiS_Pr.SiS_Part4Port
#define SISPART5 ivideo->SiS_Pr.SiS_Part5Port
#define SISDAC2A SISPART5
#define SISDAC2D (SISPART5 + 1)
#define SISMISCR (ivideo->SiS_Pr.RelIO + 0x1c)
#define SISMISCW ivideo->SiS_Pr.SiS_P3c2
#define SISINPSTAT (ivideo->SiS_Pr.RelIO + 0x2a)
#define SISPEL ivideo->SiS_Pr.SiS_P3c6
#define SISVGAENABLE (ivideo->SiS_Pr.RelIO + 0x13)
#define SISVID (ivideo->SiS_Pr.RelIO + 0x02 - 0x30)
#define SISCAP (ivideo->SiS_Pr.RelIO + 0x00 - 0x30)
#define IND_SIS_PASSWORD 0x05 /* SRs */
#define IND_SIS_COLOR_MODE 0x06
#define IND_SIS_RAMDAC_CONTROL 0x07
#define IND_SIS_DRAM_SIZE 0x14
#define IND_SIS_MODULE_ENABLE 0x1E
#define IND_SIS_PCI_ADDRESS_SET 0x20
#define IND_SIS_TURBOQUEUE_ADR 0x26
#define IND_SIS_TURBOQUEUE_SET 0x27
#define IND_SIS_POWER_ON_TRAP 0x38
#define IND_SIS_POWER_ON_TRAP2 0x39
#define IND_SIS_CMDQUEUE_SET 0x26
#define IND_SIS_CMDQUEUE_THRESHOLD 0x27
#define IND_SIS_PASSWORD 0x05 /* SRs */
#define IND_SIS_COLOR_MODE 0x06
#define IND_SIS_RAMDAC_CONTROL 0x07
#define IND_SIS_DRAM_SIZE 0x14
#define IND_SIS_MODULE_ENABLE 0x1E
#define IND_SIS_PCI_ADDRESS_SET 0x20
#define IND_SIS_TURBOQUEUE_ADR 0x26
#define IND_SIS_TURBOQUEUE_SET 0x27
#define IND_SIS_POWER_ON_TRAP 0x38
#define IND_SIS_POWER_ON_TRAP2 0x39
#define IND_SIS_CMDQUEUE_SET 0x26
#define IND_SIS_CMDQUEUE_THRESHOLD 0x27
#define IND_SIS_AGP_IO_PAD 0x48
#define IND_SIS_AGP_IO_PAD 0x48
#define SIS_CRT2_WENABLE_300 0x24 /* Part1 */
#define SIS_CRT2_WENABLE_315 0x2F
#define SIS_CRT2_WENABLE_300 0x24 /* Part1 */
#define SIS_CRT2_WENABLE_315 0x2F
#define SIS_PASSWORD 0x86 /* SR05 */
#define SIS_PASSWORD 0x86 /* SR05 */
#define SIS_INTERLACED_MODE 0x20 /* SR06 */
#define SIS_8BPP_COLOR_MODE 0x0
#define SIS_15BPP_COLOR_MODE 0x1
#define SIS_16BPP_COLOR_MODE 0x2
#define SIS_32BPP_COLOR_MODE 0x4
#define SIS_INTERLACED_MODE 0x20 /* SR06 */
#define SIS_8BPP_COLOR_MODE 0x0
#define SIS_15BPP_COLOR_MODE 0x1
#define SIS_16BPP_COLOR_MODE 0x2
#define SIS_32BPP_COLOR_MODE 0x4
#define SIS_ENABLE_2D 0x40 /* SR1E */
#define SIS_ENABLE_2D 0x40 /* SR1E */
#define SIS_MEM_MAP_IO_ENABLE 0x01 /* SR20 */
#define SIS_PCI_ADDR_ENABLE 0x80
#define SIS_MEM_MAP_IO_ENABLE 0x01 /* SR20 */
#define SIS_PCI_ADDR_ENABLE 0x80
#define SIS_AGP_CMDQUEUE_ENABLE 0x80 /* 315/330 series SR26 */
#define SIS_VRAM_CMDQUEUE_ENABLE 0x40
#define SIS_MMIO_CMD_ENABLE 0x20
#define SIS_CMD_QUEUE_SIZE_512k 0x00
#define SIS_CMD_QUEUE_SIZE_1M 0x04
#define SIS_CMD_QUEUE_SIZE_2M 0x08
#define SIS_CMD_QUEUE_SIZE_4M 0x0C
#define SIS_CMD_QUEUE_RESET 0x01
#define SIS_CMD_AUTO_CORR 0x02
#define SIS_AGP_CMDQUEUE_ENABLE 0x80 /* 315/330/340 series SR26 */
#define SIS_VRAM_CMDQUEUE_ENABLE 0x40
#define SIS_MMIO_CMD_ENABLE 0x20
#define SIS_CMD_QUEUE_SIZE_512k 0x00
#define SIS_CMD_QUEUE_SIZE_1M 0x04
#define SIS_CMD_QUEUE_SIZE_2M 0x08
#define SIS_CMD_QUEUE_SIZE_4M 0x0C
#define SIS_CMD_QUEUE_RESET 0x01
#define SIS_CMD_AUTO_CORR 0x02
#define SIS_SIMULTANEOUS_VIEW_ENABLE 0x01 /* CR30 */
#define SIS_MODE_SELECT_CRT2 0x02
#define SIS_VB_OUTPUT_COMPOSITE 0x04
#define SIS_VB_OUTPUT_SVIDEO 0x08
#define SIS_VB_OUTPUT_SCART 0x10
#define SIS_VB_OUTPUT_LCD 0x20
#define SIS_VB_OUTPUT_CRT2 0x40
#define SIS_VB_OUTPUT_HIVISION 0x80
#define SIS_CMD_QUEUE_SIZE_Z7_64k 0x00 /* XGI Z7 */
#define SIS_CMD_QUEUE_SIZE_Z7_128k 0x04
#define SIS_VB_OUTPUT_DISABLE 0x20 /* CR31 */
#define SIS_DRIVER_MODE 0x40
#define SIS_SIMULTANEOUS_VIEW_ENABLE 0x01 /* CR30 */
#define SIS_MODE_SELECT_CRT2 0x02
#define SIS_VB_OUTPUT_COMPOSITE 0x04
#define SIS_VB_OUTPUT_SVIDEO 0x08
#define SIS_VB_OUTPUT_SCART 0x10
#define SIS_VB_OUTPUT_LCD 0x20
#define SIS_VB_OUTPUT_CRT2 0x40
#define SIS_VB_OUTPUT_HIVISION 0x80
#define SIS_VB_COMPOSITE 0x01 /* CR32 */
#define SIS_VB_SVIDEO 0x02
#define SIS_VB_SCART 0x04
#define SIS_VB_LCD 0x08
#define SIS_VB_CRT2 0x10
#define SIS_CRT1 0x20
#define SIS_VB_HIVISION 0x40
#define SIS_VB_YPBPR 0x80
#define SIS_VB_TV (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR)
#define SIS_VB_OUTPUT_DISABLE 0x20 /* CR31 */
#define SIS_DRIVER_MODE 0x40
#define SIS_EXTERNAL_CHIP_MASK 0x0E /* CR37 (< SiS 660) */
#define SIS_EXTERNAL_CHIP_SIS301 0x01 /* in CR37 << 1 ! */
#define SIS_EXTERNAL_CHIP_LVDS 0x02
#define SIS_EXTERNAL_CHIP_TRUMPION 0x03
#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04
#define SIS_EXTERNAL_CHIP_CHRONTEL 0x05
#define SIS310_EXTERNAL_CHIP_LVDS 0x02
#define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03
#define SIS_VB_COMPOSITE 0x01 /* CR32 */
#define SIS_VB_SVIDEO 0x02
#define SIS_VB_SCART 0x04
#define SIS_VB_LCD 0x08
#define SIS_VB_CRT2 0x10
#define SIS_CRT1 0x20
#define SIS_VB_HIVISION 0x40
#define SIS_VB_YPBPR 0x80
#define SIS_VB_TV (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR)
#define SIS_AGP_2X 0x20 /* CR48 */
#define SIS_EXTERNAL_CHIP_MASK 0x0E /* CR37 (< SiS 660) */
#define SIS_EXTERNAL_CHIP_SIS301 0x01 /* in CR37 << 1 ! */
#define SIS_EXTERNAL_CHIP_LVDS 0x02
#define SIS_EXTERNAL_CHIP_TRUMPION 0x03
#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04
#define SIS_EXTERNAL_CHIP_CHRONTEL 0x05
#define SIS310_EXTERNAL_CHIP_LVDS 0x02
#define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03
#define HW_DEVICE_EXTENSION SIS_HW_INFO
#define PHW_DEVICE_EXTENSION PSIS_HW_INFO
#define SIS_AGP_2X 0x20 /* CR48 */
/* vbflags, private entries (others in sisfb.h) */
#define VB_CONEXANT 0x00000800 /* 661 series only */
#define VB_TRUMPION VB_CONEXANT /* 300 series only */
#define VB_302ELV 0x00004000
#define VB_301 0x00100000 /* Video bridge type */
#define VB_301B 0x00200000
#define VB_302B 0x00400000
#define VB_30xBDH 0x00800000 /* 30xB DH version (w/o LCD support) */
#define VB_LVDS 0x01000000
#define VB_CHRONTEL 0x02000000
#define VB_301LV 0x04000000
#define VB_302LV 0x08000000
#define VB_301C 0x10000000
#define VB_SISBRIDGE (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)
#define VB_VIDEOBRIDGE (VB_SISBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT)
/* vbflags2 (static stuff only!) */
#define VB2_SISUMC 0x00000001
#define VB2_301 0x00000002 /* Video bridge type */
#define VB2_301B 0x00000004
#define VB2_301C 0x00000008
#define VB2_307T 0x00000010
#define VB2_302B 0x00000800
#define VB2_301LV 0x00001000
#define VB2_302LV 0x00002000
#define VB2_302ELV 0x00004000
#define VB2_307LV 0x00008000
#define VB2_30xBDH 0x08000000 /* 30xB DH version (w/o LCD support) */
#define VB2_CONEXANT 0x10000000
#define VB2_TRUMPION 0x20000000
#define VB2_LVDS 0x40000000
#define VB2_CHRONTEL 0x80000000
#define VB2_SISLVDSBRIDGE (VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
#define VB2_SISTMDSBRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
#define VB2_SISBRIDGE (VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE)
#define VB2_SISTMDSLCDABRIDGE (VB2_301C | VB2_307T)
#define VB2_SISLCDABRIDGE (VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
#define VB2_SISHIVISIONBRIDGE (VB2_301 | VB2_301B | VB2_302B)
#define VB2_SISYPBPRBRIDGE (VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE)
#define VB2_SISYPBPRARBRIDGE (VB2_301C | VB2_307T | VB2_307LV)
#define VB2_SISTAP4SCALER (VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV)
#define VB2_SISTVBRIDGE (VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE)
#define VB2_SISVGA2BRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
#define VB2_VIDEOBRIDGE (VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT)
#define VB2_30xB (VB2_301B | VB2_301C | VB2_302B | VB2_307T)
#define VB2_30xBLV (VB2_30xB | VB2_SISLVDSBRIDGE)
#define VB2_30xC (VB2_301C | VB2_307T)
#define VB2_30xCLV (VB2_301C | VB2_307T | VB2_302ELV| VB2_307LV)
#define VB2_SISEMIBRIDGE (VB2_302LV | VB2_302ELV | VB2_307LV)
#define VB2_LCD162MHZBRIDGE (VB2_301C | VB2_307T)
#define VB2_LCDOVER1280BRIDGE (VB2_301C | VB2_307T | VB2_302LV | VB2_302ELV | VB2_307LV)
#define VB2_LCDOVER1600BRIDGE (VB2_307T | VB2_307LV)
#define VB2_RAMDAC202MHZBRIDGE (VB2_301C | VB2_307T)
/* I/O port access macros */
#define inSISREG(base) inb(base)
#define inSISREG(base) inb(base)
#define outSISREG(base,val) outb(val,base)
#define outSISREG(base,val) outb(val,base)
#define orSISREG(base,val) \
do { \
u8 __Temp = inSISREG(base); \
outSISREG(base, __Temp | (val)); \
} while (0)
do { \
u8 __Temp = inSISREG(base); \
outSISREG(base, __Temp | (val));\
} while (0)
#define andSISREG(base,val) \
do { \
u8 __Temp = inSISREG(base); \
outSISREG(base, __Temp & (val)); \
} while (0)
do { \
u8 __Temp = inSISREG(base); \
outSISREG(base, __Temp & (val));\
} while (0)
#define inSISIDXREG(base,idx,var) \
do { \
outSISREG(base, idx); \
var = inSISREG((base)+1); \
} while (0)
#define inSISIDXREG(base,idx,var) \
do { \
outSISREG(base, idx); \
var = inSISREG((base)+1); \
} while (0)
#define outSISIDXREG(base,idx,val) \
do { \
outSISREG(base, idx); \
outSISREG((base)+1, val); \
} while (0)
#define outSISIDXREG(base,idx,val) \
do { \
outSISREG(base, idx); \
outSISREG((base)+1, val); \
} while (0)
#define orSISIDXREG(base,idx,val) \
do { \
u8 __Temp; \
outSISREG(base, idx); \
__Temp = inSISREG((base)+1) | (val); \
outSISREG((base)+1, __Temp); \
} while (0)
#define orSISIDXREG(base,idx,val) \
do { \
u8 __Temp; \
outSISREG(base, idx); \
__Temp = inSISREG((base)+1) | (val); \
outSISREG((base)+1, __Temp); \
} while (0)
#define andSISIDXREG(base,idx,and) \
do { \
u8 __Temp; \
outSISREG(base, idx); \
__Temp = inSISREG((base)+1) & (and); \
outSISREG((base)+1, __Temp); \
} while (0)
#define andSISIDXREG(base,idx,and) \
do { \
u8 __Temp; \
outSISREG(base, idx); \
__Temp = inSISREG((base)+1) & (and); \
outSISREG((base)+1, __Temp); \
} while (0)
#define setSISIDXREG(base,idx,and,or) \
do { \
u8 __Temp; \
outSISREG(base, idx); \
__Temp = (inSISREG((base)+1) & (and)) | (or); \
outSISREG((base)+1, __Temp); \
} while (0)
#define setSISIDXREG(base,idx,and,or) \
do { \
u8 __Temp; \
outSISREG(base, idx); \
__Temp = (inSISREG((base)+1) & (and)) | (or); \
outSISREG((base)+1, __Temp); \
} while (0)
/* MMIO access macros */
#define MMIO_IN8(base, offset) readb((base+offset))
@ -322,19 +419,19 @@
#define MMIO_QUEUE_READPORT Q_READ_PTR
#ifndef FB_BLANK_UNBLANK
#define FB_BLANK_UNBLANK 0
#define FB_BLANK_UNBLANK 0
#endif
#ifndef FB_BLANK_NORMAL
#define FB_BLANK_NORMAL 1
#define FB_BLANK_NORMAL 1
#endif
#ifndef FB_BLANK_VSYNC_SUSPEND
#define FB_BLANK_VSYNC_SUSPEND 2
#define FB_BLANK_VSYNC_SUSPEND 2
#endif
#ifndef FB_BLANK_HSYNC_SUSPEND
#define FB_BLANK_HSYNC_SUSPEND 3
#define FB_BLANK_HSYNC_SUSPEND 3
#endif
#ifndef FB_BLANK_POWERDOWN
#define FB_BLANK_POWERDOWN 4
#define FB_BLANK_POWERDOWN 4
#endif
enum _SIS_LCD_TYPE {
@ -347,18 +444,19 @@ enum _SIS_LCD_TYPE {
LCD_1600x1200,
LCD_1920x1440,
LCD_2048x1536,
LCD_320x480, /* FSTN */
LCD_320x240, /* FSTN */
LCD_1400x1050,
LCD_1152x864,
LCD_1152x768,
LCD_1280x768,
LCD_1024x600,
LCD_640x480_2, /* DSTN */
LCD_640x480_3, /* DSTN */
LCD_320x240_2, /* DSTN */
LCD_320x240_3, /* DSTN */
LCD_848x480,
LCD_1280x800,
LCD_1680x1050,
LCD_1280x720,
LCD_1280x854,
LCD_CUSTOM,
LCD_UNKNOWN
};
@ -368,31 +466,50 @@ enum _SIS_CMDTYPE {
AGP_CMD_QUEUE,
VM_CMD_QUEUE,
};
typedef unsigned int SIS_CMDTYPE;
struct SIS_OH {
struct SIS_OH *poh_next;
struct SIS_OH *poh_prev;
u32 offset;
u32 size;
};
struct SIS_OHALLOC {
struct SIS_OHALLOC *poha_next;
struct SIS_OH aoh[1];
};
struct SIS_HEAP {
struct SIS_OH oh_free;
struct SIS_OH oh_used;
struct SIS_OH *poh_freelist;
struct SIS_OHALLOC *poha_chain;
u32 max_freesize;
struct sis_video_info *vinfo;
};
/* Our "par" */
struct sis_video_info {
int cardnumber;
struct fb_info *memyselfandi;
SIS_HW_INFO sishw_ext;
SiS_Private SiS_Pr;
struct SiS_Private SiS_Pr;
sisfb_info sisfbinfo; /* For ioctl SISFB_GET_INFO */
struct sisfb_info sisfbinfo; /* For ioctl SISFB_GET_INFO */
struct fb_var_screeninfo default_var;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
struct fb_fix_screeninfo sisfb_fix;
u32 pseudo_palette[17];
u32 pseudo_palette[17];
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
struct display sis_disp;
struct display sis_disp;
struct display_switch sisfb_sw;
struct {
u16 red, green, blue, pad;
} sis_palette[256];
} sis_palette[256];
union {
#ifdef FBCON_HAS_CFB16
u16 cfb16[16];
@ -400,10 +517,10 @@ struct sis_video_info {
#ifdef FBCON_HAS_CFB32
u32 cfb32[16];
#endif
} sis_fbcon_cmap;
} sis_fbcon_cmap;
#endif
struct sisfb_monitor {
struct sisfb_monitor {
u16 hmin;
u16 hmax;
u16 vmin;
@ -411,163 +528,166 @@ struct sis_video_info {
u32 dclockmax;
u8 feature;
BOOLEAN datavalid;
} sisfb_thismonitor;
} sisfb_thismonitor;
int chip_id;
unsigned short chip_id; /* PCI ID of chip */
unsigned short chip_vendor; /* PCI ID of vendor */
char myid[40];
struct pci_dev *nbridge;
struct pci_dev *lpcdev;
int mni; /* Mode number index */
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
int currcon;
int currcon;
#endif
unsigned long video_size;
unsigned long video_base;
unsigned long video_base;
unsigned long mmio_size;
unsigned long mmio_base;
unsigned long vga_base;
unsigned long mmio_base;
unsigned long vga_base;
SIS_IOTYPE1 *video_vbase;
SIS_IOTYPE1 *mmio_vbase;
unsigned long video_offset;
unsigned char *bios_abase;
unsigned long UMAsize, LFBsize;
int mtrr;
SIS_IOTYPE1 *video_vbase;
SIS_IOTYPE1 *mmio_vbase;
unsigned char *bios_abase;
int mtrr;
u32 sisfb_mem;
u32 sisfb_parm_mem;
int sisfb_accel;
int sisfb_ypan;
int sisfb_max;
int sisfb_userom;
int sisfb_useoem;
u32 sisfb_parm_mem;
int sisfb_accel;
int sisfb_ypan;
int sisfb_max;
int sisfb_userom;
int sisfb_useoem;
int sisfb_mode_idx;
int sisfb_parm_rate;
int sisfb_crt1off;
int sisfb_forcecrt1;
int sisfb_crt2type;
int sisfb_crt2flags;
int sisfb_dstn;
int sisfb_fstn;
int sisfb_dstn;
int sisfb_fstn;
int sisfb_tvplug;
int sisfb_tvstd;
int sisfb_filter;
int sisfb_nocrt2rate;
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
int sisfb_inverse;
#endif
u32 heapstart; /* offset */
SIS_IOTYPE1 *sisfb_heap_start; /* address */
SIS_IOTYPE1 *sisfb_heap_end; /* address */
u32 sisfb_heap_size;
u32 heapstart; /* offset */
SIS_IOTYPE1 *sisfb_heap_start; /* address */
SIS_IOTYPE1 *sisfb_heap_end; /* address */
u32 sisfb_heap_size;
int havenoheap;
#if 0
SIS_HEAP sisfb_heap;
#endif
struct SIS_HEAP sisfb_heap; /* This card's vram heap */
int video_bpp;
int video_cmap_len;
int video_width;
int video_height;
unsigned int refresh_rate;
int video_bpp;
int video_cmap_len;
int video_width;
int video_height;
unsigned int refresh_rate;
unsigned int chip;
u8 revision_id;
unsigned int chip;
u8 revision_id;
int sisvga_enabled; /* PCI device was enabled */
int video_linelength; /* real pitch */
int video_linelength; /* real pitch */
int scrnpitchCRT1; /* pitch regarding interlace */
u16 DstColor; /* For 2d acceleration */
u32 SiS310_AccelDepth;
u32 CommandReg;
int cmdqueuelength;
u16 DstColor; /* For 2d acceleration */
u32 SiS310_AccelDepth;
u32 CommandReg;
int cmdqueuelength; /* Current (for accel) */
u32 cmdQueueSize; /* Total size in KB */
spinlock_t lockaccel; /* Do not use outside of kernel! */
spinlock_t lockaccel; /* Do not use outside of kernel! */
unsigned int pcibus;
unsigned int pcislot;
unsigned int pcifunc;
unsigned int pcibus;
unsigned int pcislot;
unsigned int pcifunc;
int accel;
int accel;
int engineok;
u16 subsysvendor;
u16 subsysdevice;
u16 subsysvendor;
u16 subsysdevice;
u32 vbflags; /* Replacing deprecated stuff from above */
u32 currentvbflags;
u32 vbflags; /* Replacing deprecated stuff from above */
u32 currentvbflags;
u32 vbflags2;
int lcdxres, lcdyres;
int lcddefmodeidx, tvdefmodeidx, defmodeidx;
u32 CRT2LCDType; /* defined in "SIS_LCD_TYPE" */
u32 CRT2LCDType; /* defined in "SIS_LCD_TYPE" */
u32 curFSTN, curDSTN;
int current_bpp;
int current_width;
int current_height;
int current_htotal;
int current_vtotal;
int current_bpp;
int current_width;
int current_height;
int current_htotal;
int current_vtotal;
int current_linelength;
__u32 current_pixclock;
int current_refresh_rate;
__u32 current_pixclock;
int current_refresh_rate;
u8 mode_no;
u8 rate_idx;
int modechanged;
unsigned char modeprechange;
unsigned int current_base;
u8 mode_no;
u8 rate_idx;
int modechanged;
unsigned char modeprechange;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
u8 sisfb_lastrates[128];
u8 sisfb_lastrates[128];
#endif
int newrom;
int registered;
int newrom;
int haveXGIROM;
int registered;
int warncount;
#ifdef SIS_OLD_CONFIG_COMPAT
int ioctl32registered;
#endif
int sisvga_engine;
int hwcursor_size;
int CRT2_write_enable;
u8 caps;
int sisvga_engine;
int hwcursor_size;
int CRT2_write_enable;
u8 caps;
u8 detectedpdc;
u8 detectedpdca;
u8 detectedlcda;
u8 detectedpdc;
u8 detectedpdca;
u8 detectedlcda;
SIS_IOTYPE1 *hwcursor_vbase;
SIS_IOTYPE1 *hwcursor_vbase;
int chronteltype;
int tvxpos, tvypos;
u8 p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02;
int chronteltype;
int tvxpos, tvypos;
u8 p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02;
int tvx, tvy;
u8 sisfblocked;
u8 sisfblocked;
struct sisfb_info sisfb_infoblock;
struct sisfb_cmd sisfb_command;
u32 sisfb_id;
u8 sisfb_can_post;
u8 sisfb_card_posted;
u8 sisfb_was_boot_device;
struct sis_video_info *next;
};
typedef struct _SIS_OH {
struct _SIS_OH *poh_next;
struct _SIS_OH *poh_prev;
u32 offset;
u32 size;
} SIS_OH;
typedef struct _SIS_OHALLOC {
struct _SIS_OHALLOC *poha_next;
SIS_OH aoh[1];
} SIS_OHALLOC;
typedef struct _SIS_HEAP {
SIS_OH oh_free;
SIS_OH oh_used;
SIS_OH *poh_freelist;
SIS_OHALLOC *poha_chain;
u32 max_freesize;
struct sis_video_info *vinfo;
} SIS_HEAP;
#endif

View File

@ -1,6 +1,8 @@
/*
* SiS 300/630/730/540/315/550/65x/74x/330/760 frame buffer driver
* for Linux kernels 2.4.x and 2.6.x
* SiS 300/540/630[S]/730[S],
* SiS 315[E|PRO]/550/[M]650/651/[M]661[F|M]X/740/[M]741[GX]/330/[M]760[GX],
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
*
* 2D acceleration part
*
@ -19,7 +21,7 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
*
* Based on the XFree86/X.org driver which is
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>
* (see http://www.winischhofer.net/
@ -30,13 +32,11 @@
#include <linux/version.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/fb.h>
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
#include <linux/console.h>
#include <linux/selection.h>
#endif
#include <linux/ioport.h>
#include <linux/capability.h>
#include <linux/fs.h>
#include <linux/types.h>
#include <asm/io.h>
@ -188,7 +188,7 @@ SiS300SubsequentSolidFillRect(struct sis_video_info *ivideo, int x, int y, int w
}
#endif
/* 315/330 series ------------------------------------------------- */
/* 315/330/340 series ---------------------------------------------- */
#ifdef CONFIG_FB_SIS_315
static void
@ -202,7 +202,7 @@ SiS310SetupForScreenToScreenCopy(struct sis_video_info *ivideo, int rop, int tra
{
SiS310SetupDSTColorDepth(ivideo->DstColor);
SiS310SetupSRCPitch(ivideo->video_linelength)
SiS310SetupDSTRect(ivideo->video_linelength, 0xffff)
SiS310SetupDSTRect(ivideo->video_linelength, 0x0fff)
if(trans_color != -1) {
SiS310SetupROP(0x0A)
SiS310SetupSRCTrans(trans_color)
@ -213,7 +213,7 @@ SiS310SetupForScreenToScreenCopy(struct sis_video_info *ivideo, int rop, int tra
/* SiSSetupCMDFlag(BITBLT | SRCVIDEO) */
}
SiS310SetupCMDFlag(ivideo->SiS310_AccelDepth)
/* The 315 series is smart enough to know the direction */
/* The chip is smart enough to know the direction */
}
static void
@ -223,35 +223,38 @@ SiS310SubsequentScreenToScreenCopy(struct sis_video_info *ivideo, int src_x, int
u32 srcbase = 0, dstbase = 0;
int mymin = min(src_y, dst_y);
int mymax = max(src_y, dst_y);
/* Although the chip knows the direction to use
* if the source and destination areas overlap,
* if the source and destination areas overlap,
* that logic fails if we fiddle with the bitmap
* addresses. Therefore, we check if the source
* and destination blitting areas overlap and
* adapt the bitmap addresses synchronously
* and destination blitting areas overlap and
* adapt the bitmap addresses synchronously
* if the coordinates exceed the valid range.
* The the areas do not overlap, we do our
* The the areas do not overlap, we do our
* normal check.
*/
if((mymax - mymin) < height) {
if((src_y >= 2048) || (dst_y >= 2048)) {
srcbase = ivideo->video_linelength * mymin;
dstbase = ivideo->video_linelength * mymin;
src_y -= mymin;
dst_y -= mymin;
}
if((mymax - mymin) < height) {
if((src_y >= 2048) || (dst_y >= 2048)) {
srcbase = ivideo->video_linelength * mymin;
dstbase = ivideo->video_linelength * mymin;
src_y -= mymin;
dst_y -= mymin;
}
} else {
if(src_y >= 2048) {
srcbase = ivideo->video_linelength * src_y;
src_y = 0;
}
if(dst_y >= 2048) {
dstbase = ivideo->video_linelength * dst_y;
dst_y = 0;
}
if(src_y >= 2048) {
srcbase = ivideo->video_linelength * src_y;
src_y = 0;
}
if(dst_y >= 2048) {
dstbase = ivideo->video_linelength * dst_y;
dst_y = 0;
}
}
srcbase += ivideo->video_offset;
dstbase += ivideo->video_offset;
SiS310SetupSRCBase(srcbase);
SiS310SetupDSTBase(dstbase);
SiS310SetupRect(width, height)
@ -264,7 +267,7 @@ static void
SiS310SetupForSolidFill(struct sis_video_info *ivideo, u32 color, int rop)
{
SiS310SetupPATFG(color)
SiS310SetupDSTRect(ivideo->video_linelength, 0xffff)
SiS310SetupDSTRect(ivideo->video_linelength, 0x0fff)
SiS310SetupDSTColorDepth(ivideo->DstColor);
SiS310SetupROP(sisPatALUConv[rop])
SiS310SetupCMDFlag(PATFG | ivideo->SiS310_AccelDepth)
@ -279,6 +282,7 @@ SiS310SubsequentSolidFillRect(struct sis_video_info *ivideo, int x, int y, int w
dstbase = ivideo->video_linelength * y;
y = 0;
}
dstbase += ivideo->video_offset;
SiS310SetupDSTBase(dstbase)
SiS310SetupDSTXY(x,y)
SiS310SetupRect(w,h)
@ -294,384 +298,153 @@ SiS310SubsequentSolidFillRect(struct sis_video_info *ivideo, int x, int y, int w
int sisfb_initaccel(struct sis_video_info *ivideo)
{
#ifdef SISFB_USE_SPINLOCKS
spin_lock_init(&ivideo->lockaccel);
spin_lock_init(&ivideo->lockaccel);
#endif
return(0);
return 0;
}
void sisfb_syncaccel(struct sis_video_info *ivideo)
{
if(ivideo->sisvga_engine == SIS_300_VGA) {
if(ivideo->sisvga_engine == SIS_300_VGA) {
#ifdef CONFIG_FB_SIS_300
SiS300Sync(ivideo);
SiS300Sync(ivideo);
#endif
} else {
} else {
#ifdef CONFIG_FB_SIS_315
SiS310Sync(ivideo);
SiS310Sync(ivideo);
#endif
}
}
}
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) /* --------------- 2.5 --------------- */
int fbcon_sis_sync(struct fb_info *info)
{
struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
CRITFLAGS
struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
CRITFLAGS
if(!ivideo->accel)
return 0;
if((!ivideo->accel) || (!ivideo->engineok))
return 0;
if(ivideo->sisvga_engine == SIS_300_VGA) {
#ifdef CONFIG_FB_SIS_300
SiS300Sync(ivideo);
#endif
} else {
#ifdef CONFIG_FB_SIS_315
SiS310Sync(ivideo);
#endif
}
CRITEND
return 0;
CRITBEGIN
sisfb_syncaccel(ivideo);
CRITEND
return 0;
}
void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
{
struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
u32 col = 0;
u32 vxres = info->var.xres_virtual;
u32 vyres = info->var.yres_virtual;
int width, height;
CRITFLAGS
struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
u32 col = 0;
u32 vxres = info->var.xres_virtual;
u32 vyres = info->var.yres_virtual;
int width, height;
CRITFLAGS
if(info->state != FBINFO_STATE_RUNNING) {
return;
}
if(info->state != FBINFO_STATE_RUNNING)
return;
if(!ivideo->accel) {
cfb_fillrect(info, rect);
return;
}
if(!rect->width || !rect->height || rect->dx >= vxres || rect->dy >= vyres) {
return;
}
if((!ivideo->accel) || (!ivideo->engineok)) {
cfb_fillrect(info, rect);
return;
}
/* Clipping */
width = ((rect->dx + rect->width) > vxres) ? (vxres - rect->dx) : rect->width;
height = ((rect->dy + rect->height) > vyres) ? (vyres - rect->dy) : rect->height;
if(!rect->width || !rect->height || rect->dx >= vxres || rect->dy >= vyres)
return;
switch(info->var.bits_per_pixel) {
/* Clipping */
width = ((rect->dx + rect->width) > vxres) ? (vxres - rect->dx) : rect->width;
height = ((rect->dy + rect->height) > vyres) ? (vyres - rect->dy) : rect->height;
switch(info->var.bits_per_pixel) {
case 8: col = rect->color;
break;
case 16:
case 32: col = ((u32 *)(info->pseudo_palette))[rect->color];
break;
}
}
if(ivideo->sisvga_engine == SIS_300_VGA) {
if(ivideo->sisvga_engine == SIS_300_VGA) {
#ifdef CONFIG_FB_SIS_300
CRITBEGIN
SiS300SetupForSolidFill(ivideo, col, myrops[rect->rop]);
SiS300SubsequentSolidFillRect(ivideo, rect->dx, rect->dy, width, height);
CRITEND
SiS300Sync(ivideo);
CRITBEGIN
SiS300SetupForSolidFill(ivideo, col, myrops[rect->rop]);
SiS300SubsequentSolidFillRect(ivideo, rect->dx, rect->dy, width, height);
CRITEND
#endif
} else {
} else {
#ifdef CONFIG_FB_SIS_315
CRITBEGIN
SiS310SetupForSolidFill(ivideo, col, myrops[rect->rop]);
SiS310SubsequentSolidFillRect(ivideo, rect->dx, rect->dy, width, height);
CRITEND
SiS310Sync(ivideo);
CRITBEGIN
SiS310SetupForSolidFill(ivideo, col, myrops[rect->rop]);
SiS310SubsequentSolidFillRect(ivideo, rect->dx, rect->dy, width, height);
CRITEND
#endif
}
}
sisfb_syncaccel(ivideo);
}
void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area)
{
struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
u32 vxres = info->var.xres_virtual;
u32 vyres = info->var.yres_virtual;
int width = area->width;
int height = area->height;
CRITFLAGS
struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
u32 vxres = info->var.xres_virtual;
u32 vyres = info->var.yres_virtual;
int width = area->width;
int height = area->height;
CRITFLAGS
if(info->state != FBINFO_STATE_RUNNING) {
return;
}
if(info->state != FBINFO_STATE_RUNNING)
return;
if(!ivideo->accel) {
cfb_copyarea(info, area);
return;
}
if((!ivideo->accel) || (!ivideo->engineok)) {
cfb_copyarea(info, area);
return;
}
if(!width || !height ||
area->sx >= vxres || area->sy >= vyres ||
area->dx >= vxres || area->dy >= vyres) {
return;
}
if(!width || !height ||
area->sx >= vxres || area->sy >= vyres ||
area->dx >= vxres || area->dy >= vyres)
return;
/* Clipping */
if((area->sx + width) > vxres) width = vxres - area->sx;
if((area->dx + width) > vxres) width = vxres - area->dx;
if((area->sy + height) > vyres) height = vyres - area->sy;
if((area->dy + height) > vyres) height = vyres - area->dy;
/* Clipping */
if((area->sx + width) > vxres) width = vxres - area->sx;
if((area->dx + width) > vxres) width = vxres - area->dx;
if((area->sy + height) > vyres) height = vyres - area->sy;
if((area->dy + height) > vyres) height = vyres - area->dy;
if(ivideo->sisvga_engine == SIS_300_VGA) {
if(ivideo->sisvga_engine == SIS_300_VGA) {
#ifdef CONFIG_FB_SIS_300
int xdir, ydir;
int xdir, ydir;
if(area->sx < area->dx) xdir = 0;
else xdir = 1;
if(area->sy < area->dy) ydir = 0;
else ydir = 1;
if(area->sx < area->dx) xdir = 0;
else xdir = 1;
if(area->sy < area->dy) ydir = 0;
else ydir = 1;
CRITBEGIN
SiS300SetupForScreenToScreenCopy(ivideo, xdir, ydir, 3, -1);
SiS300SubsequentScreenToScreenCopy(ivideo, area->sx, area->sy, area->dx, area->dy,
width, height);
CRITEND
SiS300Sync(ivideo);
CRITBEGIN
SiS300SetupForScreenToScreenCopy(ivideo, xdir, ydir, 3, -1);
SiS300SubsequentScreenToScreenCopy(ivideo, area->sx, area->sy,
area->dx, area->dy, width, height);
CRITEND
#endif
} else {
} else {
#ifdef CONFIG_FB_SIS_315
CRITBEGIN
SiS310SetupForScreenToScreenCopy(ivideo, 3, -1);
SiS310SubsequentScreenToScreenCopy(ivideo, area->sx, area->sy, area->dx, area->dy,
width, height);
CRITEND
SiS310Sync(ivideo);
CRITBEGIN
SiS310SetupForScreenToScreenCopy(ivideo, 3, -1);
SiS310SubsequentScreenToScreenCopy(ivideo, area->sx, area->sy,
area->dx, area->dy, width, height);
CRITEND
#endif
}
}
sisfb_syncaccel(ivideo);
}
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) /* -------------- 2.4 --------------- */
void fbcon_sis_bmove(struct display *p, int srcy, int srcx,
int dsty, int dstx, int height, int width)
{
struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par;
CRITFLAGS
if(!ivideo->accel) {
switch(ivideo->video_bpp) {
case 8:
#ifdef FBCON_HAS_CFB8
fbcon_cfb8_bmove(p, srcy, srcx, dsty, dstx, height, width);
#endif
break;
case 16:
#ifdef FBCON_HAS_CFB16
fbcon_cfb16_bmove(p, srcy, srcx, dsty, dstx, height, width);
#endif
break;
case 32:
#ifdef FBCON_HAS_CFB32
fbcon_cfb32_bmove(p, srcy, srcx, dsty, dstx, height, width);
#endif
break;
}
return;
}
srcx *= fontwidth(p);
srcy *= fontheight(p);
dstx *= fontwidth(p);
dsty *= fontheight(p);
width *= fontwidth(p);
height *= fontheight(p);
if(ivideo->sisvga_engine == SIS_300_VGA) {
#ifdef CONFIG_FB_SIS_300
int xdir, ydir;
if(srcx < dstx) xdir = 0;
else xdir = 1;
if(srcy < dsty) ydir = 0;
else ydir = 1;
CRITBEGIN
SiS300SetupForScreenToScreenCopy(ivideo, xdir, ydir, 3, -1);
SiS300SubsequentScreenToScreenCopy(ivideo, srcx, srcy, dstx, dsty, width, height);
CRITEND
SiS300Sync(ivideo);
#endif
} else {
#ifdef CONFIG_FB_SIS_315
CRITBEGIN
SiS310SetupForScreenToScreenCopy(ivideo, 3, -1);
SiS310SubsequentScreenToScreenCopy(ivideo, srcx, srcy, dstx, dsty, width, height);
CRITEND
SiS310Sync(ivideo);
#endif
}
}
static void fbcon_sis_clear(struct vc_data *conp, struct display *p,
int srcy, int srcx, int height, int width, int color)
{
struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par;
CRITFLAGS
srcx *= fontwidth(p);
srcy *= fontheight(p);
width *= fontwidth(p);
height *= fontheight(p);
if(ivideo->sisvga_engine == SIS_300_VGA) {
#ifdef CONFIG_FB_SIS_300
CRITBEGIN
SiS300SetupForSolidFill(ivideo, color, 3);
SiS300SubsequentSolidFillRect(ivideo, srcx, srcy, width, height);
CRITEND
SiS300Sync(ivideo);
#endif
} else {
#ifdef CONFIG_FB_SIS_315
CRITBEGIN
SiS310SetupForSolidFill(ivideo, color, 3);
SiS310SubsequentSolidFillRect(ivideo, srcx, srcy, width, height);
CRITEND
SiS310Sync(ivideo);
#endif
}
}
void fbcon_sis_clear8(struct vc_data *conp, struct display *p,
int srcy, int srcx, int height, int width)
{
struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par;
u32 bgx;
if(!ivideo->accel) {
#ifdef FBCON_HAS_CFB8
fbcon_cfb8_clear(conp, p, srcy, srcx, height, width);
#endif
return;
}
bgx = attr_bgcol_ec(p, conp);
fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
}
void fbcon_sis_clear16(struct vc_data *conp, struct display *p,
int srcy, int srcx, int height, int width)
{
struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par;
u32 bgx;
if(!ivideo->accel) {
#ifdef FBCON_HAS_CFB16
fbcon_cfb16_clear(conp, p, srcy, srcx, height, width);
#endif
return;
}
bgx = ((u_int16_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
}
void fbcon_sis_clear32(struct vc_data *conp, struct display *p,
int srcy, int srcx, int height, int width)
{
struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par;
u32 bgx;
if(!ivideo->accel) {
#ifdef FBCON_HAS_CFB32
fbcon_cfb32_clear(conp, p, srcy, srcx, height, width);
#endif
return;
}
bgx = ((u_int32_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
}
void fbcon_sis_revc(struct display *p, int srcx, int srcy)
{
struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par;
CRITFLAGS
if(!ivideo->accel) {
switch(ivideo->video_bpp) {
case 16:
#ifdef FBCON_HAS_CFB16
fbcon_cfb16_revc(p, srcx, srcy);
#endif
break;
case 32:
#ifdef FBCON_HAS_CFB32
fbcon_cfb32_revc(p, srcx, srcy);
#endif
break;
}
return;
}
srcx *= fontwidth(p);
srcy *= fontheight(p);
if(ivideo->sisvga_engine == SIS_300_VGA) {
#ifdef CONFIG_FB_SIS_300
CRITBEGIN
SiS300SetupForSolidFill(ivideo, 0, 0x0a);
SiS300SubsequentSolidFillRect(ivideo, srcx, srcy, fontwidth(p), fontheight(p));
CRITEND
SiS300Sync(ivideo);
#endif
} else {
#ifdef CONFIG_FB_SIS_315
CRITBEGIN
SiS310SetupForSolidFill(ivideo, 0, 0x0a);
SiS310SubsequentSolidFillRect(ivideo, srcx, srcy, fontwidth(p), fontheight(p));
CRITEND
SiS310Sync(ivideo);
#endif
}
}
#ifdef FBCON_HAS_CFB8
struct display_switch fbcon_sis8 = {
.setup = fbcon_cfb8_setup,
.bmove = fbcon_sis_bmove,
.clear = fbcon_sis_clear8,
.putc = fbcon_cfb8_putc,
.putcs = fbcon_cfb8_putcs,
.revc = fbcon_cfb8_revc,
.clear_margins = fbcon_cfb8_clear_margins,
.fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
};
#endif
#ifdef FBCON_HAS_CFB16
struct display_switch fbcon_sis16 = {
.setup = fbcon_cfb16_setup,
.bmove = fbcon_sis_bmove,
.clear = fbcon_sis_clear16,
.putc = fbcon_cfb16_putc,
.putcs = fbcon_cfb16_putcs,
.revc = fbcon_sis_revc,
.clear_margins = fbcon_cfb16_clear_margins,
.fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
};
#endif
#ifdef FBCON_HAS_CFB32
struct display_switch fbcon_sis32 = {
.setup = fbcon_cfb32_setup,
.bmove = fbcon_sis_bmove,
.clear = fbcon_sis_clear32,
.putc = fbcon_cfb32_putc,
.putcs = fbcon_cfb32_putcs,
.revc = fbcon_sis_revc,
.clear_margins = fbcon_cfb32_clear_margins,
.fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
};
#endif
#include "sisfb_accel_2_4.h"
#endif /* KERNEL VERSION */

View File

@ -1,6 +1,8 @@
/*
* SiS 300/630/730/540/315/550/650/740 frame buffer driver
* for Linux kernels 2.4.x and 2.5.x
* SiS 300/540/630[S]/730[S],
* SiS 315[E|PRO]/550/[M]650/651/[M]661[F|M]X/740/[M]741[GX]/330/[M]760[GX],
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
*
* 2D acceleration part
*
@ -283,6 +285,8 @@
{ \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
CmdQueLen = 0; \
}
@ -402,6 +406,7 @@ void fbcon_sis_clear32(struct vc_data *conp, struct display *p, int srcy,
int srcx, int height, int width);
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34)
int fbcon_sis_sync(struct fb_info *info);
void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area);
#endif

File diff suppressed because it is too large Load Diff

View File

@ -1,9 +1,10 @@
/*
* SiS 300/305/540/630(S)/730(S)
* SiS 315(H/PRO)/55x/(M)65x/(M)661(F/M)X/740/741(GX)/330/(M)760
* SiS 300/305/540/630(S)/730(S),
* SiS 315[E|PRO]/550/[M]65x/[M]66x[F|M|G]X/[M]74x[GX]/330/[M]76x[GX],
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
*
* Copyright (C) 2001-2004 Thomas Winischhofer, Vienna, Austria.
* Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -23,13 +24,9 @@
#ifndef _SISFB_MAIN
#define _SISFB_MAIN
#include <linux/spinlock.h>
#include "vstruct.h"
#include "sis.h"
#define MODE_INDEX_NONE 0 /* index for mode=none */
/* Fbcon stuff */
static struct fb_var_screeninfo my_default_var = {
.xres = 0,
@ -60,6 +57,8 @@ static struct fb_var_screeninfo my_default_var = {
.vmode = FB_VMODE_NONINTERLACED,
};
#define MODE_INDEX_NONE 0 /* index for mode=none */
/* Boot-time parameters */
static int sisfb_off = 0;
static int sisfb_parm_mem = 0;
@ -93,7 +92,6 @@ static int sisfb_tvplug = -1; /* Tv plug type (for overriding autodetection) */
static int sisfb_tvstd = -1;
static int sisfb_tvxposoffset = 0;
static int sisfb_tvyposoffset = 0;
static int sisfb_filter = -1;
static int sisfb_nocrt2rate = 0;
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
static int sisfb_inverse = 0;
@ -106,12 +104,12 @@ static int sisfb_videoram = 0;
/* List of supported chips */
static struct sisfb_chip_info {
int chip;
int vgaengine;
int chip;
int vgaengine;
int mni;
int hwcursor_size;
int hwcursor_size;
int CRT2_write_enable;
const char *chip_name;
const char *chip_name;
} sisfb_chip_info[] __devinitdata = {
{ SIS_300, SIS_300_VGA, 0, HW_CURSOR_AREA_SIZE_300 * 2, SIS_CRT2_WENABLE_300, "SiS 300/305" },
{ SIS_540, SIS_300_VGA, 0, HW_CURSOR_AREA_SIZE_300 * 2, SIS_CRT2_WENABLE_300, "SiS 540" },
@ -123,6 +121,8 @@ static struct sisfb_chip_info {
{ SIS_650, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 650" },
{ SIS_330, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 330" },
{ SIS_660, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 660" },
{ XGI_20, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "XGI Z7" },
{ XGI_40, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "XGI V3XT/V5/V8" },
};
static struct pci_device_id __devinitdata sisfb_pci_table[] = {
@ -139,6 +139,8 @@ static struct pci_device_id __devinitdata sisfb_pci_table[] = {
{ PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650_VGA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7},
{ PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_330, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8},
{ PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_660_VGA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9},
{ PCI_VENDOR_ID_XGI,PCI_DEVICE_ID_XGI_20, PCI_ANY_ID, PCI_ANY_ID, 0, 0,10},
{ PCI_VENDOR_ID_XGI,PCI_DEVICE_ID_XGI_40, PCI_ANY_ID, PCI_ANY_ID, 0, 0,11},
#endif
{ 0 }
};
@ -147,13 +149,12 @@ MODULE_DEVICE_TABLE(pci, sisfb_pci_table);
static struct sis_video_info *card_list = NULL;
/* TODO: This is not handled card-wise because the DRM
does not refer to a unique fb when calling sis_alloc
or sis_free. Therefore, this is handled globally for
now (hoping that nobody is crazy enough to run two
SiS cards at the same time).
/* The memory heap is now handled card-wise, by using
sis_malloc_new/sis_free_new. However, the DRM does
not do this yet. Until it does, we keep a "global"
heap which is actually the first card's one.
*/
static SIS_HEAP sisfb_heap;
static struct SIS_HEAP *sisfb_heap;
#define MD_SIS300 1
#define MD_SIS315 2
@ -181,8 +182,10 @@ static const struct _sisbios_mode {
{"320x240x16", {0x56,0x56}, 0x0135, 0x0000, 320, 240, 16, 1, 40, 15, MD_SIS300|MD_SIS315},
{"320x240x24", {0x53,0x53}, 0x0000, 0x0000, 320, 240, 32, 1, 40, 15, MD_SIS300|MD_SIS315},
{"320x240x32", {0x53,0x53}, 0x0000, 0x0000, 320, 240, 32, 1, 40, 15, MD_SIS300|MD_SIS315},
{"320x240x8", {0x5a,0x5a}, 0x0132, 0x0000, 320, 480, 8, 1, 40, 30, MD_SIS315}, /* FSTN */
/*10*/ {"320x240x16", {0x5b,0x5b}, 0x0135, 0x0000, 320, 480, 16, 1, 40, 30, MD_SIS315}, /* FSTN */
#define MODE_FSTN_8 9
#define MODE_FSTN_16 10
{"320x240x8", {0x5a,0x5a}, 0x0132, 0x0000, 320, 240, 8, 1, 40, 15, MD_SIS315}, /* FSTN */
/*10*/ {"320x240x16", {0x5b,0x5b}, 0x0135, 0x0000, 320, 240, 16, 1, 40, 15, MD_SIS315}, /* FSTN */
{"400x300x8", {0x51,0x51}, 0x0133, 0x0000, 400, 300, 8, 1, 50, 18, MD_SIS300|MD_SIS315},
{"400x300x16", {0x57,0x57}, 0x0136, 0x0000, 400, 300, 16, 1, 50, 18, MD_SIS300|MD_SIS315},
{"400x300x24", {0x54,0x54}, 0x0000, 0x0000, 400, 300, 32, 1, 50, 18, MD_SIS300|MD_SIS315},
@ -215,18 +218,20 @@ static const struct _sisbios_mode {
/*40*/ {"800x480x16", {0x7a,0x7a}, 0x0000, 0x0000, 800, 480, 16, 1, 100, 30, MD_SIS300|MD_SIS315},
{"800x480x24", {0x76,0x76}, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_SIS300|MD_SIS315},
{"800x480x32", {0x76,0x76}, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_SIS300|MD_SIS315},
#define DEFAULT_MODE 43 /* index for 800x600x8 */
#define DEFAULT_LCDMODE 43 /* index for 800x600x8 */
#define DEFAULT_TVMODE 43 /* index for 800x600x8 */
#define DEFAULT_MODE 43 /* index for 800x600x8 */
#define DEFAULT_LCDMODE 43 /* index for 800x600x8 */
#define DEFAULT_TVMODE 43 /* index for 800x600x8 */
{"800x600x8", {0x30,0x30}, 0x0103, 0x0103, 800, 600, 8, 2, 100, 37, MD_SIS300|MD_SIS315},
{"800x600x16", {0x47,0x47}, 0x0114, 0x0114, 800, 600, 16, 2, 100, 37, MD_SIS300|MD_SIS315},
{"800x600x24", {0x63,0x63}, 0x013b, 0x0115, 800, 600, 32, 2, 100, 37, MD_SIS300|MD_SIS315},
{"800x600x32", {0x63,0x63}, 0x013b, 0x0115, 800, 600, 32, 2, 100, 37, MD_SIS300|MD_SIS315},
{"848x480x8", {0x39,0x39}, 0x0000, 0x0000, 848, 480, 8, 2, 106, 30, MD_SIS300|MD_SIS315},
#define DEFAULT_MODE_848 48
{"848x480x16", {0x3b,0x3b}, 0x0000, 0x0000, 848, 480, 16, 2, 106, 30, MD_SIS300|MD_SIS315},
{"848x480x24", {0x3e,0x3e}, 0x0000, 0x0000, 848, 480, 32, 2, 106, 30, MD_SIS300|MD_SIS315},
/*50*/ {"848x480x32", {0x3e,0x3e}, 0x0000, 0x0000, 848, 480, 32, 2, 106, 30, MD_SIS300|MD_SIS315},
{"856x480x8", {0x3f,0x3f}, 0x0000, 0x0000, 856, 480, 8, 2, 107, 30, MD_SIS300|MD_SIS315},
#define DEFAULT_MODE_856 52
{"856x480x16", {0x42,0x42}, 0x0000, 0x0000, 856, 480, 16, 2, 107, 30, MD_SIS300|MD_SIS315},
{"856x480x24", {0x45,0x45}, 0x0000, 0x0000, 856, 480, 32, 2, 107, 30, MD_SIS300|MD_SIS315},
{"856x480x32", {0x45,0x45}, 0x0000, 0x0000, 856, 480, 32, 2, 107, 30, MD_SIS300|MD_SIS315},
@ -270,42 +275,47 @@ static const struct _sisbios_mode {
{"1280x800x16", {0x15,0x15}, 0x0000, 0x0000, 1280, 800, 16, 1, 160, 50, MD_SIS315},
{"1280x800x24", {0x16,0x16}, 0x0000, 0x0000, 1280, 800, 32, 1, 160, 50, MD_SIS315},
{"1280x800x32", {0x16,0x16}, 0x0000, 0x0000, 1280, 800, 32, 1, 160, 50, MD_SIS315},
{"1280x854x8", {0x14,0x14}, 0x0000, 0x0000, 1280, 854, 8, 1, 160, 53, MD_SIS315},
{"1280x854x16", {0x15,0x15}, 0x0000, 0x0000, 1280, 854, 16, 1, 160, 53, MD_SIS315},
{"1280x854x24", {0x16,0x16}, 0x0000, 0x0000, 1280, 854, 32, 1, 160, 53, MD_SIS315},
{"1280x854x32", {0x16,0x16}, 0x0000, 0x0000, 1280, 854, 32, 1, 160, 53, MD_SIS315},
{"1280x960x8", {0x7c,0x7c}, 0x0000, 0x0000, 1280, 960, 8, 1, 160, 60, MD_SIS300|MD_SIS315},
{"1280x960x16", {0x7d,0x7d}, 0x0000, 0x0000, 1280, 960, 16, 1, 160, 60, MD_SIS300|MD_SIS315},
/*100*/ {"1280x960x16", {0x7d,0x7d}, 0x0000, 0x0000, 1280, 960, 16, 1, 160, 60, MD_SIS300|MD_SIS315},
{"1280x960x24", {0x7e,0x7e}, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_SIS300|MD_SIS315},
{"1280x960x32", {0x7e,0x7e}, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_SIS300|MD_SIS315},
{"1280x1024x8", {0x3a,0x3a}, 0x0107, 0x0107, 1280, 1024, 8, 2, 160, 64, MD_SIS300|MD_SIS315},
/*100*/ {"1280x1024x16", {0x4d,0x4d}, 0x011a, 0x011a, 1280, 1024, 16, 2, 160, 64, MD_SIS300|MD_SIS315},
{"1280x1024x16", {0x4d,0x4d}, 0x011a, 0x011a, 1280, 1024, 16, 2, 160, 64, MD_SIS300|MD_SIS315},
{"1280x1024x24", {0x65,0x65}, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315},
{"1280x1024x32", {0x65,0x65}, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315},
{"1360x768x8", {0x48,0x48}, 0x0000, 0x0000, 1360, 768, 8, 1, 170, 48, MD_SIS300|MD_SIS315},
{"1360x768x16", {0x4b,0x4b}, 0x0000, 0x0000, 1360, 768, 16, 1, 170, 48, MD_SIS300|MD_SIS315},
{"1360x768x24", {0x4e,0x4e}, 0x0000, 0x0000, 1360, 768, 32, 1, 170, 48, MD_SIS300|MD_SIS315},
{"1360x768x32", {0x4e,0x4e}, 0x0000, 0x0000, 1360, 768, 32, 1, 170, 48, MD_SIS300|MD_SIS315},
/*110*/ {"1360x768x32", {0x4e,0x4e}, 0x0000, 0x0000, 1360, 768, 32, 1, 170, 48, MD_SIS300|MD_SIS315},
{"1360x1024x8", {0x67,0x67}, 0x0000, 0x0000, 1360, 1024, 8, 1, 170, 64, MD_SIS300 },
#define DEFAULT_MODE_1360 112
{"1360x1024x16", {0x6f,0x6f}, 0x0000, 0x0000, 1360, 1024, 16, 1, 170, 64, MD_SIS300 },
{"1360x1024x24", {0x72,0x72}, 0x0000, 0x0000, 1360, 1024, 32, 1, 170, 64, MD_SIS300 },
/*110*/ {"1360x1024x32", {0x72,0x72}, 0x0000, 0x0000, 1360, 1024, 32, 1, 170, 64, MD_SIS300 },
{"1360x1024x32", {0x72,0x72}, 0x0000, 0x0000, 1360, 1024, 32, 1, 170, 64, MD_SIS300 },
{"1400x1050x8", {0x26,0x26}, 0x0000, 0x0000, 1400, 1050, 8, 1, 175, 65, MD_SIS315},
{"1400x1050x16", {0x27,0x27}, 0x0000, 0x0000, 1400, 1050, 16, 1, 175, 65, MD_SIS315},
{"1400x1050x24", {0x28,0x28}, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_SIS315},
{"1400x1050x32", {0x28,0x28}, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_SIS315},
{"1600x1200x8", {0x3c,0x3c}, 0x0130, 0x011c, 1600, 1200, 8, 1, 200, 75, MD_SIS300|MD_SIS315},
{"1600x1200x16", {0x3d,0x3d}, 0x0131, 0x011e, 1600, 1200, 16, 1, 200, 75, MD_SIS300|MD_SIS315},
/*120*/ {"1600x1200x16", {0x3d,0x3d}, 0x0131, 0x011e, 1600, 1200, 16, 1, 200, 75, MD_SIS300|MD_SIS315},
{"1600x1200x24", {0x66,0x66}, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315},
{"1600x1200x32", {0x66,0x66}, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315},
{"1680x1050x8", {0x17,0x17}, 0x0000, 0x0000, 1680, 1050, 8, 1, 210, 65, MD_SIS315},
/*120*/ {"1680x1050x16", {0x18,0x18}, 0x0000, 0x0000, 1680, 1050, 16, 1, 210, 65, MD_SIS315},
{"1680x1050x16", {0x18,0x18}, 0x0000, 0x0000, 1680, 1050, 16, 1, 210, 65, MD_SIS315},
{"1680x1050x24", {0x19,0x19}, 0x0000, 0x0000, 1680, 1050, 32, 1, 210, 65, MD_SIS315},
{"1680x1050x32", {0x19,0x19}, 0x0000, 0x0000, 1680, 1050, 32, 1, 210, 65, MD_SIS315},
{"1920x1080x8", {0x2c,0x2c}, 0x0000, 0x0000, 1920, 1080, 8, 1, 240, 67, MD_SIS315},
{"1920x1080x16", {0x2d,0x2d}, 0x0000, 0x0000, 1920, 1080, 16, 1, 240, 67, MD_SIS315},
{"1920x1080x24", {0x73,0x73}, 0x0000, 0x0000, 1920, 1080, 32, 1, 240, 67, MD_SIS315},
{"1920x1080x32", {0x73,0x73}, 0x0000, 0x0000, 1920, 1080, 32, 1, 240, 67, MD_SIS315},
/*130*/ {"1920x1080x32", {0x73,0x73}, 0x0000, 0x0000, 1920, 1080, 32, 1, 240, 67, MD_SIS315},
{"1920x1440x8", {0x68,0x68}, 0x013f, 0x0000, 1920, 1440, 8, 1, 240, 75, MD_SIS300|MD_SIS315},
{"1920x1440x16", {0x69,0x69}, 0x0140, 0x0000, 1920, 1440, 16, 1, 240, 75, MD_SIS300|MD_SIS315},
{"1920x1440x24", {0x6b,0x6b}, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315},
/*130*/ {"1920x1440x32", {0x6b,0x6b}, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315},
{"1920x1440x32", {0x6b,0x6b}, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315},
{"2048x1536x8", {0x6c,0x6c}, 0x0000, 0x0000, 2048, 1536, 8, 1, 256, 96, MD_SIS315},
{"2048x1536x16", {0x6d,0x6d}, 0x0000, 0x0000, 2048, 1536, 16, 1, 256, 96, MD_SIS315},
{"2048x1536x24", {0x6e,0x6e}, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_SIS315},
@ -313,13 +323,13 @@ static const struct _sisbios_mode {
{"\0", {0x00,0x00}, 0, 0, 0, 0, 0, 0, 0}
};
#define SIS_LCD_NUMBER 17
static const struct _sis_lcd_data {
#define SIS_LCD_NUMBER 18
static struct _sis_lcd_data {
u32 lcdtype;
u16 xres;
u16 yres;
u8 default_mode_idx;
} sis_lcd_data[] = {
} sis_lcd_data[] __devinitdata = {
{ LCD_640x480, 640, 480, 23 },
{ LCD_800x600, 800, 600, 43 },
{ LCD_1024x600, 1024, 600, 67 },
@ -329,34 +339,38 @@ static const struct _sis_lcd_data {
{ LCD_1280x720, 1280, 720, 83 },
{ LCD_1280x768, 1280, 768, 87 },
{ LCD_1280x800, 1280, 800, 91 },
{ LCD_1280x960, 1280, 960, 95 },
{ LCD_1280x1024, 1280, 1024, 99 },
{ LCD_1400x1050, 1400, 1050, 111 },
{ LCD_1680x1050, 1680, 1050, 119 },
{ LCD_1600x1200, 1600, 1200, 115 },
{ LCD_640x480_2, 640, 480, 23 },
{ LCD_640x480_3, 640, 480, 23 },
{ LCD_320x480, 320, 480, 9 },
{ LCD_1280x854, 1280, 854, 95 },
{ LCD_1280x960, 1280, 960, 99 },
{ LCD_1280x1024, 1280, 1024, 103 },
{ LCD_1400x1050, 1400, 1050, 115 },
{ LCD_1680x1050, 1680, 1050, 123 },
{ LCD_1600x1200, 1600, 1200, 119 },
{ LCD_320x240_2, 320, 240, 9 },
{ LCD_320x240_3, 320, 240, 9 },
{ LCD_320x240, 320, 240, 9 },
};
/* CR36 evaluation */
static const USHORT sis300paneltype[] =
{ LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
LCD_1280x960, LCD_640x480, LCD_1024x600, LCD_1152x768,
LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN,
LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN };
static unsigned short sis300paneltype[] __devinitdata = {
LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
LCD_1280x960, LCD_640x480, LCD_1024x600, LCD_1152x768,
LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN,
LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN
};
static const USHORT sis310paneltype[] =
{ LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
LCD_1152x768, LCD_1400x1050, LCD_1280x768, LCD_1600x1200,
LCD_640x480_2, LCD_640x480_3, LCD_UNKNOWN, LCD_UNKNOWN };
static unsigned short sis310paneltype[] __devinitdata = {
LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
LCD_1152x768, LCD_1400x1050, LCD_1280x768, LCD_1600x1200,
LCD_320x240_2, LCD_320x240_3, LCD_UNKNOWN, LCD_UNKNOWN
};
static const USHORT sis661paneltype[] =
{ LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
LCD_1152x768, LCD_1400x1050, LCD_1280x768, LCD_1600x1200,
LCD_1280x800, LCD_1680x1050, LCD_1280x720, LCD_UNKNOWN };
static unsigned short sis661paneltype[] __devinitdata = {
LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
LCD_1280x854, LCD_1400x1050, LCD_1280x768, LCD_1600x1200,
LCD_1280x800, LCD_1680x1050, LCD_1280x720, LCD_UNKNOWN
};
#define FL_550_DSTN 0x01
#define FL_550_FSTN 0x02
@ -413,7 +427,6 @@ static const struct _sis_vrate {
} sisfb_vrate[] = {
{1, 320, 200, 70, TRUE},
{1, 320, 240, 60, TRUE},
{1, 320, 480, 60, TRUE},
{1, 400, 300, 60, TRUE},
{1, 512, 384, 60, TRUE},
{1, 640, 400, 72, TRUE},
@ -437,10 +450,11 @@ static const struct _sis_vrate {
{4, 1024, 768, 75, FALSE}, {5, 1024, 768, 85, TRUE}, {6, 1024, 768, 100, TRUE},
{7, 1024, 768, 120, TRUE},
{1, 1152, 768, 60, TRUE},
{1, 1152, 864, 60, TRUE}, {1, 1152, 864, 75, TRUE}, {2, 1152, 864, 84, TRUE},
{1, 1152, 864, 60, TRUE}, {2, 1152, 864, 75, TRUE}, {3, 1152, 864, 84, TRUE},
{1, 1280, 720, 60, TRUE}, {2, 1280, 720, 75, TRUE}, {3, 1280, 720, 85, TRUE},
{1, 1280, 768, 60, TRUE},
{1, 1280, 800, 60, TRUE},
{1, 1280, 854, 60, TRUE},
{1, 1280, 960, 60, TRUE}, {2, 1280, 960, 85, TRUE},
{1, 1280, 1024, 43, TRUE}, {2, 1280, 1024, 60, TRUE}, {3, 1280, 1024, 75, TRUE},
{4, 1280, 1024, 85, TRUE},
@ -459,12 +473,12 @@ static const struct _sis_vrate {
{0, 0, 0, 0, FALSE}
};
static const struct _sisfbddcsmodes {
static struct _sisfbddcsmodes {
u32 mask;
u16 h;
u16 v;
u32 d;
} sisfb_ddcsmodes[] = {
} sisfb_ddcsmodes[] __devinitdata = {
{ 0x10000, 67, 75, 108000},
{ 0x08000, 48, 72, 50000},
{ 0x04000, 46, 75, 49500},
@ -480,49 +494,49 @@ static const struct _sisfbddcsmodes {
{ 0x00001, 38, 60, 40000}
};
static const struct _sisfbddcfmodes {
static struct _sisfbddcfmodes {
u16 x;
u16 y;
u16 v;
u16 h;
u32 d;
} sisfb_ddcfmodes[] = {
{ 1280, 1024, 85, 92, 157500},
{ 1600, 1200, 60, 75, 162000},
{ 1600, 1200, 65, 82, 175500},
{ 1600, 1200, 70, 88, 189000},
{ 1600, 1200, 75, 94, 202500},
{ 1600, 1200, 85, 107,229500},
{ 1920, 1440, 60, 90, 234000},
{ 1920, 1440, 75, 113,297000}
} sisfb_ddcfmodes[] __devinitdata = {
{ 1280, 1024, 85, 92, 157500},
{ 1600, 1200, 60, 75, 162000},
{ 1600, 1200, 65, 82, 175500},
{ 1600, 1200, 70, 88, 189000},
{ 1600, 1200, 75, 94, 202500},
{ 1600, 1200, 85, 107,229500},
{ 1920, 1440, 60, 90, 234000},
{ 1920, 1440, 75, 113,297000}
};
#ifdef CONFIG_FB_SIS_300
static struct _chswtable {
u16 subsysVendor;
u16 subsysCard;
char *vendorName;
char *cardName;
u16 subsysVendor;
u16 subsysCard;
char *vendorName;
char *cardName;
} mychswtable[] __devinitdata = {
{ 0x1631, 0x1002, "Mitachi", "0x1002" },
{ 0x1631, 0x1002, "Mitachi", "0x1002" },
{ 0x1071, 0x7521, "Mitac" , "7521P" },
{ 0, 0, "" , "" }
};
#endif
static struct _customttable {
u16 chipID;
char *biosversion;
char *biosdate;
u32 bioschksum;
u16 biosFootprintAddr[5];
u8 biosFootprintData[5];
u16 pcisubsysvendor;
u16 pcisubsyscard;
char *vendorName;
char *cardName;
u32 SpecialID;
char *optionName;
u16 chipID;
char *biosversion;
char *biosdate;
u32 bioschksum;
u16 biosFootprintAddr[5];
u8 biosFootprintData[5];
u16 pcisubsysvendor;
u16 pcisubsyscard;
char *vendorName;
char *cardName;
u32 SpecialID;
char *optionName;
} mycustomttable[] __devinitdata = {
{ SIS_630, "2.00.07", "09/27/2002-13:38:25",
0x3240A8,
@ -643,6 +657,13 @@ static struct _customttable {
0, 0,
"Generic", "LVDS/Parallel 848x480", CUT_PANEL848, "PANEL848x480"
},
{ 4322, "", "", /* never autodetected */
0,
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0, 0,
"Generic", "LVDS/Parallel 856x480", CUT_PANEL856, "PANEL856x480"
},
{ 0, "", "",
0,
{ 0, 0, 0, 0 },
@ -652,155 +673,6 @@ static struct _customttable {
}
};
static const struct _sis_TV_filter {
u8 filter[9][4];
} sis_TV_filter[] = {
{ {{0x00,0x00,0x00,0x40}, /* NTSCFilter_0 */
{0x00,0xE0,0x10,0x60},
{0x00,0xEE,0x10,0x44},
{0x00,0xF4,0x10,0x38},
{0xF8,0xF4,0x18,0x38},
{0xFC,0xFB,0x14,0x2A},
{0x00,0x00,0x10,0x20},
{0x00,0x04,0x10,0x18},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* NTSCFilter_1 */
{0x00,0xE0,0x10,0x60},
{0x00,0xEE,0x10,0x44},
{0x00,0xF4,0x10,0x38},
{0xF8,0xF4,0x18,0x38},
{0xFC,0xFB,0x14,0x2A},
{0x00,0x00,0x10,0x20},
{0x00,0x04,0x10,0x18},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* NTSCFilter_2 */
{0xF5,0xEE,0x1B,0x44},
{0xF8,0xF4,0x18,0x38},
{0xEB,0x04,0x25,0x18},
{0xF1,0x05,0x1F,0x16},
{0xF6,0x06,0x1A,0x14},
{0xFA,0x06,0x16,0x14},
{0x00,0x04,0x10,0x18},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* NTSCFilter_3 */
{0xF1,0x04,0x1F,0x18},
{0xEE,0x0D,0x22,0x06},
{0xF7,0x06,0x19,0x14},
{0xF4,0x0B,0x1C,0x0A},
{0xFA,0x07,0x16,0x12},
{0xF9,0x0A,0x17,0x0C},
{0x00,0x07,0x10,0x12},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* NTSCFilter_4 - 320 */
{0x00,0xE0,0x10,0x60},
{0x00,0xEE,0x10,0x44},
{0x00,0xF4,0x10,0x38},
{0xF8,0xF4,0x18,0x38},
{0xFC,0xFB,0x14,0x2A},
{0x00,0x00,0x10,0x20},
{0x00,0x04,0x10,0x18},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* NTSCFilter_5 - 640 */
{0xF5,0xEE,0x1B,0x44},
{0xF8,0xF4,0x18,0x38},
{0xEB,0x04,0x25,0x18},
{0xF1,0x05,0x1F,0x16},
{0xF6,0x06,0x1A,0x14},
{0xFA,0x06,0x16,0x14},
{0x00,0x04,0x10,0x18},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* NTSCFilter_6 - 720 */
{0xEB,0x04,0x25,0x18},
{0xE7,0x0E,0x29,0x04},
{0xEE,0x0C,0x22,0x08},
{0xF6,0x0B,0x1A,0x0A},
{0xF9,0x0A,0x17,0x0C},
{0xFC,0x0A,0x14,0x0C},
{0x00,0x08,0x10,0x10},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* NTSCFilter_7 - 800 */
{0xEC,0x02,0x24,0x1C},
{0xF2,0x04,0x1E,0x18},
{0xEB,0x15,0x25,0xF6},
{0xF4,0x10,0x1C,0x00},
{0xF8,0x0F,0x18,0x02},
{0x00,0x04,0x10,0x18},
{0x01,0x06,0x0F,0x14},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* PALFilter_0 */
{0x00,0xE0,0x10,0x60},
{0x00,0xEE,0x10,0x44},
{0x00,0xF4,0x10,0x38},
{0xF8,0xF4,0x18,0x38},
{0xFC,0xFB,0x14,0x2A},
{0x00,0x00,0x10,0x20},
{0x00,0x04,0x10,0x18},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* PALFilter_1 */
{0x00,0xE0,0x10,0x60},
{0x00,0xEE,0x10,0x44},
{0x00,0xF4,0x10,0x38},
{0xF8,0xF4,0x18,0x38},
{0xFC,0xFB,0x14,0x2A},
{0x00,0x00,0x10,0x20},
{0x00,0x04,0x10,0x18},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* PALFilter_2 */
{0xF5,0xEE,0x1B,0x44},
{0xF8,0xF4,0x18,0x38},
{0xF1,0xF7,0x01,0x32},
{0xF5,0xFB,0x1B,0x2A},
{0xF9,0xFF,0x17,0x22},
{0xFB,0x01,0x15,0x1E},
{0x00,0x04,0x10,0x18},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* PALFilter_3 */
{0xF5,0xFB,0x1B,0x2A},
{0xEE,0xFE,0x22,0x24},
{0xF3,0x00,0x1D,0x20},
{0xF9,0x03,0x17,0x1A},
{0xFB,0x02,0x14,0x1E},
{0xFB,0x04,0x15,0x18},
{0x00,0x06,0x10,0x14},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* PALFilter_4 - 320 */
{0x00,0xE0,0x10,0x60},
{0x00,0xEE,0x10,0x44},
{0x00,0xF4,0x10,0x38},
{0xF8,0xF4,0x18,0x38},
{0xFC,0xFB,0x14,0x2A},
{0x00,0x00,0x10,0x20},
{0x00,0x04,0x10,0x18},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* PALFilter_5 - 640 */
{0xF5,0xEE,0x1B,0x44},
{0xF8,0xF4,0x18,0x38},
{0xF1,0xF7,0x1F,0x32},
{0xF5,0xFB,0x1B,0x2A},
{0xF9,0xFF,0x17,0x22},
{0xFB,0x01,0x15,0x1E},
{0x00,0x04,0x10,0x18},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* PALFilter_6 - 720 */
{0xF5,0xEE,0x1B,0x2A},
{0xEE,0xFE,0x22,0x24},
{0xF3,0x00,0x1D,0x20},
{0xF9,0x03,0x17,0x1A},
{0xFB,0x02,0x14,0x1E},
{0xFB,0x04,0x15,0x18},
{0x00,0x06,0x10,0x14},
{0xFF,0xFF,0xFF,0xFF} }},
{ {{0x00,0x00,0x00,0x40}, /* PALFilter_7 - 800 */
{0xF5,0xEE,0x1B,0x44},
{0xF8,0xF4,0x18,0x38},
{0xFC,0xFB,0x14,0x2A},
{0xEB,0x05,0x25,0x16},
{0xF1,0x05,0x1F,0x16},
{0xFA,0x07,0x16,0x12},
{0x00,0x07,0x10,0x12},
{0xFF,0xFF,0xFF,0xFF} }}
};
/* ---------------------- Prototypes ------------------------- */
/* Interface used by the world */
@ -811,145 +683,159 @@ SISINITSTATIC int sisfb_setup(char *options);
/* Interface to the low level console driver */
SISINITSTATIC int sisfb_init(void);
/* fbdev routines */
static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
struct fb_info *info);
static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
struct fb_info *info);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
static int sisfb_get_fix(struct fb_fix_screeninfo *fix,
int con,
struct fb_info *info);
static int sisfb_get_var(struct fb_var_screeninfo *var,
int con,
struct fb_info *info);
static int sisfb_set_var(struct fb_var_screeninfo *var,
int con,
struct fb_info *info);
static void sisfb_crtc_to_var(struct sis_video_info *ivideo,
struct fb_var_screeninfo *var);
static int sisfb_get_cmap(struct fb_cmap *cmap,
int kspc,
int con,
struct fb_info *info);
static int sisfb_set_cmap(struct fb_cmap *cmap,
int kspc,
int con,
struct fb_info *info);
static int sisfb_update_var(int con,
struct fb_info *info);
static int sisfb_switch(int con,
static int sisfb_get_fix(struct fb_fix_screeninfo *fix,
int con,
struct fb_info *info);
static int sisfb_get_var(struct fb_var_screeninfo *var,
int con,
struct fb_info *info);
static int sisfb_set_var(struct fb_var_screeninfo *var,
int con,
struct fb_info *info);
static void sisfb_crtc_to_var(struct sis_video_info *ivideo,
struct fb_var_screeninfo *var);
static int sisfb_get_cmap(struct fb_cmap *cmap,
int kspc,
int con,
struct fb_info *info);
static int sisfb_set_cmap(struct fb_cmap *cmap,
int kspc,
int con,
struct fb_info *info);
static int sisfb_update_var(int con,
struct fb_info *info);
static int sisfb_switch(int con,
struct fb_info *info);
static void sisfb_blank(int blank,
struct fb_info *info);
static void sisfb_set_disp(int con,
struct fb_var_screeninfo *var,
struct fb_info *info);
static int sis_getcolreg(unsigned regno, unsigned *red, unsigned *green,
unsigned *blue, unsigned *transp,
struct fb_info *fb_info);
static void sisfb_do_install_cmap(int con,
struct fb_info *info);
static int sisfb_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg, int con,
struct fb_info *info);
#endif
static void sisfb_blank(int blank,
struct fb_info *info);
static void sisfb_set_disp(int con,
struct fb_var_screeninfo *var,
struct fb_info *info);
static int sis_getcolreg(unsigned regno, unsigned *red, unsigned *green,
unsigned *blue, unsigned *transp,
struct fb_info *fb_info);
static void sisfb_do_install_cmap(int con,
struct fb_info *info);
static int sisfb_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg, int con,
struct fb_info *info);
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
static int sisfb_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg,
struct fb_info *info);
static int sisfb_set_par(struct fb_info *info);
static int sisfb_blank(int blank,
struct fb_info *info);
extern void fbcon_sis_fillrect(struct fb_info *info,
const struct fb_fillrect *rect);
extern void fbcon_sis_copyarea(struct fb_info *info,
const struct fb_copyarea *area);
extern int fbcon_sis_sync(struct fb_info *info);
static int sisfb_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg,
struct fb_info *info);
static int sisfb_set_par(struct fb_info *info);
static int sisfb_blank(int blank,
struct fb_info *info);
extern void fbcon_sis_fillrect(struct fb_info *info,
const struct fb_fillrect *rect);
extern void fbcon_sis_copyarea(struct fb_info *info,
const struct fb_copyarea *area);
extern int fbcon_sis_sync(struct fb_info *info);
#endif
/* Internal 2D accelerator functions */
extern int sisfb_initaccel(struct sis_video_info *ivideo);
extern void sisfb_syncaccel(struct sis_video_info *ivideo);
extern int sisfb_initaccel(struct sis_video_info *ivideo);
extern void sisfb_syncaccel(struct sis_video_info *ivideo);
/* Internal general routines */
static void sisfb_search_mode(char *name, BOOLEAN quiet);
static int sisfb_validate_mode(struct sis_video_info *ivideo, int modeindex, u32 vbflags);
static u8 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate,
int index);
static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green,
unsigned blue, unsigned transp,
struct fb_info *fb_info);
static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
struct fb_info *info);
static void sisfb_pre_setmode(struct sis_video_info *ivideo);
static void sisfb_post_setmode(struct sis_video_info *ivideo);
static BOOLEAN sisfb_CheckVBRetrace(struct sis_video_info *ivideo);
static BOOLEAN sisfbcheckvretracecrt2(struct sis_video_info *ivideo);
static BOOLEAN sisfbcheckvretracecrt1(struct sis_video_info *ivideo);
static BOOLEAN sisfb_bridgeisslave(struct sis_video_info *ivideo);
static void sisfb_detect_VB_connect(struct sis_video_info *ivideo);
static void sisfb_get_VB_type(struct sis_video_info *ivideo);
static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val);
static void sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val);
static void sisfb_search_mode(char *name, BOOLEAN quiet);
static int sisfb_validate_mode(struct sis_video_info *ivideo, int modeindex, u32 vbflags);
static u8 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate,
int index);
static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green,
unsigned blue, unsigned transp,
struct fb_info *fb_info);
static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
struct fb_info *info);
static void sisfb_pre_setmode(struct sis_video_info *ivideo);
static void sisfb_post_setmode(struct sis_video_info *ivideo);
static BOOLEAN sisfb_CheckVBRetrace(struct sis_video_info *ivideo);
static BOOLEAN sisfbcheckvretracecrt2(struct sis_video_info *ivideo);
static BOOLEAN sisfbcheckvretracecrt1(struct sis_video_info *ivideo);
static BOOLEAN sisfb_bridgeisslave(struct sis_video_info *ivideo);
static void sisfb_detect_VB_connect(struct sis_video_info *ivideo);
static void sisfb_get_VB_type(struct sis_video_info *ivideo);
static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val);
static void sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val);
#ifdef CONFIG_FB_SIS_300
unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val);
unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg);
#endif
#ifdef CONFIG_FB_SIS_315
void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val);
unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
#endif
/* SiS-specific exported functions */
void sis_malloc(struct sis_memreq *req);
void sis_free(u32 base);
void sis_malloc(struct sis_memreq *req);
void sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req);
void sis_free(u32 base);
void sis_free_new(struct pci_dev *pdev, u32 base);
/* Internal heap routines */
static int sisfb_heap_init(struct sis_video_info *ivideo);
static SIS_OH *sisfb_poh_new_node(void);
static SIS_OH *sisfb_poh_allocate(u32 size);
static void sisfb_delete_node(SIS_OH *poh);
static void sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh);
static SIS_OH *sisfb_poh_free(u32 base);
static void sisfb_free_node(SIS_OH *poh);
/* Sensing routines */
static void SiS_Sense30x(struct sis_video_info *ivideo);
static void SiS_SenseCh(struct sis_video_info *ivideo);
static int sisfb_heap_init(struct sis_video_info *ivideo);
static struct SIS_OH * sisfb_poh_new_node(struct SIS_HEAP *memheap);
static struct SIS_OH * sisfb_poh_allocate(struct SIS_HEAP *memheap, u32 size);
static void sisfb_delete_node(struct SIS_OH *poh);
static void sisfb_insert_node(struct SIS_OH *pohList, struct SIS_OH *poh);
static struct SIS_OH * sisfb_poh_free(struct SIS_HEAP *memheap, u32 base);
static void sisfb_free_node(struct SIS_HEAP *memheap, struct SIS_OH *poh);
/* Routines from init.c/init301.c */
extern USHORT SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth,
BOOLEAN FSTN, USHORT CustomT, int LCDwith, int LCDheight);
extern USHORT SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth);
extern USHORT SiS_GetModeID_VGA2(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth);
extern unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
int VDisplay, int Depth, BOOLEAN FSTN, unsigned short CustomT,
int LCDwith, int LCDheight, unsigned int VBFlags2);
extern unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
int VDisplay, int Depth, unsigned int VBFlags2);
extern unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
int VDisplay, int Depth, unsigned int VBFlags2);
extern void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
extern BOOLEAN SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
extern void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
extern void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
extern void SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
extern BOOLEAN SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceInfo, USHORT ModeNo);
extern void SiS_SetEnableDstn(SiS_Private *SiS_Pr, int enable);
extern void SiS_SetEnableFstn(SiS_Private *SiS_Pr, int enable);
extern BOOLEAN SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
extern BOOLEAN SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
extern BOOLEAN sisfb_gettotalfrommode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension,
unsigned char modeno, int *htotal, int *vtotal, unsigned char rateindex);
extern BOOLEAN sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
int *htotal, int *vtotal, unsigned char rateindex);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
extern int sisfb_mode_rate_to_dclock(SiS_Private *SiS_Pr,
PSIS_HW_INFO HwDeviceExtension,
unsigned char modeno, unsigned char rateindex);
extern int sisfb_mode_rate_to_ddata(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension,
unsigned char modeno, unsigned char rateindex,
struct fb_var_screeninfo *var);
extern int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
unsigned char modeno, unsigned char rateindex);
extern int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
unsigned char rateindex, struct fb_var_screeninfo *var);
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
extern void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres,
int yres, struct fb_var_screeninfo *var, BOOLEAN writeres);
#endif
/* Chrontel TV, DDC and DPMS functions */
extern USHORT SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempbx);
extern void SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempbx);
extern USHORT SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempbx);
extern void SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempbx);
extern void SiS_SetCH70xxANDOR(SiS_Private *SiS_Pr, USHORT tempax,USHORT tempbh);
extern void SiS_DDC2Delay(SiS_Private *SiS_Pr, USHORT delaytime);
extern void SiS_SetChrontelGPIO(SiS_Private *SiS_Pr, USHORT myvbinfo);
extern USHORT SiS_HandleDDC(SiS_Private *SiS_Pr, ULONG VBFlags, int VGAEngine,
USHORT adaptnum, USHORT DDCdatatype, unsigned char *buffer);
extern USHORT SiS_ReadDDC1Bit(SiS_Private *SiS_Pr);
extern void SiS_Chrontel701xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceInfo);
extern void SiS_Chrontel701xBLOff(SiS_Private *SiS_Pr);
extern void SiS_SiS30xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceInfo);
extern void SiS_SiS30xBLOff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceInfo);
extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg);
extern void SiS_SetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
extern unsigned short SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg);
extern void SiS_SetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
extern void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg,
unsigned char myor, unsigned char myand);
extern void SiS_DDC2Delay(struct SiS_Private *SiS_Pr, unsigned int delaytime);
extern void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo);
extern unsigned short SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine,
unsigned short adaptnum, unsigned short DDCdatatype, unsigned char *buffer,
unsigned int VBFlags2);
extern unsigned short SiS_ReadDDC1Bit(struct SiS_Private *SiS_Pr);
#ifdef CONFIG_FB_SIS_315
extern void SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr);
extern void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr);
#endif
extern void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr);
extern void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr);
#endif

View File

@ -3,7 +3,7 @@
/*
* General type definitions for universal mode switching modules
*
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
@ -50,11 +50,10 @@
*
*/
#ifndef _VGATYPES_
#define _VGATYPES_
#ifndef _VGATYPES_H_
#define _VGATYPES_H_
#ifdef LINUX_KERNEL /* We don't want the X driver to depend on kernel source */
#include <linux/ioctl.h>
#ifdef SIS_LINUX_KERNEL
#include <linux/version.h>
#endif
@ -66,41 +65,13 @@
#define TRUE 1
#endif
#ifndef NULL
#define NULL 0
#endif
#ifndef CHAR
typedef char CHAR;
#endif
#ifndef SHORT
typedef short SHORT;
#endif
#ifndef LONG
typedef long LONG;
#endif
#ifndef UCHAR
typedef unsigned char UCHAR;
#endif
#ifndef USHORT
typedef unsigned short USHORT;
#endif
#ifndef ULONG
typedef unsigned long ULONG;
#endif
#ifndef BOOLEAN
typedef unsigned char BOOLEAN;
typedef unsigned int BOOLEAN;
#endif
#define SISIOMEMTYPE
#ifdef LINUX_KERNEL
#ifdef SIS_LINUX_KERNEL
typedef unsigned long SISIOADDRESS;
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8)
#include <linux/types.h> /* Need __iomem */
@ -109,7 +80,7 @@ typedef unsigned long SISIOADDRESS;
#endif
#endif
#ifdef LINUX_XF86
#ifdef SIS_XORG_XF86
#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,0,0,0)
typedef unsigned long IOADDRESS;
typedef unsigned long SISIOADDRESS;
@ -118,7 +89,7 @@ typedef IOADDRESS SISIOADDRESS;
#endif
#endif
enum _SIS_CHIP_TYPE {
typedef enum _SIS_CHIP_TYPE {
SIS_VGALegacy = 0,
SIS_530,
SIS_OLD,
@ -128,115 +99,27 @@ enum _SIS_CHIP_TYPE {
SIS_540,
SIS_315H, /* SiS 310 */
SIS_315,
SIS_315PRO,
SIS_315PRO, /* SiS 325 */
SIS_550,
SIS_650,
SIS_740,
SIS_330,
SIS_661,
SIS_741,
SIS_660,
SIS_670,
SIS_660 = 35,
SIS_760,
SIS_761,
SIS_340,
SIS_762,
SIS_770,
SIS_340 = 55,
SIS_341,
SIS_342,
XGI_20 = 75,
XGI_40,
MAX_SIS_CHIP
};
} SIS_CHIP_TYPE;
#ifndef SIS_HW_INFO
typedef struct _SIS_HW_INFO SIS_HW_INFO, *PSIS_HW_INFO;
struct _SIS_HW_INFO
{
#ifdef LINUX_XF86
PCITAG PciTag; /* PCI Tag */
#endif
UCHAR *pjVirtualRomBase; /* ROM image */
BOOLEAN UseROM; /* Use the ROM image if provided */
#ifdef LINUX_KERNEL
UCHAR SISIOMEMTYPE *pjVideoMemoryAddress;
/* base virtual memory address */
/* of Linear VGA memory */
ULONG ulVideoMemorySize; /* size, in bytes, of the memory on the board */
#endif
SISIOADDRESS ulIOAddress; /* base I/O address of VGA ports (0x3B0; relocated) */
UCHAR jChipType; /* Used to Identify SiS Graphics Chip */
/* defined in the enum "SIS_CHIP_TYPE" (above or sisfb.h) */
UCHAR jChipRevision; /* Used to Identify SiS Graphics Chip Revision */
BOOLEAN bIntegratedMMEnabled;/* supporting integration MM enable */
};
#endif
/* Addtional IOCTLs for communication sisfb <> X driver */
/* If changing this, sisfb.h must also be changed (for sisfb) */
#ifdef LINUX_XF86 /* We don't want the X driver to depend on the kernel source */
/* ioctl for identifying and giving some info (esp. memory heap start) */
#define SISFB_GET_INFO_SIZE 0x8004f300
#define SISFB_GET_INFO 0x8000f301 /* Must be patched with result from ..._SIZE at D[29:16] */
/* deprecated ioctl number (for older versions of sisfb) */
#define SISFB_GET_INFO_OLD 0x80046ef8
/* ioctls for tv parameters (position) */
#define SISFB_SET_TVPOSOFFSET 0x4004f304
/* lock sisfb from register access */
#define SISFB_SET_LOCK 0x4004f306
/* Structure argument for SISFB_GET_INFO ioctl */
typedef struct _SISFB_INFO sisfb_info, *psisfb_info;
struct _SISFB_INFO {
CARD32 sisfb_id; /* for identifying sisfb */
#ifndef SISFB_ID
#define SISFB_ID 0x53495346 /* Identify myself with 'SISF' */
#endif
CARD32 chip_id; /* PCI ID of detected chip */
CARD32 memory; /* video memory in KB which sisfb manages */
CARD32 heapstart; /* heap start (= sisfb "mem" argument) in KB */
CARD8 fbvidmode; /* current sisfb mode */
CARD8 sisfb_version;
CARD8 sisfb_revision;
CARD8 sisfb_patchlevel;
CARD8 sisfb_caps; /* sisfb's capabilities */
CARD32 sisfb_tqlen; /* turbo queue length (in KB) */
CARD32 sisfb_pcibus; /* The card's PCI ID */
CARD32 sisfb_pcislot;
CARD32 sisfb_pcifunc;
CARD8 sisfb_lcdpdc;
CARD8 sisfb_lcda;
CARD32 sisfb_vbflags;
CARD32 sisfb_currentvbflags;
CARD32 sisfb_scalelcd;
CARD32 sisfb_specialtiming;
CARD8 sisfb_haveemi;
CARD8 sisfb_emi30,sisfb_emi31,sisfb_emi32,sisfb_emi33;
CARD8 sisfb_haveemilcd;
CARD8 sisfb_lcdpdca;
CARD16 sisfb_tvxpos, sisfb_tvypos; /* Warning: Values + 32 ! */
CARD8 reserved[208]; /* for future use */
};
#endif
#endif

File diff suppressed because it is too large Load Diff

View File

@ -107,6 +107,8 @@
#define FB_ACCEL_NV_20 44 /* nVidia Arch 20 */
#define FB_ACCEL_NV_30 45 /* nVidia Arch 30 */
#define FB_ACCEL_NV_40 46 /* nVidia Arch 40 */
#define FB_ACCEL_XGI_VOLARI_V 47 /* XGI Volari V3XT, V5, V8 */
#define FB_ACCEL_XGI_VOLARI_Z 48 /* XGI Volari Z7 */
#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */

View File

@ -1,5 +1,7 @@
/*
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria.
* sisfb.h - definitions for the SiS framebuffer driver
*
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -16,8 +18,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
*/
#ifndef _LINUX_SISFB
#define _LINUX_SISFB
#ifndef _LINUX_SISFB_H_
#define _LINUX_SISFB_H_
#include <asm/ioctl.h>
#include <asm/types.h>
@ -26,47 +28,35 @@
/* PUBLIC */
/**********************************************/
/* vbflags */
#define CRT2_DEFAULT 0x00000001
#define CRT2_LCD 0x00000002 /* TW: Never change the order of the CRT2_XXX entries */
#define CRT2_TV 0x00000004 /* (see SISCycleCRT2Type()) */
#define CRT2_VGA 0x00000008
#define TV_NTSC 0x00000010
#define TV_PAL 0x00000020
#define TV_HIVISION 0x00000040
#define TV_YPBPR 0x00000080
#define TV_AVIDEO 0x00000100
#define TV_SVIDEO 0x00000200
#define TV_SCART 0x00000400
#define VB_CONEXANT 0x00000800 /* 661 series only */
#define VB_TRUMPION VB_CONEXANT /* 300 series only */
#define TV_PALM 0x00001000
#define TV_PALN 0x00002000
/* vbflags, public (others in sis.h) */
#define CRT2_DEFAULT 0x00000001
#define CRT2_LCD 0x00000002
#define CRT2_TV 0x00000004
#define CRT2_VGA 0x00000008
#define TV_NTSC 0x00000010
#define TV_PAL 0x00000020
#define TV_HIVISION 0x00000040
#define TV_YPBPR 0x00000080
#define TV_AVIDEO 0x00000100
#define TV_SVIDEO 0x00000200
#define TV_SCART 0x00000400
#define TV_PALM 0x00001000
#define TV_PALN 0x00002000
#define TV_NTSCJ 0x00001000
#define VB_302ELV 0x00004000
#define TV_CHSCART 0x00008000
#define TV_CHYPBPR525I 0x00010000
#define TV_CHSCART 0x00008000
#define TV_CHYPBPR525I 0x00010000
#define CRT1_VGA 0x00000000
#define CRT1_LCDA 0x00020000
#define VGA2_CONNECTED 0x00040000
#define VB_DISPTYPE_CRT1 0x00080000 /* CRT1 connected and used */
#define VB_301 0x00100000 /* Video bridge type */
#define VB_301B 0x00200000
#define VB_302B 0x00400000
#define VB_30xBDH 0x00800000 /* 30xB DH version (w/o LCD support) */
#define VB_LVDS 0x01000000
#define VB_CHRONTEL 0x02000000
#define VB_301LV 0x04000000
#define VB_302LV 0x08000000
#define VB_301C 0x10000000
#define VB_SINGLE_MODE 0x20000000 /* CRT1 or CRT2; determined by DISPTYPE_CRTx */
#define VB_MIRROR_MODE 0x40000000 /* CRT1 + CRT2 identical (mirror mode) */
#define VB_DUALVIEW_MODE 0x80000000 /* CRT1 + CRT2 independent (dual head mode) */
#define VB_DISPTYPE_CRT1 0x00080000 /* CRT1 connected and used */
#define VB_SINGLE_MODE 0x20000000 /* CRT1 or CRT2; determined by DISPTYPE_CRTx */
#define VB_MIRROR_MODE 0x40000000 /* CRT1 + CRT2 identical (mirror mode) */
#define VB_DUALVIEW_MODE 0x80000000 /* CRT1 + CRT2 independent (dual head mode) */
/* Aliases: */
#define CRT2_ENABLE (CRT2_LCD | CRT2_TV | CRT2_VGA)
#define TV_STANDARD (TV_NTSC | TV_PAL | TV_PALM | TV_PALN | TV_NTSCJ)
#define TV_INTERFACE (TV_AVIDEO|TV_SVIDEO|TV_SCART|TV_HIVISION|TV_YPBPR|TV_CHSCART|TV_CHYPBPR525I)
#define TV_STANDARD (TV_NTSC | TV_PAL | TV_PALM | TV_PALN | TV_NTSCJ)
#define TV_INTERFACE (TV_AVIDEO|TV_SVIDEO|TV_SCART|TV_HIVISION|TV_YPBPR|TV_CHSCART|TV_CHYPBPR525I)
/* Only if TV_YPBPR is set: */
#define TV_YPBPR525I TV_NTSC
@ -75,89 +65,118 @@
#define TV_YPBPR1080I TV_PALN
#define TV_YPBPRALL (TV_YPBPR525I | TV_YPBPR525P | TV_YPBPR750P | TV_YPBPR1080I)
#define VB_SISBRIDGE (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)
#define VB_SISTVBRIDGE (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV)
#define VB_VIDEOBRIDGE (VB_SISBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT)
#define VB_DISPTYPE_DISP2 CRT2_ENABLE
#define VB_DISPTYPE_CRT2 CRT2_ENABLE
#define VB_DISPTYPE_DISP1 VB_DISPTYPE_CRT1
#define VB_DISPMODE_SINGLE VB_SINGLE_MODE
#define VB_DISPMODE_MIRROR VB_MIRROR_MODE
#define VB_DISPMODE_DUAL VB_DUALVIEW_MODE
#define VB_DISPLAY_MODE (SINGLE_MODE | MIRROR_MODE | DUALVIEW_MODE)
#define VB_DISPLAY_MODE (SINGLE_MODE | MIRROR_MODE | DUALVIEW_MODE)
/* Structure argument for SISFB_GET_INFO ioctl */
typedef struct _SISFB_INFO sisfb_info, *psisfb_info;
struct _SISFB_INFO {
__u32 sisfb_id; /* for identifying sisfb */
struct sisfb_info {
__u32 sisfb_id; /* for identifying sisfb */
#ifndef SISFB_ID
#define SISFB_ID 0x53495346 /* Identify myself with 'SISF' */
#endif
__u32 chip_id; /* PCI-ID of detected chip */
__u32 memory; /* video memory in KB which sisfb manages */
__u32 heapstart; /* heap start (= sisfb "mem" argument) in KB */
__u32 chip_id; /* PCI-ID of detected chip */
__u32 memory; /* total video memory in KB */
__u32 heapstart; /* heap start offset in KB */
__u8 fbvidmode; /* current sisfb mode */
__u8 sisfb_version;
__u8 sisfb_revision;
__u8 sisfb_patchlevel;
__u8 sisfb_version;
__u8 sisfb_revision;
__u8 sisfb_patchlevel;
__u8 sisfb_caps; /* sisfb capabilities */
__u8 sisfb_caps; /* sisfb capabilities */
__u32 sisfb_tqlen; /* turbo queue length (in KB) */
__u32 sisfb_pcibus; /* The card's PCI ID */
__u32 sisfb_pcislot;
__u32 sisfb_pcifunc;
__u32 sisfb_pcibus; /* The card's PCI ID */
__u32 sisfb_pcislot;
__u32 sisfb_pcifunc;
__u8 sisfb_lcdpdc; /* PanelDelayCompensation */
__u8 sisfb_lcdpdc; /* PanelDelayCompensation */
__u8 sisfb_lcda; /* Detected status of LCDA for low res/text modes */
__u8 sisfb_lcda; /* Detected status of LCDA for low res/text modes */
__u32 sisfb_vbflags;
__u32 sisfb_currentvbflags;
__u32 sisfb_vbflags;
__u32 sisfb_currentvbflags;
__u32 sisfb_scalelcd;
__u32 sisfb_specialtiming;
__u32 sisfb_scalelcd;
__u32 sisfb_specialtiming;
__u8 sisfb_haveemi;
__u8 sisfb_emi30,sisfb_emi31,sisfb_emi32,sisfb_emi33;
__u8 sisfb_haveemilcd;
__u8 sisfb_haveemi;
__u8 sisfb_emi30,sisfb_emi31,sisfb_emi32,sisfb_emi33;
__u8 sisfb_haveemilcd;
__u8 sisfb_lcdpdca; /* PanelDelayCompensation for LCD-via-CRT1 */
__u8 sisfb_lcdpdca; /* PanelDelayCompensation for LCD-via-CRT1 */
__u16 sisfb_tvxpos, sisfb_tvypos; /* Warning: Values + 32 ! */
__u16 sisfb_tvxpos, sisfb_tvypos; /* Warning: Values + 32 ! */
__u8 reserved[208]; /* for future use */
__u32 sisfb_heapsize; /* heap size (in KB) */
__u32 sisfb_videooffset; /* Offset of viewport in video memory (in bytes) */
__u32 sisfb_curfstn; /* currently running FSTN/DSTN mode */
__u32 sisfb_curdstn;
__u16 sisfb_pci_vendor; /* PCI vendor (SiS or XGI) */
__u32 sisfb_vbflags2; /* ivideo->vbflags2 */
__u8 sisfb_can_post; /* sisfb can POST this card */
__u8 sisfb_card_posted; /* card is POSTED */
__u8 sisfb_was_boot_device; /* This card was the boot video device (ie is primary) */
__u8 reserved[183]; /* for future use */
};
#define SISFB_CMD_GETVBFLAGS 0x55AA0001 /* no arg; result[1] = vbflags */
#define SISFB_CMD_SWITCHCRT1 0x55AA0010 /* arg[0]: 99 = query, 0 = off, 1 = on */
/* more to come */
#define SISFB_CMD_ERR_OK 0x80000000 /* command succeeded */
#define SISFB_CMD_ERR_LOCKED 0x80000001 /* sisfb is locked */
#define SISFB_CMD_ERR_EARLY 0x80000002 /* request before sisfb took over gfx system */
#define SISFB_CMD_ERR_NOVB 0x80000003 /* No video bridge */
#define SISFB_CMD_ERR_NOCRT2 0x80000004 /* can't change CRT1 status, CRT2 disabled */
/* more to come */
#define SISFB_CMD_ERR_UNKNOWN 0x8000ffff /* Unknown command */
#define SISFB_CMD_ERR_OTHER 0x80010000 /* Other error */
/* Argument for SISFB_CMD ioctl */
struct sisfb_cmd {
__u32 sisfb_cmd;
__u32 sisfb_arg[16];
__u32 sisfb_result[4];
};
/* Addtional IOCTLs for communication sisfb <> X driver */
/* If changing this, vgatypes.h must also be changed (for X driver) */
/* ioctl for identifying and giving some info (esp. memory heap start) */
#define SISFB_GET_INFO_SIZE _IOR(0xF3,0x00,__u32)
#define SISFB_GET_INFO _IOR(0xF3,0x01,struct _SISFB_INFO)
#define SISFB_GET_INFO_SIZE _IOR(0xF3,0x00,__u32)
#define SISFB_GET_INFO _IOR(0xF3,0x01,struct sisfb_info)
/* ioctrl to get current vertical retrace status */
#define SISFB_GET_VBRSTATUS _IOR(0xF3,0x02,__u32)
#define SISFB_GET_VBRSTATUS _IOR(0xF3,0x02,__u32)
/* ioctl to enable/disable panning auto-maximize (like nomax parameter) */
#define SISFB_GET_AUTOMAXIMIZE _IOR(0xF3,0x03,__u32)
#define SISFB_SET_AUTOMAXIMIZE _IOW(0xF3,0x03,__u32)
#define SISFB_GET_AUTOMAXIMIZE _IOR(0xF3,0x03,__u32)
#define SISFB_SET_AUTOMAXIMIZE _IOW(0xF3,0x03,__u32)
/* ioctls to relocate TV output (x=D[31:16], y=D[15:0], + 32)*/
#define SISFB_GET_TVPOSOFFSET _IOR(0xF3,0x04,__u32)
#define SISFB_SET_TVPOSOFFSET _IOW(0xF3,0x04,__u32)
#define SISFB_GET_TVPOSOFFSET _IOR(0xF3,0x04,__u32)
#define SISFB_SET_TVPOSOFFSET _IOW(0xF3,0x04,__u32)
/* ioctl for internal sisfb commands (sisfbctrl) */
#define SISFB_COMMAND _IOWR(0xF3,0x05,struct sisfb_cmd)
/* ioctl for locking sisfb (no register access during lock) */
/* As of now, only used to avoid register access during
* the ioctls listed above.
*/
#define SISFB_SET_LOCK _IOW(0xF3,0x06,__u32)
/* more to come soon */
#define SISFB_SET_LOCK _IOW(0xF3,0x06,__u32)
/* ioctls 0xF3 up to 0x3F reserved for sisfb */
@ -165,7 +184,7 @@ struct _SISFB_INFO {
/* The following are deprecated and should not be used anymore: */
/****************************************************************/
/* ioctl for identifying and giving some info (esp. memory heap start) */
#define SISFB_GET_INFO_OLD _IOR('n',0xF8,__u32)
#define SISFB_GET_INFO_OLD _IOR('n',0xF8,__u32)
/* ioctrl to get current vertical retrace status */
#define SISFB_GET_VBRSTATUS_OLD _IOR('n',0xF9,__u32)
/* ioctl to enable/disable panning auto-maximize (like nomax parameter) */
@ -177,8 +196,8 @@ struct _SISFB_INFO {
/* For fb memory manager (FBIO_ALLOC, FBIO_FREE) */
struct sis_memreq {
__u32 offset;
__u32 size;
__u32 offset;
__u32 size;
};
/**********************************************/
@ -187,12 +206,19 @@ struct sis_memreq {
/**********************************************/
#ifdef __KERNEL__
#include <linux/pci.h>
#define UNKNOWN_VGA 0
#define SIS_300_VGA 1
#define SIS_315_VGA 2
#define SISFB_HAVE_MALLOC_NEW
extern void sis_malloc(struct sis_memreq *req);
extern void sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req);
extern void sis_free(u32 base);
extern void sis_free_new(struct pci_dev *pdev, u32 base);
#endif
#endif