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ASoC: wm8904: enable MCLK in STANDBY

MCLK input is needed when accessing any register after enabling SYSCLK.

This also fixes imbalance of clk_enable / clk_disable when transitioning
between ON -> STANDBY -> ON bias levels.

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
hifive-unleashed-5.1
Michał Mirosław 2018-12-19 21:11:16 +01:00 committed by Mark Brown
parent fb82c6ed31
commit 5489e81f98
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GPG Key ID: 24D68B725D5487D0
1 changed files with 9 additions and 3 deletions

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@ -1837,9 +1837,6 @@ static int wm8904_set_bias_level(struct snd_soc_component *component,
switch (level) {
case SND_SOC_BIAS_ON:
ret = clk_prepare_enable(wm8904->mclk);
if (ret)
return ret;
break;
case SND_SOC_BIAS_PREPARE:
@ -1864,6 +1861,15 @@ static int wm8904_set_bias_level(struct snd_soc_component *component,
return ret;
}
ret = clk_prepare_enable(wm8904->mclk);
if (ret) {
dev_err(component->dev,
"Failed to enable MCLK: %d\n", ret);
regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies),
wm8904->supplies);
return ret;
}
regcache_cache_only(wm8904->regmap, false);
regcache_sync(wm8904->regmap);