OMAP: Print Initiator name for l3 custom error.
The initiator id gets logged in the l3 target registers for custom error. So print it to aid debugging. Based on a internal patch by Devaraj Rangasamy <dev@ti.com> Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>hifive-unleashed-5.1
parent
6616aac66d
commit
551a9fa9b1
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@ -56,11 +56,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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{
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{
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struct omap4_l3 *l3 = _l3;
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struct omap4_l3 *l3 = _l3;
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int inttype, i;
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int inttype, i, k;
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int err_src = 0;
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int err_src = 0;
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u32 std_err_main, err_reg, clear;
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u32 std_err_main, err_reg, clear, masterid;
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void __iomem *base, *l3_targ_base;
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void __iomem *base, *l3_targ_base;
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char *source_name;
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char *target_name, *master_name = "UN IDENTIFIED";
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/* Get the Type of interrupt */
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/* Get the Type of interrupt */
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inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
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inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
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@ -83,13 +83,15 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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l3_targ_base = base + *(l3_targ[i] + err_src);
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l3_targ_base = base + *(l3_targ[i] + err_src);
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std_err_main = __raw_readl(l3_targ_base +
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std_err_main = __raw_readl(l3_targ_base +
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L3_TARG_STDERRLOG_MAIN);
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L3_TARG_STDERRLOG_MAIN);
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masterid = __raw_readl(l3_targ_base +
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L3_TARG_STDERRLOG_MSTADDR);
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switch (std_err_main & CUSTOM_ERROR) {
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switch (std_err_main & CUSTOM_ERROR) {
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case STANDARD_ERROR:
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case STANDARD_ERROR:
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source_name =
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target_name =
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l3_targ_inst_name[i][err_src];
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l3_targ_inst_name[i][err_src];
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WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
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WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
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source_name,
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target_name,
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__raw_readl(l3_targ_base +
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__raw_readl(l3_targ_base +
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L3_TARG_STDERRLOG_SLVOFSLSB));
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L3_TARG_STDERRLOG_SLVOFSLSB));
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/* clear the std error log*/
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/* clear the std error log*/
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@ -99,11 +101,15 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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break;
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break;
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case CUSTOM_ERROR:
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case CUSTOM_ERROR:
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source_name =
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target_name =
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l3_targ_inst_name[i][err_src];
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l3_targ_inst_name[i][err_src];
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for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
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WARN(true, "L3 custom error: SOURCE:%s\n",
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if (masterid == l3_masters[k].id)
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source_name);
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master_name =
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l3_masters[k].name;
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}
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WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
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master_name, target_name);
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/* clear the std error log*/
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/* clear the std error log*/
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clear = std_err_main | CLEAR_STDERR_LOG;
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clear = std_err_main | CLEAR_STDERR_LOG;
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writel(clear, l3_targ_base +
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writel(clear, l3_targ_base +
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@ -34,8 +34,11 @@
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/* L3 TARG register offsets */
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/* L3 TARG register offsets */
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#define L3_TARG_STDERRLOG_MAIN 0x48
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#define L3_TARG_STDERRLOG_MAIN 0x48
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#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
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#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
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#define L3_TARG_STDERRLOG_MSTADDR 0x68
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#define L3_FLAGMUX_REGERR0 0xc
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#define L3_FLAGMUX_REGERR0 0xc
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#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0]))
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static u32 l3_flagmux[L3_MODULES] = {
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static u32 l3_flagmux[L3_MODULES] = {
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0x500,
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0x500,
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0x1000,
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0x1000,
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@ -76,6 +79,37 @@ static u32 l3_targ_inst_clk3[] = {
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0x0100 /* EMUSS */
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0x0100 /* EMUSS */
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};
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};
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static struct l3_masters_data {
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u32 id;
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char name[10];
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} l3_masters[] = {
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{ 0x0 , "MPU"},
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{ 0x10, "CS_ADP"},
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{ 0x14, "xxx"},
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{ 0x20, "DSP"},
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{ 0x30, "IVAHD"},
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{ 0x40, "ISS"},
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{ 0x44, "DucatiM3"},
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{ 0x48, "FaceDetect"},
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{ 0x50, "SDMA_Rd"},
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{ 0x54, "SDMA_Wr"},
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{ 0x58, "xxx"},
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{ 0x5C, "xxx"},
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{ 0x60, "SGX"},
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{ 0x70, "DSS"},
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{ 0x80, "C2C"},
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{ 0x88, "xxx"},
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{ 0x8C, "xxx"},
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{ 0x90, "HSI"},
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{ 0xA0, "MMC1"},
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{ 0xA4, "MMC2"},
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{ 0xA8, "MMC6"},
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{ 0xB0, "UNIPRO1"},
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{ 0xC0, "USBHOSTHS"},
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{ 0xC4, "USBOTGHS"},
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{ 0xC8, "USBHOSTFS"}
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};
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static char *l3_targ_inst_name[L3_MODULES][18] = {
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static char *l3_targ_inst_name[L3_MODULES][18] = {
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{
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{
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"DMM1",
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"DMM1",
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