sh: pci-sh7780: Fix up for PCI_DISABLE_MWI changes.
This fixes a build error where references to pci_cache_line_size are undefined, as this ceases to be exported when PCI_DISABLE_MWI is enabled, as is now the default. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -15,8 +15,6 @@
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#include <linux/delay.h>
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#include "pci-sh4.h"
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extern u8 pci_cache_line_size;
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static struct resource sh7785_io_resource = {
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.name = "SH7785_IO",
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.start = SH7780_PCI_IO_BASE,
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@ -37,6 +35,7 @@ static struct pci_channel sh7780_pci_controller = {
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.mem_offset = 0x00000000,
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.io_resource = &sh7785_io_resource,
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.io_offset = 0x00000000,
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.io_map_base = SH7780_PCI_IO_BASE,
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};
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static struct sh4_pci_address_map sh7780_pci_map = {
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@ -99,8 +98,6 @@ static int __init sh7780_pci_init(void)
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__raw_writeb(PCI_CLASS_BRIDGE_HOST & 0xff,
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chan->reg_base + SH7780_PCISUB);
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pci_cache_line_size = pci_read_reg(chan, SH7780_PCICLS) / 4;
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/*
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* Set IO and Mem windows to local address
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* Make PCI and local address the same for easy 1 to 1 mapping
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@ -142,8 +139,6 @@ static int __init sh7780_pci_init(void)
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word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO;
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pci_write_reg(chan, word, SH4_PCICR);
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__set_io_port_base(SH7780_PCI_IO_BASE);
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register_pci_controller(chan);
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return 0;
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