drm/i915: Use the plane state for cursor updates.
Cursor planes grab the state from plane->state instead of the state that was passed. The only updates are atomic now, so use the plane_state that's passed in. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1452164052-21752-6-git-send-email-maarten.lankhorst@linux.intel.com Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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@ -10112,16 +10112,17 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
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return true;
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}
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static void i845_update_cursor(struct drm_crtc *crtc, u32 base, bool on)
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static void i845_update_cursor(struct drm_crtc *crtc, u32 base,
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const struct intel_plane_state *plane_state)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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uint32_t cntl = 0, size = 0;
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if (on) {
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unsigned int width = intel_crtc->base.cursor->state->crtc_w;
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unsigned int height = intel_crtc->base.cursor->state->crtc_h;
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if (plane_state && plane_state->visible) {
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unsigned int width = plane_state->base.crtc_w;
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unsigned int height = plane_state->base.crtc_h;
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unsigned int stride = roundup_pow_of_two(width) * 4;
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switch (stride) {
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@ -10174,7 +10175,8 @@ static void i845_update_cursor(struct drm_crtc *crtc, u32 base, bool on)
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}
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}
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static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base, bool on)
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static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base,
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const struct intel_plane_state *plane_state)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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@ -10182,9 +10184,9 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base, bool on)
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int pipe = intel_crtc->pipe;
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uint32_t cntl = 0;
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if (on) {
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if (plane_state && plane_state->visible) {
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cntl = MCURSOR_GAMMA_ENABLE;
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switch (intel_crtc->base.cursor->state->crtc_w) {
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switch (plane_state->base.crtc_w) {
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case 64:
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cntl |= CURSOR_MODE_64_ARGB_AX;
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break;
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@ -10195,17 +10197,17 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base, bool on)
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cntl |= CURSOR_MODE_256_ARGB_AX;
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break;
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default:
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MISSING_CASE(intel_crtc->base.cursor->state->crtc_w);
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MISSING_CASE(plane_state->base.crtc_w);
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return;
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}
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cntl |= pipe << 28; /* Connect to correct pipe */
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if (HAS_DDI(dev))
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cntl |= CURSOR_PIPE_CSC_ENABLE;
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}
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if (crtc->cursor->state->rotation == BIT(DRM_ROTATE_180))
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cntl |= CURSOR_ROTATE_180;
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if (plane_state->base.rotation == BIT(DRM_ROTATE_180))
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cntl |= CURSOR_ROTATE_180;
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}
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if (intel_crtc->cursor_cntl != cntl) {
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I915_WRITE(CURCNTR(pipe), cntl);
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@ -10222,44 +10224,45 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base, bool on)
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/* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */
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static void intel_crtc_update_cursor(struct drm_crtc *crtc,
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bool on)
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const struct intel_plane_state *plane_state)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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int pipe = intel_crtc->pipe;
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struct drm_plane_state *cursor_state = crtc->cursor->state;
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int x = cursor_state->crtc_x;
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int y = cursor_state->crtc_y;
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u32 base = 0, pos = 0;
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u32 base = intel_crtc->cursor_addr;
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u32 pos = 0;
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base = intel_crtc->cursor_addr;
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if (plane_state) {
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int x = plane_state->base.crtc_x;
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int y = plane_state->base.crtc_y;
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if (x < 0) {
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pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
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x = -x;
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if (x < 0) {
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pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
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x = -x;
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}
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pos |= x << CURSOR_X_SHIFT;
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if (y < 0) {
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pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
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y = -y;
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}
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pos |= y << CURSOR_Y_SHIFT;
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/* ILK+ do this automagically */
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if (HAS_GMCH_DISPLAY(dev) &&
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plane_state->base.rotation == BIT(DRM_ROTATE_180)) {
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base += (plane_state->base.crtc_h *
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plane_state->base.crtc_w - 1) * 4;
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}
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}
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pos |= x << CURSOR_X_SHIFT;
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if (y < 0) {
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pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
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y = -y;
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}
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pos |= y << CURSOR_Y_SHIFT;
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I915_WRITE(CURPOS(pipe), pos);
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/* ILK+ do this automagically */
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if (HAS_GMCH_DISPLAY(dev) &&
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crtc->cursor->state->rotation == BIT(DRM_ROTATE_180)) {
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base += (cursor_state->crtc_h *
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cursor_state->crtc_w - 1) * 4;
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}
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if (IS_845G(dev) || IS_I865G(dev))
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i845_update_cursor(crtc, base, on);
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i845_update_cursor(crtc, base, plane_state);
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else
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i9xx_update_cursor(crtc, base, on);
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i9xx_update_cursor(crtc, base, plane_state);
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}
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static bool cursor_size_ok(struct drm_device *dev,
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@ -14259,22 +14262,20 @@ intel_disable_cursor_plane(struct drm_plane *plane,
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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intel_crtc->cursor_addr = 0;
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intel_crtc_update_cursor(crtc, false);
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intel_crtc_update_cursor(crtc, NULL);
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}
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static void
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intel_commit_cursor_plane(struct drm_plane *plane,
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struct intel_plane_state *state)
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intel_update_cursor_plane(struct drm_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *state)
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{
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struct drm_crtc *crtc = state->base.crtc;
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struct drm_crtc *crtc = crtc_state->base.crtc;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct drm_device *dev = plane->dev;
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struct intel_crtc *intel_crtc;
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struct drm_i915_gem_object *obj = intel_fb_obj(state->base.fb);
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uint32_t addr;
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crtc = crtc ? crtc : plane->crtc;
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intel_crtc = to_intel_crtc(crtc);
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if (!obj)
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addr = 0;
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else if (!INTEL_INFO(dev)->cursor_needs_physical)
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@ -14283,8 +14284,7 @@ intel_commit_cursor_plane(struct drm_plane *plane,
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addr = obj->phys_handle->busaddr;
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intel_crtc->cursor_addr = addr;
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intel_crtc_update_cursor(crtc, state->visible);
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intel_crtc_update_cursor(crtc, state);
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}
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static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,
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@ -14310,7 +14310,7 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,
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cursor->plane = pipe;
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cursor->frontbuffer_bit = INTEL_FRONTBUFFER_CURSOR(pipe);
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cursor->check_plane = intel_check_cursor_plane;
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cursor->commit_plane = intel_commit_cursor_plane;
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cursor->update_plane = intel_update_cursor_plane;
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cursor->disable_plane = intel_disable_cursor_plane;
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drm_universal_plane_init(dev, &cursor->base, 0,
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