linux-watchdog 5.7-rc1 tag
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.14 (GNU/Linux) iEYEABECAAYFAl6Nl4sACgkQ+iyteGJfRspOOgCg3r8HYs8OCR/COd3hjgTSjhAj oN0AmwfjdeNT7Ni8RDKe/lkOY4PBrjR1 =g/01 -----END PGP SIGNATURE----- Merge tag 'linux-watchdog-5.7-rc1' of git://www.linux-watchdog.org/linux-watchdog Pull watchdog updates from Wim Van Sebroeck: - add TI K3 RTI watchdog - add stop_on_reboot parameter to control reboot policy - wm831x_wdt: Remove GPIO handling - several small fixes, improvements and clean-ups * tag 'linux-watchdog-5.7-rc1' of git://www.linux-watchdog.org/linux-watchdog: watchdog: Add K3 RTI watchdog support dt-bindings: watchdog: Add support for TI K3 RTI watchdog watchdog: ziirave_wdt: change name to be more specific watchdog: orion: use 0 for unset heartbeat watchdog: npcm: remove whitespaces watchdog: reset last_hw_keepalive time at start watchdog: imx2_wdt: Drop .remove callback watchdog: Add stop_on_reboot parameter to control reboot policy watchdog: wm831x_wdt: Remove GPIO handling watchdog: imx7ulp: Remove unused include of init.h watchdog: imx_sc_wdt: Remove unused includes watchdog: qcom: Use irq flags from firmware watchdog: pm8916_wdt: Add system sleep callbacks watchdog: qcom-wdt: disable pretimeout on timer platformalistair/sensors
Linus Torvalds
commit
5602b0af9d
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@ -0,0 +1,65 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments K3 SoC Watchdog Timer
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maintainers:
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- Tero Kristo <t-kristo@ti.com>
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description:
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The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
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Interrupt) IP module. This timer adds a support for windowed watchdog
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mode, which will signal an error if it is pinged outside the watchdog
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time window, meaning either too early or too late. The error signal
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generated can be routed to either interrupt a safety controller or
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to directly reset the SoC.
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allOf:
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- $ref: "watchdog.yaml#"
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properties:
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compatible:
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enum:
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- ti,j7-rti-wdt
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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assigned-clocks:
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maxItems: 1
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assigned-clocks-parents:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- power-domains
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examples:
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- |
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/*
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* RTI WDT in main domain on J721e SoC. Assigned clocks are used to
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* select the source clock for the watchdog, forcing it to tick with
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* a 32kHz clock in this case.
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*/
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#include <dt-bindings/soc/ti,sci_pm_domain.h>
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watchdog0: rti@2200000 {
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compatible = "ti,rti-wdt";
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reg = <0x0 0x2200000 0x0 0x100>;
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clocks = <&k3_clks 252 1>;
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power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
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assigned-clocks = <&k3_clks 252 1>;
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assigned-clock-parents = <&k3_clks 252 5>;
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};
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@ -584,6 +584,14 @@ config DAVINCI_WATCHDOG
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NOTE: once enabled, this timer cannot be disabled.
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Say N if you are unsure.
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config K3_RTI_WATCHDOG
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tristate "Texas Instruments K3 RTI watchdog"
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depends on ARCH_K3 || COMPILE_TEST
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select WATCHDOG_CORE
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help
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Say Y here if you want to include support for the K3 watchdog
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timer (RTI module) available in the K3 generation of processors.
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config ORION_WATCHDOG
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tristate "Orion watchdog"
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depends on ARCH_ORION5X || ARCH_DOVE || MACH_DOVE || ARCH_MVEBU || (COMPILE_TEST && !ARCH_EBSA110)
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@ -57,6 +57,7 @@ obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o
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obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o
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obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o
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obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o
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obj-$(CONFIG_K3_RTI_WATCHDOG) += rti_wdt.o
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obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o
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obj-$(CONFIG_SUNXI_WATCHDOG) += sunxi_wdt.o
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obj-$(CONFIG_RN5T618_WATCHDOG) += rn5t618_wdt.o
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@ -244,6 +244,11 @@ static const struct regmap_config imx2_wdt_regmap_config = {
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.max_register = 0x8,
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};
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static void imx2_wdt_action(void *data)
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{
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clk_disable_unprepare(data);
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}
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static int __init imx2_wdt_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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@ -292,6 +297,10 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
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if (ret)
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return ret;
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ret = devm_add_action_or_reset(dev, imx2_wdt_action, wdev->clk);
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if (ret)
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return ret;
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regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
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wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
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@ -315,32 +324,7 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
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*/
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regmap_write(wdev->regmap, IMX2_WDT_WMCR, 0);
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ret = watchdog_register_device(wdog);
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if (ret)
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goto disable_clk;
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dev_info(dev, "timeout %d sec (nowayout=%d)\n",
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wdog->timeout, nowayout);
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return 0;
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disable_clk:
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clk_disable_unprepare(wdev->clk);
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return ret;
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}
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static int __exit imx2_wdt_remove(struct platform_device *pdev)
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{
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struct watchdog_device *wdog = platform_get_drvdata(pdev);
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struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
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watchdog_unregister_device(wdog);
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if (imx2_wdt_is_running(wdev)) {
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imx2_wdt_ping(wdog);
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dev_crit(&pdev->dev, "Device removed: Expect reboot!\n");
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}
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return 0;
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return devm_watchdog_register_device(dev, wdog);
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}
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static void imx2_wdt_shutdown(struct platform_device *pdev)
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@ -417,7 +401,6 @@ static const struct of_device_id imx2_wdt_dt_ids[] = {
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MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids);
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static struct platform_driver imx2_wdt_driver = {
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.remove = __exit_p(imx2_wdt_remove),
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.shutdown = imx2_wdt_shutdown,
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.driver = {
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.name = DRIVER_NAME,
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@ -4,7 +4,6 @@
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*/
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#include <linux/clk.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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@ -6,13 +6,11 @@
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#include <linux/arm-smccc.h>
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#include <linux/firmware/imx/sci.h>
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reboot.h>
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#include <linux/watchdog.h>
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#define DEFAULT_TIMEOUT 60
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@ -103,30 +103,29 @@ static int npcm_wdt_stop(struct watchdog_device *wdd)
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return 0;
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}
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static int npcm_wdt_set_timeout(struct watchdog_device *wdd,
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unsigned int timeout)
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{
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if (timeout < 2)
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wdd->timeout = 1;
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else if (timeout < 3)
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wdd->timeout = 2;
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wdd->timeout = 2;
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else if (timeout < 6)
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wdd->timeout = 5;
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wdd->timeout = 5;
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else if (timeout < 11)
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wdd->timeout = 10;
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wdd->timeout = 10;
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else if (timeout < 22)
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wdd->timeout = 21;
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wdd->timeout = 21;
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else if (timeout < 44)
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wdd->timeout = 43;
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wdd->timeout = 43;
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else if (timeout < 87)
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wdd->timeout = 86;
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wdd->timeout = 86;
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else if (timeout < 173)
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wdd->timeout = 172;
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wdd->timeout = 172;
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else if (timeout < 688)
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wdd->timeout = 687;
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wdd->timeout = 687;
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else
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wdd->timeout = 2750;
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wdd->timeout = 2750;
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if (watchdog_active(wdd))
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npcm_wdt_start(wdd);
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@ -52,7 +52,7 @@
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#define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT)
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static bool nowayout = WATCHDOG_NOWAYOUT;
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static int heartbeat = -1; /* module parameter (seconds) */
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static int heartbeat; /* module parameter (seconds) */
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struct orion_watchdog;
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@ -192,6 +192,7 @@ static int pm8916_wdt_probe(struct platform_device *pdev)
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wdt->wdev.timeout = PM8916_WDT_DEFAULT_TIMEOUT;
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wdt->wdev.pretimeout = 0;
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watchdog_set_drvdata(&wdt->wdev, wdt);
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platform_set_drvdata(pdev, wdt);
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watchdog_init_timeout(&wdt->wdev, 0, dev);
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pm8916_wdt_configure_timers(&wdt->wdev);
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@ -199,6 +200,29 @@ static int pm8916_wdt_probe(struct platform_device *pdev)
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return devm_watchdog_register_device(dev, &wdt->wdev);
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}
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static int __maybe_unused pm8916_wdt_suspend(struct device *dev)
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{
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struct pm8916_wdt *wdt = dev_get_drvdata(dev);
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if (watchdog_active(&wdt->wdev))
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return pm8916_wdt_stop(&wdt->wdev);
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return 0;
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}
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static int __maybe_unused pm8916_wdt_resume(struct device *dev)
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{
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struct pm8916_wdt *wdt = dev_get_drvdata(dev);
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if (watchdog_active(&wdt->wdev))
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return pm8916_wdt_start(&wdt->wdev);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(pm8916_wdt_pm_ops, pm8916_wdt_suspend,
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pm8916_wdt_resume);
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static const struct of_device_id pm8916_wdt_id_table[] = {
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{ .compatible = "qcom,pm8916-wdt" },
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{ }
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@ -210,6 +234,7 @@ static struct platform_driver pm8916_wdt_driver = {
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.driver = {
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.name = "pm8916-wdt",
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.of_match_table = of_match_ptr(pm8916_wdt_id_table),
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.pm = &pm8916_wdt_pm_ops,
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},
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};
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module_platform_driver(pm8916_wdt_driver);
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@ -40,6 +40,11 @@ static const u32 reg_offset_data_kpss[] = {
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[WDT_BITE_TIME] = 0x14,
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};
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struct qcom_wdt_match_data {
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const u32 *offset;
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bool pretimeout;
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};
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struct qcom_wdt {
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struct watchdog_device wdd;
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unsigned long rate;
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@ -179,19 +184,29 @@ static void qcom_clk_disable_unprepare(void *data)
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clk_disable_unprepare(data);
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}
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static const struct qcom_wdt_match_data match_data_apcs_tmr = {
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.offset = reg_offset_data_apcs_tmr,
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.pretimeout = false,
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};
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static const struct qcom_wdt_match_data match_data_kpss = {
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.offset = reg_offset_data_kpss,
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.pretimeout = true,
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};
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static int qcom_wdt_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct qcom_wdt *wdt;
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struct resource *res;
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struct device_node *np = dev->of_node;
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const u32 *regs;
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const struct qcom_wdt_match_data *data;
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u32 percpu_offset;
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int irq, ret;
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struct clk *clk;
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regs = of_device_get_match_data(dev);
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if (!regs) {
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data = of_device_get_match_data(dev);
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if (!data) {
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dev_err(dev, "Unsupported QCOM WDT module\n");
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return -ENODEV;
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}
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@ -247,9 +262,8 @@ static int qcom_wdt_probe(struct platform_device *pdev)
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/* check if there is pretimeout support */
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irq = platform_get_irq_optional(pdev, 0);
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if (irq > 0) {
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ret = devm_request_irq(dev, irq, qcom_wdt_isr,
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IRQF_TRIGGER_RISING,
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if (data->pretimeout && irq > 0) {
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ret = devm_request_irq(dev, irq, qcom_wdt_isr, 0,
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"wdt_bark", &wdt->wdd);
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if (ret)
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return ret;
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@ -267,7 +281,7 @@ static int qcom_wdt_probe(struct platform_device *pdev)
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wdt->wdd.min_timeout = 1;
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wdt->wdd.max_timeout = 0x10000000U / wdt->rate;
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wdt->wdd.parent = dev;
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wdt->layout = regs;
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wdt->layout = data->offset;
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if (readl(wdt_addr(wdt, WDT_STS)) & 1)
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wdt->wdd.bootstatus = WDIOF_CARDRESET;
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@ -311,9 +325,9 @@ static int __maybe_unused qcom_wdt_resume(struct device *dev)
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static SIMPLE_DEV_PM_OPS(qcom_wdt_pm_ops, qcom_wdt_suspend, qcom_wdt_resume);
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static const struct of_device_id qcom_wdt_of_table[] = {
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{ .compatible = "qcom,kpss-timer", .data = reg_offset_data_apcs_tmr },
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{ .compatible = "qcom,scss-timer", .data = reg_offset_data_apcs_tmr },
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{ .compatible = "qcom,kpss-wdt", .data = reg_offset_data_kpss },
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{ .compatible = "qcom,kpss-timer", .data = &match_data_apcs_tmr },
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{ .compatible = "qcom,scss-timer", .data = &match_data_apcs_tmr },
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{ .compatible = "qcom,kpss-wdt", .data = &match_data_kpss },
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{ },
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};
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MODULE_DEVICE_TABLE(of, qcom_wdt_of_table);
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@ -0,0 +1,255 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Watchdog driver for the K3 RTI module
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*
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* (c) Copyright 2019-2020 Texas Instruments Inc.
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* All rights reserved.
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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#define DEFAULT_HEARTBEAT 60
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/* Max heartbeat is calculated at 32kHz source clock */
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#define MAX_HEARTBEAT 1000
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/* Timer register set definition */
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#define RTIDWDCTRL 0x90
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#define RTIDWDPRLD 0x94
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#define RTIWDSTATUS 0x98
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#define RTIWDKEY 0x9c
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#define RTIDWDCNTR 0xa0
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#define RTIWWDRXCTRL 0xa4
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#define RTIWWDSIZECTRL 0xa8
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#define RTIWWDRX_NMI 0xa
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#define RTIWWDSIZE_50P 0x50
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#define WDENABLE_KEY 0xa98559da
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#define WDKEY_SEQ0 0xe51a
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#define WDKEY_SEQ1 0xa35c
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#define WDT_PRELOAD_SHIFT 13
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#define WDT_PRELOAD_MAX 0xfff
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#define DWDST BIT(1)
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static int heartbeat;
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/*
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* struct to hold data for each WDT device
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* @base - base io address of WD device
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* @freq - source clock frequency of WDT
|
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* @wdd - hold watchdog device as is in WDT core
|
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*/
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struct rti_wdt_device {
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void __iomem *base;
|
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unsigned long freq;
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struct watchdog_device wdd;
|
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};
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|
||||
static int rti_wdt_start(struct watchdog_device *wdd)
|
||||
{
|
||||
u32 timer_margin;
|
||||
struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
|
||||
|
||||
/* set timeout period */
|
||||
timer_margin = (u64)wdd->timeout * wdt->freq;
|
||||
timer_margin >>= WDT_PRELOAD_SHIFT;
|
||||
if (timer_margin > WDT_PRELOAD_MAX)
|
||||
timer_margin = WDT_PRELOAD_MAX;
|
||||
writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD);
|
||||
|
||||
/*
|
||||
* RTI only supports a windowed mode, where the watchdog can only
|
||||
* be petted during the open window; not too early or not too late.
|
||||
* The HW configuration options only allow for the open window size
|
||||
* to be 50% or less than that; we obviouly want to configure the open
|
||||
* window as large as possible so we select the 50% option. To avoid
|
||||
* any glitches, we accommodate 5% safety margin also, so we setup
|
||||
* the min_hw_hearbeat at 55% of the timeout period.
|
||||
*/
|
||||
wdd->min_hw_heartbeat_ms = 11 * wdd->timeout * 1000 / 20;
|
||||
|
||||
/* Generate NMI when wdt expires */
|
||||
writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);
|
||||
|
||||
/* Open window size 50%; this is the largest window size available */
|
||||
writel_relaxed(RTIWWDSIZE_50P, wdt->base + RTIWWDSIZECTRL);
|
||||
|
||||
readl_relaxed(wdt->base + RTIWWDSIZECTRL);
|
||||
|
||||
/* enable watchdog */
|
||||
writel_relaxed(WDENABLE_KEY, wdt->base + RTIDWDCTRL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rti_wdt_ping(struct watchdog_device *wdd)
|
||||
{
|
||||
struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
|
||||
|
||||
/* put watchdog in service state */
|
||||
writel_relaxed(WDKEY_SEQ0, wdt->base + RTIWDKEY);
|
||||
/* put watchdog in active state */
|
||||
writel_relaxed(WDKEY_SEQ1, wdt->base + RTIWDKEY);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int rti_wdt_get_timeleft(struct watchdog_device *wdd)
|
||||
{
|
||||
u64 timer_counter;
|
||||
u32 val;
|
||||
struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
|
||||
|
||||
/* if timeout has occurred then return 0 */
|
||||
val = readl_relaxed(wdt->base + RTIWDSTATUS);
|
||||
if (val & DWDST)
|
||||
return 0;
|
||||
|
||||
timer_counter = readl_relaxed(wdt->base + RTIDWDCNTR);
|
||||
|
||||
do_div(timer_counter, wdt->freq);
|
||||
|
||||
return timer_counter;
|
||||
}
|
||||
|
||||
static const struct watchdog_info rti_wdt_info = {
|
||||
.options = WDIOF_KEEPALIVEPING,
|
||||
.identity = "K3 RTI Watchdog",
|
||||
};
|
||||
|
||||
static const struct watchdog_ops rti_wdt_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
.start = rti_wdt_start,
|
||||
.ping = rti_wdt_ping,
|
||||
.get_timeleft = rti_wdt_get_timeleft,
|
||||
};
|
||||
|
||||
static int rti_wdt_probe(struct platform_device *pdev)
|
||||
{
|
||||
int ret = 0;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct resource *wdt_mem;
|
||||
struct watchdog_device *wdd;
|
||||
struct rti_wdt_device *wdt;
|
||||
struct clk *clk;
|
||||
|
||||
wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
|
||||
if (!wdt)
|
||||
return -ENOMEM;
|
||||
|
||||
clk = clk_get(dev, NULL);
|
||||
if (IS_ERR(clk)) {
|
||||
if (PTR_ERR(clk) != -EPROBE_DEFER)
|
||||
dev_err(dev, "failed to get clock\n");
|
||||
return PTR_ERR(clk);
|
||||
}
|
||||
|
||||
wdt->freq = clk_get_rate(clk);
|
||||
|
||||
clk_put(clk);
|
||||
|
||||
if (!wdt->freq) {
|
||||
dev_err(dev, "Failed to get fck rate.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pm_runtime_enable(dev);
|
||||
ret = pm_runtime_get_sync(dev);
|
||||
if (ret) {
|
||||
if (ret != -EPROBE_DEFER)
|
||||
dev_err(&pdev->dev, "runtime pm failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, wdt);
|
||||
|
||||
wdd = &wdt->wdd;
|
||||
wdd->info = &rti_wdt_info;
|
||||
wdd->ops = &rti_wdt_ops;
|
||||
wdd->min_timeout = 1;
|
||||
wdd->max_hw_heartbeat_ms = (WDT_PRELOAD_MAX << WDT_PRELOAD_SHIFT) /
|
||||
wdt->freq * 1000;
|
||||
wdd->timeout = DEFAULT_HEARTBEAT;
|
||||
wdd->parent = dev;
|
||||
|
||||
watchdog_init_timeout(wdd, heartbeat, dev);
|
||||
|
||||
watchdog_set_drvdata(wdd, wdt);
|
||||
watchdog_set_nowayout(wdd, 1);
|
||||
watchdog_set_restart_priority(wdd, 128);
|
||||
|
||||
wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
wdt->base = devm_ioremap_resource(dev, wdt_mem);
|
||||
if (IS_ERR(wdt->base)) {
|
||||
ret = PTR_ERR(wdt->base);
|
||||
goto err_iomap;
|
||||
}
|
||||
|
||||
ret = watchdog_register_device(wdd);
|
||||
if (ret) {
|
||||
dev_err(dev, "cannot register watchdog device\n");
|
||||
goto err_iomap;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_iomap:
|
||||
pm_runtime_put_sync(&pdev->dev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int rti_wdt_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct rti_wdt_device *wdt = platform_get_drvdata(pdev);
|
||||
|
||||
watchdog_unregister_device(&wdt->wdd);
|
||||
pm_runtime_put(&pdev->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id rti_wdt_of_match[] = {
|
||||
{ .compatible = "ti,j7-rti-wdt", },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, rti_wdt_of_match);
|
||||
|
||||
static struct platform_driver rti_wdt_driver = {
|
||||
.driver = {
|
||||
.name = "rti-wdt",
|
||||
.of_match_table = rti_wdt_of_match,
|
||||
},
|
||||
.probe = rti_wdt_probe,
|
||||
.remove = rti_wdt_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(rti_wdt_driver);
|
||||
|
||||
MODULE_AUTHOR("Tero Kristo <t-kristo@ti.com>");
|
||||
MODULE_DESCRIPTION("K3 RTI Watchdog Driver");
|
||||
|
||||
module_param(heartbeat, int, 0);
|
||||
MODULE_PARM_DESC(heartbeat,
|
||||
"Watchdog heartbeat period in seconds from 1 to "
|
||||
__MODULE_STRING(MAX_HEARTBEAT) ", default "
|
||||
__MODULE_STRING(DEFAULT_HEARTBEAT));
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("platform:rti-wdt");
|
||||
|
|
@ -39,6 +39,10 @@
|
|||
|
||||
static DEFINE_IDA(watchdog_ida);
|
||||
|
||||
static int stop_on_reboot = -1;
|
||||
module_param(stop_on_reboot, int, 0444);
|
||||
MODULE_PARM_DESC(stop_on_reboot, "Stop watchdogs on reboot (0=keep watching, 1=stop)");
|
||||
|
||||
/*
|
||||
* Deferred Registration infrastructure.
|
||||
*
|
||||
|
|
@ -254,6 +258,14 @@ static int __watchdog_register_device(struct watchdog_device *wdd)
|
|||
}
|
||||
}
|
||||
|
||||
/* Module parameter to force watchdog policy on reboot. */
|
||||
if (stop_on_reboot != -1) {
|
||||
if (stop_on_reboot)
|
||||
set_bit(WDOG_STOP_ON_REBOOT, &wdd->status);
|
||||
else
|
||||
clear_bit(WDOG_STOP_ON_REBOOT, &wdd->status);
|
||||
}
|
||||
|
||||
if (test_bit(WDOG_STOP_ON_REBOOT, &wdd->status)) {
|
||||
wdd->reboot_nb.notifier_call = watchdog_reboot_notifier;
|
||||
|
||||
|
|
|
|||
|
|
@ -282,6 +282,7 @@ static int watchdog_start(struct watchdog_device *wdd)
|
|||
if (err == 0) {
|
||||
set_bit(WDOG_ACTIVE, &wdd->status);
|
||||
wd_data->last_keepalive = started_at;
|
||||
wd_data->last_hw_keepalive = started_at;
|
||||
watchdog_update_worker(wdd);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -13,7 +13,6 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/watchdog.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <linux/mfd/wm831x/core.h>
|
||||
#include <linux/mfd/wm831x/pdata.h>
|
||||
|
|
@ -29,7 +28,6 @@ struct wm831x_wdt_drvdata {
|
|||
struct watchdog_device wdt;
|
||||
struct wm831x *wm831x;
|
||||
struct mutex lock;
|
||||
int update_gpio;
|
||||
int update_state;
|
||||
};
|
||||
|
||||
|
|
@ -103,14 +101,6 @@ static int wm831x_wdt_ping(struct watchdog_device *wdt_dev)
|
|||
|
||||
mutex_lock(&driver_data->lock);
|
||||
|
||||
if (driver_data->update_gpio) {
|
||||
gpio_set_value_cansleep(driver_data->update_gpio,
|
||||
driver_data->update_state);
|
||||
driver_data->update_state = !driver_data->update_state;
|
||||
ret = 0;
|
||||
goto out;
|
||||
}
|
||||
|
||||
reg = wm831x_reg_read(wm831x, WM831X_WATCHDOG);
|
||||
|
||||
if (!(reg & WM831X_WDOG_RST_SRC)) {
|
||||
|
|
@ -239,23 +229,6 @@ static int wm831x_wdt_probe(struct platform_device *pdev)
|
|||
reg |= pdata->secondary << WM831X_WDOG_SECACT_SHIFT;
|
||||
reg |= pdata->software << WM831X_WDOG_RST_SRC_SHIFT;
|
||||
|
||||
if (pdata->update_gpio) {
|
||||
ret = devm_gpio_request_one(dev, pdata->update_gpio,
|
||||
GPIOF_OUT_INIT_LOW,
|
||||
"Watchdog update");
|
||||
if (ret < 0) {
|
||||
dev_err(wm831x->dev,
|
||||
"Failed to request update GPIO: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
driver_data->update_gpio = pdata->update_gpio;
|
||||
|
||||
/* Make sure the watchdog takes hardware updates */
|
||||
reg |= WM831X_WDOG_RST_SRC;
|
||||
}
|
||||
|
||||
ret = wm831x_reg_unlock(wm831x);
|
||||
if (ret == 0) {
|
||||
ret = wm831x_reg_write(wm831x, WM831X_WATCHDOG, reg);
|
||||
|
|
|
|||
|
|
@ -422,7 +422,7 @@ static int ziirave_firm_upload(struct watchdog_device *wdd,
|
|||
|
||||
static const struct watchdog_info ziirave_wdt_info = {
|
||||
.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
|
||||
.identity = "Zodiac RAVE Watchdog",
|
||||
.identity = "RAVE Switch Watchdog",
|
||||
};
|
||||
|
||||
static const struct watchdog_ops ziirave_wdt_ops = {
|
||||
|
|
|
|||
|
|
@ -89,7 +89,6 @@ enum wm831x_watchdog_action {
|
|||
|
||||
struct wm831x_watchdog_pdata {
|
||||
enum wm831x_watchdog_action primary, secondary;
|
||||
int update_gpio;
|
||||
unsigned int software:1;
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue