ARC: RIP broken 64bit RTSC
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>hifive-unleashed-5.1
Vineet Gupta
parent
742f8af6cb
commit
565a9b497c
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@ -311,11 +311,6 @@ config ARC_HAS_SWAPE
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bool "Insn: SWAPE (endian-swap)"
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default y
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config ARC_HAS_RTSC
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bool "Insn: RTSC (64-bit r/o cycle counter)"
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default y
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depends on !SMP
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endmenu # "ARC CPU Configuration"
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config LINUX_LINK_BASE
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@ -33,7 +33,7 @@ cflags-$(atleast_gcc44) += -fsection-anchors
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cflags-$(CONFIG_ARC_HAS_LLSC) += -mlock
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cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape
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cflags-$(CONFIG_ARC_HAS_RTSC) += -mrtsc
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cflags-$(CONFIG_ARC_DW2_UNWIND) += -fasynchronous-unwind-tables
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# By default gcc 4.8 generates dwarf4 which kernel unwinder can't grok
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@ -23,7 +23,6 @@ CONFIG_MODULES=y
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# CONFIG_IOSCHED_DEADLINE is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARC_PLAT_FPGA_LEGACY=y
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# CONFIG_ARC_HAS_RTSC is not set
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CONFIG_ARC_BUILTIN_DTB_NAME="angel4"
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CONFIG_PREEMPT=y
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# CONFIG_COMPACTION is not set
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@ -24,7 +24,6 @@ CONFIG_MODULES=y
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# CONFIG_IOSCHED_DEADLINE is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARC_PLAT_FPGA_LEGACY=y
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# CONFIG_ARC_HAS_RTSC is not set
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CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci"
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# CONFIG_COMPACTION is not set
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CONFIG_NET=y
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@ -26,7 +26,6 @@ CONFIG_MODULE_UNLOAD=y
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# CONFIG_BLOCK is not set
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CONFIG_ARC_PLAT_TB10X=y
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CONFIG_ARC_CACHE_LINE_SHIFT=5
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# CONFIG_ARC_HAS_RTSC is not set
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CONFIG_ARC_STACK_NONEXEC=y
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CONFIG_HZ=250
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CONFIG_ARC_BUILTIN_DTB_NAME="abilis_tb100_dvk"
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@ -180,10 +180,9 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
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(unsigned int)(arc_get_core_freq() / 1000000),
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(unsigned int)(arc_get_core_freq() / 10000) % 100);
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n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
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n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s\nISA Extn\t: ",
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IS_AVAIL1(cpu->timers.t0, "Timer0 "),
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IS_AVAIL1(cpu->timers.t1, "Timer1 "),
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IS_AVAIL2(cpu->timers.rtsc, "64-bit RTSC ", CONFIG_ARC_HAS_RTSC));
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IS_AVAIL1(cpu->timers.t1, "Timer1 "));
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n += i = scnprintf(buf + n, len - n, "%s%s",
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IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC));
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@ -254,9 +253,6 @@ static void arc_chk_core_config(void)
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if (!cpu->timers.t1)
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panic("Timer1 is not present!\n");
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if (IS_ENABLED(CONFIG_ARC_HAS_RTSC) && !cpu->timers.rtsc)
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panic("RTSC is not present\n");
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#ifdef CONFIG_ARC_HAS_DCCM
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/*
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* DCCM can be arbit placed in hardware.
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@ -26,6 +26,7 @@
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* while TIMER1 for free running (clocksource)
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*
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* Newer ARC700 cores have 64bit clk fetching RTSC insn, preferred over TIMER1
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* which however is currently broken
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*/
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#include <linux/spinlock.h>
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@ -59,52 +60,6 @@
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/********** Clock Source Device *********/
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#ifdef CONFIG_ARC_HAS_RTSC
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int arc_counter_setup(void)
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{
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/*
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* For SMP this needs to be 0. However Kconfig glue doesn't
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* enable this option for SMP configs
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*/
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return 1;
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}
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static cycle_t arc_counter_read(struct clocksource *cs)
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{
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unsigned long flags;
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union {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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struct { u32 high, low; };
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#else
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struct { u32 low, high; };
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#endif
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cycle_t full;
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} stamp;
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flags = arch_local_irq_save();
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__asm__ __volatile(
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" .extCoreRegister tsch, 58, r, cannot_shortcut \n"
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" rtsc %0, 0 \n"
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" mov %1, 0 \n"
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: "=r" (stamp.low), "=r" (stamp.high));
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arch_local_irq_restore(flags);
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return stamp.full;
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}
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static struct clocksource arc_counter = {
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.name = "ARC RTSC",
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.rating = 300,
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.read = arc_counter_read,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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#else /* !CONFIG_ARC_HAS_RTSC */
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static bool is_usable_as_clocksource(void)
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{
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#ifdef CONFIG_SMP
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@ -139,8 +94,6 @@ static struct clocksource arc_counter = {
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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#endif
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/********** Clock Event Device *********/
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/*
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