pinctrl: sh-pfc: rcar-gen3: Remove HDMI CEC pins, groups, and functions
The HDMI CEC function is not supported by the R-Car Gen3 Hardware Manual Rev 1.00. Therefore, delete the corresponding pin groups and functions, and rename the HDMI[01]_CEC definitions to match their GPIO functionality. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [geert: Squashed several commits] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>hifive-unleashed-5.2
Takeshi Kihara
Geert Uytterhoeven
parent
e87882eb9b
commit
5671f8e027
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@ -199,8 +199,8 @@
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#define GPSR6_0 F_(SSI_SCK01239, IP13_23_20)
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/* GPSR7 */
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#define GPSR7_3 FM(HDMI1_CEC)
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#define GPSR7_2 FM(HDMI0_CEC)
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#define GPSR7_3 FM(GP7_03)
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#define GPSR7_2 FM(GP7_02)
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_0 FM(AVS1)
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@ -577,8 +577,8 @@ static const u16 pinmux_data[] = {
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PINMUX_SINGLE(AVS1),
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PINMUX_SINGLE(AVS2),
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PINMUX_SINGLE(HDMI0_CEC),
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PINMUX_SINGLE(HDMI1_CEC),
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PINMUX_SINGLE(GP7_02),
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PINMUX_SINGLE(GP7_03),
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PINMUX_SINGLE(MSIOF0_RXD),
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PINMUX_SINGLE(MSIOF0_SCK),
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PINMUX_SINGLE(MSIOF0_TXD),
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@ -2072,22 +2072,6 @@ static const unsigned int du_disp_pins[] = {
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static const unsigned int du_disp_mux[] = {
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DU_DISP_MARK,
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};
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/* - HDMI ------------------------------------------------------------------- */
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static const unsigned int hdmi0_cec_pins[] = {
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/* HDMI0_CEC */
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RCAR_GP_PIN(7, 2),
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};
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static const unsigned int hdmi0_cec_mux[] = {
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HDMI0_CEC_MARK,
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};
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static const unsigned int hdmi1_cec_pins[] = {
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/* HDMI1_CEC */
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RCAR_GP_PIN(7, 3),
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};
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static const unsigned int hdmi1_cec_mux[] = {
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HDMI1_CEC_MARK,
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};
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/* - HSCIF0 ----------------------------------------------------------------- */
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static const unsigned int hscif0_data_pins[] = {
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/* RX, TX */
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@ -3945,8 +3929,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(du_oddf),
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SH_PFC_PIN_GROUP(du_cde),
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SH_PFC_PIN_GROUP(du_disp),
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SH_PFC_PIN_GROUP(hdmi0_cec),
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SH_PFC_PIN_GROUP(hdmi1_cec),
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SH_PFC_PIN_GROUP(hscif0_data),
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SH_PFC_PIN_GROUP(hscif0_clk),
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SH_PFC_PIN_GROUP(hscif0_ctrl),
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@ -4300,14 +4282,6 @@ static const char * const du_groups[] = {
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"du_disp",
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};
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static const char * const hdmi0_groups[] = {
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"hdmi0_cec",
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};
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static const char * const hdmi1_groups[] = {
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"hdmi1_cec",
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};
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static const char * const hscif0_groups[] = {
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"hscif0_data",
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"hscif0_clk",
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@ -4695,8 +4669,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(drif2),
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SH_PFC_FUNCTION(drif3),
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SH_PFC_FUNCTION(du),
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SH_PFC_FUNCTION(hdmi0),
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SH_PFC_FUNCTION(hdmi1),
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SH_PFC_FUNCTION(hscif0),
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SH_PFC_FUNCTION(hscif1),
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SH_PFC_FUNCTION(hscif2),
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@ -5415,8 +5387,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
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{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
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{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
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{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
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{ RCAR_GP_PIN(7, 3), 8, 3 }, /* HDMI1_CEC */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
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{ RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
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{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
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{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
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} },
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@ -5673,8 +5645,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
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[25] = RCAR_GP_PIN(0, 15), /* D15 */
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[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
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[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
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[28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
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[29] = RCAR_GP_PIN(7, 3), /* HDMI1_CEC */
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[28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
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[29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
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[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
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[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
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} },
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@ -201,8 +201,8 @@
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#define GPSR6_0 F_(SSI_SCK01239, IP14_23_20)
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/* GPSR7 */
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#define GPSR7_3 FM(HDMI1_CEC)
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#define GPSR7_2 FM(HDMI0_CEC)
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#define GPSR7_3 FM(GP7_03)
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#define GPSR7_2 FM(GP7_02)
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_0 FM(AVS1)
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@ -591,8 +591,8 @@ static const u16 pinmux_data[] = {
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PINMUX_SINGLE(AVS1),
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PINMUX_SINGLE(AVS2),
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PINMUX_SINGLE(CLKOUT),
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PINMUX_SINGLE(HDMI0_CEC),
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PINMUX_SINGLE(HDMI1_CEC),
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PINMUX_SINGLE(GP7_02),
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PINMUX_SINGLE(GP7_03),
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PINMUX_SINGLE(MSIOF0_RXD),
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PINMUX_SINGLE(MSIOF0_SCK),
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PINMUX_SINGLE(MSIOF0_TXD),
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@ -2132,22 +2132,6 @@ static const unsigned int du_disp_mux[] = {
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DU_DISP_MARK,
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};
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/* - HDMI ------------------------------------------------------------------- */
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static const unsigned int hdmi0_cec_pins[] = {
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/* HDMI0_CEC */
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RCAR_GP_PIN(7, 2),
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};
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static const unsigned int hdmi0_cec_mux[] = {
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HDMI0_CEC_MARK,
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};
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static const unsigned int hdmi1_cec_pins[] = {
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/* HDMI1_CEC */
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RCAR_GP_PIN(7, 3),
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};
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static const unsigned int hdmi1_cec_mux[] = {
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HDMI1_CEC_MARK,
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};
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/* - HSCIF0 ----------------------------------------------------------------- */
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static const unsigned int hscif0_data_pins[] = {
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/* RX, TX */
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@ -4226,8 +4210,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(du_oddf),
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SH_PFC_PIN_GROUP(du_cde),
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SH_PFC_PIN_GROUP(du_disp),
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SH_PFC_PIN_GROUP(hdmi0_cec),
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SH_PFC_PIN_GROUP(hdmi1_cec),
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SH_PFC_PIN_GROUP(hscif0_data),
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SH_PFC_PIN_GROUP(hscif0_clk),
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SH_PFC_PIN_GROUP(hscif0_ctrl),
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@ -4612,14 +4594,6 @@ static const char * const du_groups[] = {
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"du_disp",
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};
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static const char * const hdmi0_groups[] = {
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"hdmi0_cec",
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};
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static const char * const hdmi1_groups[] = {
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"hdmi1_cec",
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};
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static const char * const hscif0_groups[] = {
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"hscif0_data",
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"hscif0_clk",
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@ -5038,8 +5012,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(drif2),
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SH_PFC_FUNCTION(drif3),
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SH_PFC_FUNCTION(du),
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SH_PFC_FUNCTION(hdmi0),
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SH_PFC_FUNCTION(hdmi1),
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SH_PFC_FUNCTION(hscif0),
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SH_PFC_FUNCTION(hscif1),
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SH_PFC_FUNCTION(hscif2),
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@ -5766,8 +5738,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
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{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
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{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
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{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
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{ RCAR_GP_PIN(7, 3), 8, 3 }, /* HDMI1_CEC */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
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{ RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
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{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
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{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
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} },
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@ -6023,8 +5995,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
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[25] = RCAR_GP_PIN(0, 15), /* D15 */
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[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
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[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
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[28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
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[29] = RCAR_GP_PIN(7, 3), /* HDMI1_CEC */
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[28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
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[29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
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[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
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[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
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} },
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@ -207,7 +207,7 @@
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/* GPSR7 */
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#define GPSR7_3 FM(GP7_03)
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#define GPSR7_2 FM(HDMI0_CEC)
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#define GPSR7_2 FM(GP7_02)
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_0 FM(AVS1)
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@ -598,7 +598,7 @@ static const u16 pinmux_data[] = {
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PINMUX_SINGLE(AVS2),
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PINMUX_SINGLE(CLKOUT),
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PINMUX_SINGLE(GP7_03),
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PINMUX_SINGLE(HDMI0_CEC),
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PINMUX_SINGLE(GP7_02),
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PINMUX_SINGLE(MSIOF0_RXD),
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PINMUX_SINGLE(MSIOF0_SCK),
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PINMUX_SINGLE(MSIOF0_TXD),
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@ -2141,15 +2141,6 @@ static const unsigned int du_disp_mux[] = {
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DU_DISP_MARK,
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};
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/* - HDMI ------------------------------------------------------------------- */
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static const unsigned int hdmi0_cec_pins[] = {
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/* HDMI0_CEC */
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RCAR_GP_PIN(7, 2),
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};
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static const unsigned int hdmi0_cec_mux[] = {
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HDMI0_CEC_MARK,
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};
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/* - HSCIF0 ----------------------------------------------------------------- */
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static const unsigned int hscif0_data_pins[] = {
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/* RX, TX */
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@ -4125,7 +4116,7 @@ static const unsigned int vin5_clk_mux[] = {
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};
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static const struct {
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struct sh_pfc_pin_group common[313];
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struct sh_pfc_pin_group common[312];
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struct sh_pfc_pin_group automotive[30];
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} pinmux_groups = {
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.common = {
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@ -4172,7 +4163,6 @@ static const struct {
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SH_PFC_PIN_GROUP(du_oddf),
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SH_PFC_PIN_GROUP(du_cde),
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SH_PFC_PIN_GROUP(du_disp),
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SH_PFC_PIN_GROUP(hdmi0_cec),
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SH_PFC_PIN_GROUP(hscif0_data),
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SH_PFC_PIN_GROUP(hscif0_clk),
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SH_PFC_PIN_GROUP(hscif0_ctrl),
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@ -4586,10 +4576,6 @@ static const char * const du_groups[] = {
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"du_disp",
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};
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static const char * const hdmi0_groups[] = {
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"hdmi0_cec",
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};
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static const char * const hscif0_groups[] = {
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"hscif0_data",
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"hscif0_clk",
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@ -4983,7 +4969,7 @@ static const char * const vin5_groups[] = {
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};
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static const struct {
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struct sh_pfc_function common[50];
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struct sh_pfc_function common[49];
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struct sh_pfc_function automotive[4];
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} pinmux_functions = {
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.common = {
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@ -4995,7 +4981,6 @@ static const struct {
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SH_PFC_FUNCTION(canfd0),
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SH_PFC_FUNCTION(canfd1),
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SH_PFC_FUNCTION(du),
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SH_PFC_FUNCTION(hdmi0),
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SH_PFC_FUNCTION(hscif0),
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SH_PFC_FUNCTION(hscif1),
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SH_PFC_FUNCTION(hscif2),
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@ -5725,7 +5710,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
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{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
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{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
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{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
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{ RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
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{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
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{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
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@ -5981,7 +5966,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
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[25] = RCAR_GP_PIN(0, 15), /* D15 */
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[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
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[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
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[28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
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[28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
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[29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
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[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
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[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
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@ -208,7 +208,7 @@
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/* GPSR7 */
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#define GPSR7_3 FM(GP7_03)
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#define GPSR7_2 FM(HDMI0_CEC)
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#define GPSR7_2 FM(GP7_02)
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_0 FM(AVS1)
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@ -595,7 +595,7 @@ static const u16 pinmux_data[] = {
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PINMUX_SINGLE(AVS2),
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PINMUX_SINGLE(CLKOUT),
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PINMUX_SINGLE(GP7_03),
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PINMUX_SINGLE(HDMI0_CEC),
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PINMUX_SINGLE(GP7_02),
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PINMUX_SINGLE(MSIOF0_RXD),
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PINMUX_SINGLE(MSIOF0_SCK),
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PINMUX_SINGLE(MSIOF0_TXD),
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@ -5882,7 +5882,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
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{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
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{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
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{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
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{ RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
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{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
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{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
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@ -6138,7 +6138,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
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[25] = RCAR_GP_PIN(0, 15), /* D15 */
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[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
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[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
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[28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
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[28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
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[29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
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[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
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[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
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